OMPM2001 Result: Advanced Micro Devices Tyan Thunder n4250QE (S4985E) (Opteron(TM) 2350)

SPEC has determined that this result was not in compliance with the SPEC OMP2001 run and reporting rules. Specifically, the submitter reported that the result would not meet the SPEC HPG requirements for continued availability.
Benchmark	Reference Time	Base Runtime	Base Ratio	Peak Runtime	Peak Ratio
310.wupwise_m	6000	NA	NA	NA	NA
312.swim_m	6000	NA	NA	NA	NA
314.mgrid_m	7300	NA	NA	NA	NA
316.applu_m	4000	NA	NA	NA	NA
318.galgel_m	5100	NA	NA	NA	NA
320.equake_m	2600	NA	NA	NA	NA
324.apsi_m	3400	NA	NA	NA	NA
326.gafort_m	8700	NA	NA	NA	NA
328.fma3d_m	4600	NA	NA	NA	NA
330.art_m	6400	NA	NA	NA	NA
332.ammp_m	7000	NA	NA	NA	NA
SPECompMbase2001	NA
	SPECompMpeak2001	NA

SPEC has determined that this result was not in compliance
with the SPEC OMP2001 run and reporting rules. Specifically,
the submitter reported that the result would not meet the SPEC
HPG requirements for continued availability.

Benchmark

Reference
Time

Base
Runtime

Base
Ratio

Peak
Runtime

Peak
Ratio

310.wupwise_m

6000

312.swim_m

6000

314.mgrid_m

7300

316.applu_m

4000

318.galgel_m

5100

320.equake_m

2600

324.apsi_m

3400

326.gafort_m

8700

328.fma3d_m

4600

330.art_m

6400

332.ammp_m

7000

SPECompMbase2001

SPECompMpeak2001

Hardware

Hardware Vendor:

Advanced Micro Devices

Model Name:

Tyan Thunder n4250QE (S4985E) (Opteron(TM) 2350)

CPU:

Opteron(TM) 2350

CPU MHz:

2000

FPU:

Integrated

CPU(s) enabled:

8 cores, 2 chips, 4 cores/chip

CPU(s) orderable:

1, 2 chips

Primary Cache:

64KBI + 64KBD on chip per core

Secondary Cache:

512KB (I+D) on chip per core

L3 Cache:

2MB (I+D) on chip per chip

Other Cache:

None

Memory:

8x1GB, PC2-5300 CL5

Disk Subsystem:

160GB 7200 rpm SATA

Other Hardware:

None

Software

OpenMP Threads:

Parallel:

OpenMP

Operating System:

SLES10 SP1 64bit

Compiler:

QLogic PathScale Compiler Suite ver. 3.0

File System:

Linux/Ext3

System State:

Multi-User

Notes / Tuning Information
Extra art Base Flags 330.art_m (extra): -DINTS_PER_CACHELINE=16 -DDBLS_PER_CACHELINE=8 Base tuning: C : pathcc -gnu3 -mp -Ofast -mcpu=opteron -mcmodel=medium Fortran : pathf90 -mp -Ofast -mcpu=opteron -OPT:early_mp=on -mcmodel=medium ONESTEP=yes Peak tuning: 310.wupwise_m: -mp -Ofast -msse3 -LNO:prefetch_ahead=5:prefetch=3 -OPT:unroll_times_max=8:unroll_size=128:IEEE_NaN_Inf=off:ro=3 -IPA:linear=on:plimit=50000:callee_limit=5000 -INLINE:aggressive=on ompl.32 src.alt used 312.swim_m: -mp -O3 -OPT:Ofast -m3dnow -mcmodel=medium -LNO:simd=0 ompl.32 src.alt used 314.mgrid_m: basepeak=yes ompl src.alt used 316.applu_m: basepeak=yes ompl src.alt used 318.galgel_m: basepeak=yes 320.equake_m: -gnu3 -Ofast -mp -OPT:alias=disjoint ompl.32 src.alt used 324.apsi_m: -mp -O3 -OPT:Ofast -TENV:x=4 -LNO:fusion=2:prefetch=0 ompl src.alt used 326.gafort_m: basepeak=yes 328.fma3d_m: basepeak=yes 330.art_m: basepeak=yes 332.ammp_m: -gnu3 -mp -Ofast -mcpu=opteron -mcmodel=medium use_submit_for_speed=1 submit= PSC_OMP_GUIDED_CHUNK_MAX=700 $command Portablility flags: 318.galgel_m : -fixedform -col80 Base and Peak User Environment (bash): export OMP_NUM_THREADS=8 export OMP_DYNAMIC=FALSE export PSC_OMP_AFFINITY=TRUE export PSC_OMP_STATIC_FAIR=TRUE export PSC_OMP_THREAD_SPIN=1000000000 ulimit -s unlimited Default BIOS settings used, with DRAM bank interleave set to auto Qlogic Pathscale 3.0 compiler flags are described in AMD-20070828-psc30_flags.txt Submitted_by: "Waldecker, Brian" Submitted: Wed Sep 12 11:27:37 2007 Submission: omp2001-20070820-00260.sub

Notes / Tuning Information

 Extra art Base Flags
   330.art_m (extra): -DINTS_PER_CACHELINE=16 -DDBLS_PER_CACHELINE=8

 Base tuning:
   C       : pathcc  -gnu3 -mp -Ofast -mcpu=opteron -mcmodel=medium
   Fortran : pathf90 -mp -Ofast -mcpu=opteron -OPT:early_mp=on -mcmodel=medium
   ONESTEP=yes

 Peak tuning:
    310.wupwise_m: -mp -Ofast -msse3 -LNO:prefetch_ahead=5:prefetch=3 
                   -OPT:unroll_times_max=8:unroll_size=128:IEEE_NaN_Inf=off:ro=3 
                   -IPA:linear=on:plimit=50000:callee_limit=5000 
                   -INLINE:aggressive=on
                   ompl.32 src.alt used
    312.swim_m: -mp -O3 -OPT:Ofast -m3dnow -mcmodel=medium -LNO:simd=0
                ompl.32 src.alt used
    314.mgrid_m: basepeak=yes
                 ompl src.alt used
    316.applu_m: basepeak=yes
                 ompl src.alt used
    318.galgel_m: basepeak=yes
    320.equake_m: -gnu3 -Ofast -mp -OPT:alias=disjoint
                  ompl.32 src.alt used
    324.apsi_m: -mp -O3 -OPT:Ofast -TENV:x=4 -LNO:fusion=2:prefetch=0
                ompl src.alt used
    326.gafort_m: basepeak=yes
    328.fma3d_m: basepeak=yes
    330.art_m: basepeak=yes
    332.ammp_m: -gnu3 -mp -Ofast -mcpu=opteron -mcmodel=medium
                use_submit_for_speed=1
                submit= PSC_OMP_GUIDED_CHUNK_MAX=700 $command
 
 
 Portablility flags:
  318.galgel_m    : -fixedform -col80
 
 Base and Peak User Environment (bash):
   export OMP_NUM_THREADS=8
   export OMP_DYNAMIC=FALSE
   export PSC_OMP_AFFINITY=TRUE
   export PSC_OMP_STATIC_FAIR=TRUE
   export PSC_OMP_THREAD_SPIN=1000000000
   ulimit -s unlimited
   
 Default BIOS settings used, with DRAM bank interleave set to auto
 Qlogic Pathscale 3.0 compiler flags are described in AMD-20070828-psc30_flags.txt

Submitted_by: "Waldecker, Brian" 
Submitted: Wed Sep 12 11:27:37 2007
Submission: omp2001-20070820-00260.sub

First published at SPEC.org on 12-Sep-2007

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