SPEC Seal of Reviewal OMPM2001 Result
Copyright © 1999-2007 Standard Performance Evaluation Corporation
IBM Corporation
IBM eServer p5 570 (1900 MHz, 16 CPU)
SPECompMpeak2001 = 38282      
SPECompMbase2001 = 37444      
SPEC license # HPG0005 Tested by: IBM Test site: Austin, TX Test date: Jun-2004 Hardware Avail: Sep-2004 Software Avail: Oct-2004
Benchmark Reference
Time
Base
Runtime
Base
Ratio
Peak
Runtime
Peak
Ratio
Graph Scale
310.wupwise_m 6000 89.0  67419       89.0  67419       310.wupwise_m base result bar (67419)
310.wupwise_m peak result bar (67419)
312.swim_m 6000 139    43207       135    44433       312.swim_m base result bar (43207)
312.swim_m peak result bar (44433)
314.mgrid_m 7300 351    20799       351    20799       314.mgrid_m base result bar (20799)
314.mgrid_m peak result bar (20799)
316.applu_m 4000 59.1  67673       56.1  71319       316.applu_m base result bar (67673)
316.applu_m peak result bar (71319)
318.galgel_m 5100 154    33122       154    33122       318.galgel_m base result bar (33122)
318.galgel_m peak result bar (33122)
320.equake_m 2600 112    23247       99.1  26231       320.equake_m base result bar (23247)
320.equake_m peak result bar (26231)
324.apsi_m 3400 92.7  36664       92.7  36664       324.apsi_m base result bar (36664)
324.apsi_m peak result bar (36664)
326.gafort_m 8700 173    50216       168    51866       326.gafort_m base result bar (50216)
326.gafort_m peak result bar (51866)
328.fma3d_m 4600 198    23189       198    23252       328.fma3d_m base result bar (23189)
328.fma3d_m peak result bar (23252)
330.art_m 6400 76.0  84248       75.2  85143       330.art_m base result bar (84248)
330.art_m peak result bar (85143)
332.ammp_m 7000 392    17864       393    17805       332.ammp_m base result bar (17864)
332.ammp_m peak result bar (17805)
SPECompMbase2001 37444        
  SPECompMpeak2001 38282        

Hardware
Hardware Vendor: IBM Corporation
Model Name: IBM eServer p5 570 (1900 MHz, 16 CPU)
CPU: POWER5
CPU MHz: 1900
FPU: Integrated
CPU(s) enabled: 16 cores, 8 chips, 2 cores/chip (SMT on)
CPU(s) orderable: 2,4,8,12,16
Primary Cache: 64KBI+32KBD (on chip)/core
Secondary Cache: 1920KB unified (on chip)/chip
L3 Cache: 36MB unified (off chip)/DCM, 8 DCM/SUT
Other Cache: none
Memory: 64x1 GB DDR2
Disk Subsystem: 1x36GB SCSI, 15K RPM
Other Hardware:
Software
OpenMP Threads: 32
Parallel: OpenMP
Operating System: AIX 5L V5.3
Compiler: XL C/C++ Enterprise Edition Version 7.0 for AIX
XL Fortran Enterprise Edition V9.1 for AIX
Other Software: IBM Engineering and Scientific
Subroutine Library for AIX,
Version 4 Release 2
File System: AIX/JFS2
System State: Multi-user
Notes / Tuning Information
Tested by IBM
 Portability Flags & Environment Variables
 
   Linker flag: -bmaxdata:0x80000000 used in all ca
   -qfixed used in: 310.wupwise_m, 312.swim_m, 314.mgrid_m, 316.applu_m, 324.apsi_m
   -qfixed=80 used in: 318.galgel_m
   -qsuffix=f=f90 used in: 318.galgel_m, 326.gafort_m, 328.fma3d_m
   Linker flag: -bmaxdata:0xD0000000 used in 330.art_m (for base and peak)
 
 Base Flags
   C: -q64 -O5 -qalign=natural -qipa=partition=large -qmaxmem=-1 -qsmp=omp
   FORTRAN:-O5 -qipa=partition=large -qmaxmem=-1 -qsmp=omp
 
 Base & Peak User Environment:
   OMP_NUM_THREADS=32
   OMP_DYNAMIC=FALSE
   ENV_XLSMPOPTS=SPINS=0:YIELDS=0:STACK=8000000:SCHEDULE=STATIC
   MALLOCMULTIHEAP=1
 
 Peak Flags
   -qsmp=omp used in all cases
   310.wupwise_m: basepeak=1
   312.swim_m:    -O5 -qtune=pwr5 -qarch=pwr5
   314.mgrid_m:   basepeak=1
   316.applu_m:   -O5 -qtune=pwr5 -qarch=pwr5
   318.galgel_m:  basepeak = 1
   320.equake_m:  -q64 -O5 -qalign=natural -qhot=arraypad -Q
   324.apsi_m:    basepeak=1
   326.gafort_m:  -O5 -qhot=arraypad -qipa=partition=large -qmaxmem=-1
   328.fma3d_m:   -O5 -qhot=arraypad -qipa=noobject
                  -qipa=partition=large -qmaxmem=-1
   330.art_m:     -qpdf1/pdf2
                  -q64 -O5 -blpdata -qalign=natural -qhot=arraypad -Q
   332.ammp_m:    -q64 -O5 -qalign=natural -qhot=arraypad -Q

 Alternate sources:
   Add critical region around update of linked list in parallel loop.
   Approved src.alt available as ompm-purdue1-20040324.tar.gz
   Used for 330.art_m, base and peak.
 
 Peak sources:
   SPEC OMPL2001 source for 32bit systems modified for SPEC OMPM2001 used
   with 312.swim_m, 316.applu_m, 320.equake_m, 326.gafort_m.
 
 SMT: Acronym for "Simultaneous Multi-Threading". A processor technology that allows
      the simultaneous execution of multiple thread contexts within a single processor
      core. (Enabled by default)
 DCM: Acronym for "Dual-Chip Module" (one dual-core processor chip + one L3-cache chip)
 SUT: Acronym for "System Under Test"

 C:          IBM XL C for AIX invoked as xlc_r
 Fortran 90: IBM XL Fortran for AIX invoked as xlf90_r
 
 ulimits set to unlimited.
 Large page mode and memory affinity were set as follows:
   vmo -r -o lgpg_regions=400 -o lgpg_size=16777216 -o memory_affinity=1
   chuser capabilities=CAP_BYPASS_RAC_VMM,CAP_PROPAGATE $USER
   reboot -q
   export MEMORY_AFFINITY=MCM




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Copyright © 1999-2007 Standard Performance Evaluation Corporation

First published at SPEC.org on 06-Aug-2004

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