SPEChpc™ 2021 Tiny Result

Transtec (Test Sponsor: Helmholtz-Zentrum Dresden - Rossendorf)

Hemera: Intel Server Board S2600BPB (Intel Xeon Gold 6148)

SPEChpc 2021_tny_base = 2.25

SPEChpc 2021_tny_peak = Not Run

hpc2021 License:	065A	Test Date:	Sep-2021
Test Sponsor:	Helmholtz-Zentrum Dresden - Rossendorf	Hardware Availability:	Jul-2017
Tested by:	Helmholtz-Zentrum Dresden - Rossendorf	Software Availability:	Oct-2020

Benchmark result graphs are available in the PDF report.

Results Table

Benchmark	Base									Peak
Benchmark	Model	Ranks	Thrds/Rnk	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio	Model	Ranks	Thrds/Rnk	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio
SPEChpc 2021_tny_base					2.25
SPEChpc 2021_tny_peak					Not Run
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
505.lbm_t	MPI	40	2	1001	2.25	1004	2.24
513.soma_t	MPI	40	2	1175	3.15	1173	3.15
518.tealeaf_t	MPI	40	2	967	1.71	968	1.70
519.clvleaf_t	MPI	40	2	871	1.90	872	1.89
521.miniswp_t	MPI	40	2	682	2.35	682	2.35
528.pot3d_t	MPI	40	2	1230	1.73	1227	1.73
532.sph_exa_t	MPI	40	2	653	2.98	653	2.98
534.hpgmgfv_t	MPI	40	2	687	1.71	686	1.71
535.weather_t	MPI	40	2	1021	3.16	1010	3.19

Hardware Summary
Type of System:	Homogenous Cluster
Compute Node:	Compute Node
Interconnect:	Infiniband (EDR)
Compute Nodes Used:	1
Total Chips:	2
Total Cores:	40
Total Threads:	80
Total Memory:	384 GB

Software Summary
Compiler:	Intel Parallel Studio XE 2020
Other Software:	None
Base Parallel Model:	MPI
Base Ranks Run:	40
Base Threads Run:	2
Peak Parallel Models:	Not Run

Node Description: Compute Node

Hardware
Number of nodes:	1
Uses of the node:	compute
Vendor:	Intel
Model:	Intel Server Board S2600BPB
CPU Name:	Intel Xeon Gold 6148
CPU(s) orderable:	1 or 2 per node
Chips enabled:	2
Cores enabled:	40
Cores per chip:	20
Threads per core:	2
CPU Characteristics:	Intel Turbo Boost Technology up to 3.7 GHz
CPU MHz:	2400
Primary Cache:	32 KB I + 32 KB D on chip per core
Secondary Cache:	1 MB I+D on chip per core
L3 Cache:	28160 KB I+D on chip per chip
Other Cache:	None
Memory:	384 GB (12 x 32GB 2Rx4 PC4-2666V-RB2-12)
Disk Subsystem:	1 x 500 GB SSD
Other Hardware:	None
Accel Count:	0
Adapter:	Mellanox MT4115
Number of Adapters:	2
Slot Type:	PCI-Express 3.0 x16
Data Rate:	100 Gb/s
Ports Used:	2
Interconnect Type:	EDR Infiniband

Software
Adapter:	Mellanox MT4115
Adapter Firmware:	12.28.2006
Operating System:	CentOS Linux release 7.9.2009 (Core) 3.10.0-1160.6.1.el7.x86_64
Local File System:	xfs
Shared File System:	GPFS Version 5.0.5.0 6 NSD (vendor: NEC) 5 building blocks (vendor: NetApp): 2x (240 x 8 TB HDD) 1x (180 x 12 TB HDD) 1x (240 x 16 TB HDD) 1x (120 x 16 TB HDD)
System State:	Multi-user, run level 3
Other Software:	None

Interconnect Description: Infiniband (EDR)

Hardware
Vendor:	Mellanox Technologies
Model:	Mellanox SB7790
Switch Model:	36 x EDR 100 Gb/s
Number of Switches:	2
Number of Ports:	36
Data Rate:	100 Gb/s
Topology:	Mesh (blocking factor: 8:1)
Primary Use:	MPI Traffic, GPFS

Software

Submit Notes

The config file option 'submit' was used.
  MPI startup command:
    mpiexec.hydra --bind-to core -np $ranks $command

General Notes

This benchmark result is intended to provide perspective on
past performance using the historical hardware and/or
software described on this result page.

The system as described on this result page was formerly
generally available.  At the time of this publication, it may
not be shipping, and/or may not be supported, and/or may fail
to meet other tests of General Availability described in the
SPEC HPG Policy document, http://www.spec.org/hpg/policy.html

This measured result may not be representative of the result
that would be measured were this benchmark run with hardware
and software available as of the publication date.

Compiler Version Notes

==============================================================================
 CC  505.lbm_t(base) 513.soma_t(base) 518.tealeaf_t(base) 521.miniswp_t(base)
      534.hpgmgfv_t(base)
------------------------------------------------------------------------------
icc (ICC) 19.1.3.304 20200925
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 CXXC 532.sph_exa_t(base)
------------------------------------------------------------------------------
icpc (ICC) 19.1.3.304 20200925
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 FC  519.clvleaf_t(base) 528.pot3d_t(base) 535.weather_t(base)
------------------------------------------------------------------------------
ifort (IFORT) 19.1.3.304 20200925
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

mpiicc

C++ benchmarks:

mpiicpc

Fortran benchmarks:

mpiifort

Base Portability Flags

505.lbm_t:	-DSPEC_LP64
513.soma_t:	-DSPEC_LP64 -DSPEC_NO_VAR_ARRAY_REDUCE
518.tealeaf_t:	-DSPEC_LP64
519.clvleaf_t:	-DSPEC_LP64
521.miniswp_t:	-DUSE_KBA -DUSE_ACCELDIR -DSPEC_LP64
528.pot3d_t:	-DSPEC_LP64
532.sph_exa_t:	-DSPEC_USE_LT_IN_KERNELS -DSPEC_LP64
534.hpgmgfv_t:	-DSPEC_LP64
535.weather_t:	-DSPEC_LP64

Base Optimization Flags

C benchmarks:

-Ofast -xCORE-AVX512 -ansi-alias

C++ benchmarks:

-Ofast -xCORE-AVX512 -ansi-alias

Fortran benchmarks:

-Ofast -xCORE-AVX512

The flags file that was used to format this result can be browsed at
http://www.spec.org/hpc2021/flags/EM64T_Intel_flags.html.

You can also download the XML flags source by saving the following link:
http://www.spec.org/hpc2021/flags/EM64T_Intel_flags.xml.