hpc2021 Flag Description

Base Optimization Flags

C benchmarks

• • -Ofast
  • 
  • mpicc, mpicxx, mpifort, mpiicc, mpiicpc, mpiifort
  • OPTIMIZE

  • Chooses generally optimal flags for the target platform.

• • -ipo
  • 
  • OPTIMIZE

  • Multi-file ip optimizations that includes:
    - inline function expansion
    - interprocedural constant propogation
    - dead code elimination
    - propagation of function characteristics
    - passing arguments in registers
    - loop-invariant code motion

• • -xCORE-AVX512
  • 
  • OPTIMIZE

  • Code is optimized for Intel(R) processors with support for AVX instructions. May generate Intel® AVX-12 Foundation instructions,Intel® AVX-512 Conflict Detectio instructions, Intel® AVX-512 Doubleword and Quadword instructions, Intel® AVX-51 Byte and Word instructions, Intel® AVX-512 Vector Length extensions, Intel® AVX2,VX SSE4.2, SSE4.1, SSSE3, SSE3, SSE2 and SSE instructions for Intel® processors. Optimizes for a future Intel® processor. Available in compiler version 15 update 1 and later.

• • -mprefer-vector-width=512
  • 
  • OPTIMIZE

  • Specifies preferred 512b vector width for auto-vectorization. Defaults to 'none' which allows target specific decisions.

• • -fiopenmp
  • 
  • mpicc, mpicxx, mpifort, mpiicc, mpiicpc, mpiifort
  • OPTIMIZE

  • Enable the compiler to generate multi-threaded code based on the OpenMP* directives. Similar behavior was granted by -qopenmp in previous versions.

• • -ansi-alias
  • 
  • COPTIMIZE

  • Enable/disable(DEFAULT) use of ANSI aliasing rules in optimizations; user asserts that the program adheres to these rules.

C++ benchmarks

• • -Ofast
  • 
  • mpicc, mpicxx, mpifort, mpiicc, mpiicpc, mpiifort
  • OPTIMIZE

  • Chooses generally optimal flags for the target platform.

• • -ipo
  • 
  • OPTIMIZE

  • Multi-file ip optimizations that includes:
    - inline function expansion
    - interprocedural constant propogation
    - dead code elimination
    - propagation of function characteristics
    - passing arguments in registers
    - loop-invariant code motion

• • -xCORE-AVX512
  • 
  • OPTIMIZE

  • Code is optimized for Intel(R) processors with support for AVX instructions. May generate Intel® AVX-12 Foundation instructions,Intel® AVX-512 Conflict Detectio instructions, Intel® AVX-512 Doubleword and Quadword instructions, Intel® AVX-51 Byte and Word instructions, Intel® AVX-512 Vector Length extensions, Intel® AVX2,VX SSE4.2, SSE4.1, SSSE3, SSE3, SSE2 and SSE instructions for Intel® processors. Optimizes for a future Intel® processor. Available in compiler version 15 update 1 and later.

• • -mprefer-vector-width=512
  • 
  • OPTIMIZE

  • Specifies preferred 512b vector width for auto-vectorization. Defaults to 'none' which allows target specific decisions.

• • -fiopenmp
  • 
  • mpicc, mpicxx, mpifort, mpiicc, mpiicpc, mpiifort
  • OPTIMIZE

  • Enable the compiler to generate multi-threaded code based on the OpenMP* directives. Similar behavior was granted by -qopenmp in previous versions.

• • -ansi-alias
  • 
  • CXXOPTIMIZE

  • Enable/disable(DEFAULT) use of ANSI aliasing rules in optimizations; user asserts that the program adheres to these rules.

Fortran benchmarks

• • -Ofast
  • 
  • mpicc, mpicxx, mpifort, mpiicc, mpiicpc, mpiifort
  • OPTIMIZE

  • Chooses generally optimal flags for the target platform.

• • -ipo
  • 
  • OPTIMIZE

  • Multi-file ip optimizations that includes:
    - inline function expansion
    - interprocedural constant propogation
    - dead code elimination
    - propagation of function characteristics
    - passing arguments in registers
    - loop-invariant code motion

• • -xCORE-AVX512
  • 
  • OPTIMIZE

  • Code is optimized for Intel(R) processors with support for AVX instructions. May generate Intel® AVX-12 Foundation instructions,Intel® AVX-512 Conflict Detectio instructions, Intel® AVX-512 Doubleword and Quadword instructions, Intel® AVX-51 Byte and Word instructions, Intel® AVX-512 Vector Length extensions, Intel® AVX2,VX SSE4.2, SSE4.1, SSSE3, SSE3, SSE2 and SSE instructions for Intel® processors. Optimizes for a future Intel® processor. Available in compiler version 15 update 1 and later.

• • -mprefer-vector-width=512
  • 
  • OPTIMIZE

  • Specifies preferred 512b vector width for auto-vectorization. Defaults to 'none' which allows target specific decisions.

• • -fiopenmp
  • 
  • mpicc, mpicxx, mpifort, mpiicc, mpiicpc, mpiifort
  • OPTIMIZE

  • Enable the compiler to generate multi-threaded code based on the OpenMP* directives. Similar behavior was granted by -qopenmp in previous versions.

• • -nostandard-realloc-lhs
  • 
  • FOPTIMIZE

  • Option standard-realloc-lhs (the default), tells the compiler that when the left-hand side of an assignment is an allocatable object, it should be reallocated to the shape of the right-hand side of the assignment before the assignment occurs. This is the current Fortran Standard definition. This feature may cause extra overhead at run time. This option has the same effect as option assume realloc_lhs.

    If you specify nostandard-realloc-lhs, the compiler uses the old Fortran 2003 rules when interpreting assignment statements. The left-hand side is assumed to be allocated with the correct shape to hold the right-hand side. If it is not, incorrect behavior will occur. This option has the same effect as option assume norealloc_lhs.

• • -align array64byte
  • 
  • FOPTIMIZE

  • The align toggle changes how data elements are aligned. Variables and arrays are analyzed and memory layout can be altered. Specifying array64byte will look for opportunities to transform and reailgn arrays to 64byte boundaries.