# Invocation command line: # /home/hpc2021/bin/harness/runhpc --config=cisco.cfg --tune=base pmodel=mpi --define model=mpi --threads=1 --rank=120 --size=ref --reportable --iterations=3 small # output_root was not used for this run ############################################################################ # Invocation command line: # output_root was not used for this run ############################################################################ #!/bin/bash ###################################################################### # Example configuration file for the Intel 2022 Compilers # # Defines: "acctype" => "mpi", "omp", default "mpi" # "label" => ext base label, default "hpc-omp" # # ####################################################################### expid= %ifdef %{EXPID} expid=%{EXPID} %endif allow_label_override = yes # label controls srcalt: simd - for simd build_in_build_dir=0 # build in run dir basepeak=0 %ifndef %{label} # IF label is not set use intel % define label hpc-omp %endif %ifndef %{model} # IF acctype is not set use mpi % define pmodel MPI %endif teeout = yes makeflags=-j # Tester description license_num = 9019 test_sponsor = Cisco Systems tester = Cisco Systems ###################################################### # SUT Section ###################################################### ###################################################### # Example configuration information for a # system under test (SUT) Section ###################################################### # General SUT info system_vendor = Cisco Systems system_name = Cisco UCS X210c M7 (Intel Xeon Platinum 8490H) interconnect_fs_label = N/A hw_avail = Mar-2023 sw_avail = Nov-2022 prepared_by = Cisco Systems # Computation node info # [Node_Description: Hardware] node_compute_syslbl = Cisco UCS X210c M7 node_compute_order = 1 node_compute_count = 1 node_compute_purpose = Compute node_compute_hw_vendor = Cisco Systems node_compute_hw_model = Cisco UCS X210c M7 node_compute_hw_cpu_name = Intel Xeon Platinum 8490H node_compute_hw_ncpuorder = 1, 2 chips node_compute_hw_nchips = 2 node_compute_hw_ncores = 120 node_compute_hw_ncoresperchip = 60 node_compute_hw_nthreadspercore = 2 node_compute_hw_cpu_char = Intel Turbo Boost Technology up to 3.5 GHz node_compute_hw_cpu_mhz = 1900 node_compute_hw_pcache = 32 KB I + 48 KB D on chip per core node_compute_hw_scache = 2 MB I+D on chip per core node_compute_hw_tcache = 112.5 MB I+D on chip per chip node_compute_hw_ocache = None node_compute_hw_memory = 1 TB (16 x 64 GB 2Rx4 PC5-4800B-R) node_compute_hw_disk = 1 x 960 GB M.2 SSD SATA node_compute_hw_other = None #[Node_Description: Accelerator] #[Node_Description: Software] node_compute_hw_adapter_fs_model =None node_compute_hw_adapter_fs_count =0 node_compute_hw_adapter_fs_slot_type = None node_compute_hw_adapter_fs_data_rate =None node_compute_hw_adapter_fs_ports_used =0 node_compute_hw_adapter_fs_interconnect =None node_compute_hw_adapter_fs_driver =None node_compute_hw_adapter_fs_firmware =None node_compute_sw_os000 =SUSE Linux Enterprise Server 15 SP4 node_compute_sw_os001 =, 5.14.21-150400.22-default node_compute_sw_localfile = xfs node_compute_sw_sharedfile = None node_compute_sw_state = Multi-user, run level 3 node_compute_sw_other = None #[Fileserver] #[Interconnect] interconnect_fs_syslbl = N/A interconnect_fs_order = 0 interconnect_fs_purpose = N/A interconnect_fs_hw_vendor = N/A interconnect_fs_hw_model = N/A interconnect_fs_hw_switch_fs_model = None interconnect_fs_hw_switch_fs_count = 0 interconnect_fs_hw_switch_fs_ports = 0 interconnect_fs_hw_topo = N/A interconnect_fs_hw_switch_fs_data_rate = N/A interconnect_fs_hw_switch_fs_firmware = N/A ####################################################################### # End of SUT section # If this config file were to be applied to several SUTs, edits would # be needed only ABOVE this point. ###################################################################### # ###################################################################### # The header section of the config file. Must appear # before any instances of "section markers" (see below) # # ext = how the binaries you generated will be identified # tune = specify "base" or "peak" or "all" label = %{label}_%{model} tune = all output_format = all use_submit_for_speed = 1 # Compiler Settings default: AR = ar ARFLAGS = cr CC = mpiicc -cc=icx CXX = mpiicpc -cxx=icx FC = mpiifort -fc=ifx system_class = Homogenous sw_compiler = Intel oneAPI Compiler 2022.2.1 # Compiler Version Flags CC_VERSION_OPTION = --version CXX_VERSION_OPTION = --version FC_VERSION_OPTION = --version # Optimization # Note that SPEC baseline rules require that all uses of a given compiler # use the same flags in the same order. See the SPEChpc Run Rules # for more details # http://www.spec.org/hpc2021/Docs/runrules.html # # OPTIMIZE = flags applicable to all compilers # COPTIMIZE = flags appliable to the C compiler # CXXOPTIMIZE = flags appliable to the C++ compiler # FOPTIMIZE = flags appliable to the Fortran compiler # # See your compiler manual for information on the flags available # for your compiler vec_novec=-no-vec vec_avx2=-xCORE-AVX2 vec_avx512=-xCORE-AVX512 vec_avx512_high=-xCORE-AVX512 -mprefer-vector-width=512 vec_avx512_streaming_stores=-xCORE-AVX512 -mllvm -hir-nontemporal-cacheline-count=0 vec_avx512_high_exp1=-xCORE-AVX512 -mprefer-vector-width=512 -ffast-math vecavx512_high_exp2=-xCORE-AVX512 -mprefer-vector-width=512 -flto vec_avx512_high_exp3=-xCORE-AVX512 -mprefer-vector-width=512 -funroll-loops vec_avx512_high_exp4=-xCORE-AVX512 -mprefer-vector-width=512 -ffast-math -flto -funroll-loops veci_avx512_high_exp5=-xCORE-AVX512 -mprefer-vector-width=512 -ffinite-math-only vec_avx512_high_exp6=-xCORE-AVX512 -mprefer-vector-width=512 -fimf-precision=low:sin,sqrt vec_avx512_high_exp7=-xCORE-AVX512 -mprefer-vector-width=512 -ffinite-math-only -fimf-precision=low:sin,sqrt -ffast-math -flto -funroll-loops vec_common512=-xCOMMON-AVX512 vec=-xCORE-AVX512 -mprefer-vector-width=512 default=base,peak: OPTIMIZE = -Ofast -ipo ${vec} -fiopenmp COPTIMIZE = -ansi-alias CXXOPTIMIZE = -ansi-alias PORTABILITY = -lstdc++ FOPTIMIZE = -nostandard-realloc-lhs -align array64byte mpicmd = mpiexec.hydra -bootstrap ssh -np $ranks -genv OMP_NUM_THREADS=$threads $command submit = $mpicmd default=base=default: ranks = %{RANKS} threads = %{THREADS} %if %{model} eq 'omp' pmodel=OMP %endif 505.lbm_t=peak: ranks=4 threads=40 vec=${vec_avx512_high} pmodel=OMP 513.soma_t=peak: ranks=2 threads=80 vec=${vec_avx512_high} pmodel=OMP 518.tealeaf_t=peak: basepeak=1 519.clvleaf_t=peak: ranks=16 threads=10 vec=${vec_avx512_streaming_stores} pmodel=OMP 521.miniswp_t=peak: ranks=4 threads=40 vec=${vec_avx512_high} pmodel=OMP 528.pot3d_t=peak: ranks=40 threads=4 vec=${vec_avx512_high} pmodel=OMP 532.sph_exa_t=peak: ranks=40 threads=4 vec=${vec_avx512_high_exp1} pmodel=OMP 534.hpgmgfv_t=peak: ranks=8 threads=20 vec=${vec_no_vec} pmodel=OMP 535.weather_t=peak: ranks=40 threads=4 vec=${vec_avx512_streaming_stores} pmodel=OMP 513.soma_t=base,peak: PORTABILITY+=-DSPEC_NO_VAR_ARRAY_REDUCE # The following section was added automatically, and contains settings that # did not appear in the original configuration file, but were added to the # raw file after the run. default: sw_mpi_library000 = Intel MPI Library for Linux* OS, Version 2022.2.1 sw_mpi_library001 = Build 20221020 notes_submit_000 =export LD_PRELOAD="/usr/lib64/libhugetlbfs.so $LD_PRELOAD" notes_submit_005 =export OMP_PROC_BIND=true notes_submit_010 =mpiexec.hydra -bootstrap ssh -hostfile /home/hpc2021/1node --bind-to core -np $ranks -ppn $ppn -genv OMP_NUM_THREADS=$threads $command # The following section was added automatically, and contains settings that # did not appear in the original configuration file, but were added to the # raw file after the run. default: flagsurl000 = http://www.spec.org/hpc2021/flags/Intel-oneAPI-icx2021-official-linux64.xml