The OpenMPI C driver configured for use with the Intel C compiler.
The OpenMPI C++ driver configured for use with the Intel C++ compiler.
The OpenMPI Fortran driver configured for use with the Intel Fortran compiler.
Disable use of reduction with variable array reduction variable (OpenMP 4.5, OpenACC 2.7) even if compiler reports support.
Chooses generally optimal flags for the target platform.
-prec-div improves precision of floating-point divides. It has a slight impact on speed. -no-prec-div disables this option and enables optimizations that give slightly less precise results than full IEEE division.
When you specify -no-prec-div along with some optimizations, such as -xN and -xB (Linux) or /QxN and /QxB (Windows), the compiler may change floating-point division computations into multiplication by the reciprocal of the denominator. For example, A/B is computed as A * (1/B) to improve the speed of the computation.
However, sometimes the value produced by this transformation is not as accurate as full IEEE division. When it is important to have fully precise IEEE division, do not use -no-prec-div which will enable the default -prec-div and the result is more accurate, with some loss of performance.
May generate Intel® AVX2, AVX, SSE4.2, SSE4.1, SSSE3, SSE3, SSE2 and SSE instructions for Intel® procesr. Optimizes for 4th, 5th and 6th generation Intel® Co processors and the Intel® Xeon® Processor E3 v3, E5 v3, E7 v3, E3 v4, E5 v4 and E7 v4 familie Available in compiler versions 13 and later.
Multi-file ip optimizations that includes:
- inline function expansion
- interprocedural constant propogation
- dead code elimination
- propagation of function characteristics
- passing arguments in registers
- loop-invariant code motion
Enable OpenMP compilation for hpc2021.
Enable/disable(DEFAULT) use of ANSI aliasing rules in optimizations; user asserts that the program adheres to these rules.
Chooses generally optimal flags for the target platform.
-prec-div improves precision of floating-point divides. It has a slight impact on speed. -no-prec-div disables this option and enables optimizations that give slightly less precise results than full IEEE division.
When you specify -no-prec-div along with some optimizations, such as -xN and -xB (Linux) or /QxN and /QxB (Windows), the compiler may change floating-point division computations into multiplication by the reciprocal of the denominator. For example, A/B is computed as A * (1/B) to improve the speed of the computation.
However, sometimes the value produced by this transformation is not as accurate as full IEEE division. When it is important to have fully precise IEEE division, do not use -no-prec-div which will enable the default -prec-div and the result is more accurate, with some loss of performance.
May generate Intel® AVX2, AVX, SSE4.2, SSE4.1, SSSE3, SSE3, SSE2 and SSE instructions for Intel® procesr. Optimizes for 4th, 5th and 6th generation Intel® Co processors and the Intel® Xeon® Processor E3 v3, E5 v3, E7 v3, E3 v4, E5 v4 and E7 v4 familie Available in compiler versions 13 and later.
Multi-file ip optimizations that includes:
- inline function expansion
- interprocedural constant propogation
- dead code elimination
- propagation of function characteristics
- passing arguments in registers
- loop-invariant code motion
Enable OpenMP compilation for hpc2021.
Enable/disable(DEFAULT) use of ANSI aliasing rules in optimizations; user asserts that the program adheres to these rules.
Chooses generally optimal flags for the target platform.
-prec-div improves precision of floating-point divides. It has a slight impact on speed. -no-prec-div disables this option and enables optimizations that give slightly less precise results than full IEEE division.
When you specify -no-prec-div along with some optimizations, such as -xN and -xB (Linux) or /QxN and /QxB (Windows), the compiler may change floating-point division computations into multiplication by the reciprocal of the denominator. For example, A/B is computed as A * (1/B) to improve the speed of the computation.
However, sometimes the value produced by this transformation is not as accurate as full IEEE division. When it is important to have fully precise IEEE division, do not use -no-prec-div which will enable the default -prec-div and the result is more accurate, with some loss of performance.
May generate Intel® AVX2, AVX, SSE4.2, SSE4.1, SSSE3, SSE3, SSE2 and SSE instructions for Intel® procesr. Optimizes for 4th, 5th and 6th generation Intel® Co processors and the Intel® Xeon® Processor E3 v3, E5 v3, E7 v3, E3 v4, E5 v4 and E7 v4 familie Available in compiler versions 13 and later.
Multi-file ip optimizations that includes:
- inline function expansion
- interprocedural constant propogation
- dead code elimination
- propagation of function characteristics
- passing arguments in registers
- loop-invariant code motion
Enable OpenMP compilation for hpc2021.
Flag description origin markings:
For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact info@spec.org
Copyright 2021-2022 Standard Performance Evaluation Corporation
Tested with SPEC hpc2021 v1.0.1.
Report generated on 2022-07-26 12:16:27 by SPEC hpc2021 flags formatter v1.0.3 .