SPEC CPU(R)2017 Floating Point Speed Result Cisco Systems Cisco UCS C240 M6 (Intel Xeon Platinum 8362, 2.80GHz) CPU2017 License: 9019 Test date: Nov-2024 Test sponsor: Cisco Systems Hardware availability: Sep-2021 Tested by: Cisco Systems Software availability: Mar-2024 Base Base Base Peak Peak Peak Benchmarks Threads Run Time Ratio Threads Run Time Ratio --------------- ------- --------- --------- ------- --------- --------- 603.bwaves_s 64 85.0 694 S 64 84.7 697 S 603.bwaves_s 64 85.0 694 * 64 84.3 700 * 603.bwaves_s 64 84.0 702 S 64 84.1 702 S 607.cactuBSSN_s 64 58.4 286 * 64 58.4 286 * 607.cactuBSSN_s 64 58.0 287 S 64 58.0 287 S 607.cactuBSSN_s 64 58.4 285 S 64 58.4 285 S 619.lbm_s 64 38.0 138 S 64 38.0 138 S 619.lbm_s 64 35.6 147 * 64 35.6 147 * 619.lbm_s 64 30.7 171 S 64 30.7 171 S 621.wrf_s 64 61.5 215 * 64 61.5 215 * 621.wrf_s 64 61.5 215 S 64 61.5 215 S 621.wrf_s 64 61.9 214 S 64 61.9 214 S 627.cam4_s 64 60.5 147 S 64 61.3 145 * 627.cam4_s 64 60.9 145 * 64 60.5 147 S 627.cam4_s 64 62.5 142 S 64 62.7 141 S 628.pop2_s 64 162 73.4 S 64 162 73.4 S 628.pop2_s 64 163 72.6 S 64 163 72.6 S 628.pop2_s 64 163 72.7 * 64 163 72.7 * 638.imagick_s 64 26.9 535 * 64 26.9 535 * 638.imagick_s 64 27.1 533 S 64 27.1 533 S 638.imagick_s 64 26.8 538 S 64 26.8 538 S 644.nab_s 64 39.0 448 S 64 39.0 448 S 644.nab_s 64 38.9 449 * 64 38.9 449 * 644.nab_s 64 38.7 451 S 64 38.7 451 S 649.fotonik3d_s 64 90.0 101 S 64 90.0 101 S 649.fotonik3d_s 64 90.4 101 S 64 90.4 101 S 649.fotonik3d_s 64 90.3 101 * 64 90.3 101 * 654.roms_s 64 61.8 255 * 64 61.8 255 * 654.roms_s 64 61.3 257 S 64 61.3 257 S 654.roms_s 64 62.5 252 S 64 62.5 252 S ================================================================================= 603.bwaves_s 64 85.0 694 * 64 84.3 700 * 607.cactuBSSN_s 64 58.4 286 * 64 58.4 286 * 619.lbm_s 64 35.6 147 * 64 35.6 147 * 621.wrf_s 64 61.5 215 * 64 61.5 215 * 627.cam4_s 64 60.9 145 * 64 61.3 145 * 628.pop2_s 64 163 72.7 * 64 163 72.7 * 638.imagick_s 64 26.9 535 * 64 26.9 535 * 644.nab_s 64 38.9 449 * 64 38.9 449 * 649.fotonik3d_s 64 90.3 101 * 64 90.3 101 * 654.roms_s 64 61.8 255 * 64 61.8 255 * SPECspeed(R)2017_fp_base 230 SPECspeed(R)2017_fp_peak 230 HARDWARE -------- CPU Name: Intel Xeon Platinum 8362 Max MHz: 3600 Nominal: 2800 Enabled: 64 cores, 2 chips Orderable: 1,2 Chips Cache L1: 32 KB I + 48 KB D on chip per core L2: 1.25 MB I+D on chip per core L3: 48 MB I+D on chip per chip Other: None Memory: 1 TB (16 x 64 GB 2Rx4 PC4-3200AA-R) Storage: 1 x 3.8 TB NVMe SSD Other: CPU Cooling: Air SOFTWARE -------- OS: SUSE Linux Enterprise Server 15 SP5 5.14.21-150500.53-default Compiler: C/C++: Version 2024.1 of Intel oneAPI DPC++/C++ Compiler for Linux; Fortran: Version 2024.1 of Intel Fortran Compiler for Linux; Parallel: Yes Firmware: Version 4.3.2e released Nov-2023 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 64-bit Other: jemalloc memory allocator V5.0.1 Power Management: BIOS set to prefer performance at the cost of additional power usage Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: KMP_AFFINITY = "granularity=fine,compact" LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-64" MALLOC_CONF = "retain:true" OMP_STACKSIZE = "192M" General Notes ------------- Binaries compiled on a system with 2x Intel Xeon Platinum 8280M CPU + 384GB RAM memory using Redhat Enterprise Linux 8.0 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS Settings: Adjacent Cache Line Prefetcher set to Disabled DCU Streamer Prefetch set to Disabled Sub NUMA Clustering set to Enabled LLC Dead Line set to Disabled Memory Refresh Rate set to 1x Refresh ADDDC Sparing set to Disabled Patrol Scrub set to Disabled Intel Hyper-Threading Technology set to Disabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r6732 of 2022-11-07 fe91c89b7ed5c36ae2c92cc097bec197 running on localhost Sun Nov 3 09:10:47 2024 SUT (System Under Test) info as seen by some common utilities. ------------------------------------------------------------ Table of contents ------------------------------------------------------------ 1. uname -a 2. w 3. Username 4. ulimit -a 5. sysinfo process ancestry 6. /proc/cpuinfo 7. lscpu 8. numactl --hardware 9. /proc/meminfo 10. who -r 11. Systemd service manager version: systemd 249 (249.16+suse.171.gdad0071f15) 12. Services, from systemctl list-unit-files 13. Linux kernel boot-time arguments, from /proc/cmdline 14. cpupower frequency-info 15. sysctl 16. /sys/kernel/mm/transparent_hugepage 17. /sys/kernel/mm/transparent_hugepage/khugepaged 18. OS release 19. Disk information 20. /sys/devices/virtual/dmi/id 21. dmidecode 22. BIOS ------------------------------------------------------------ ------------------------------------------------------------ 1. uname -a Linux localhost 5.14.21-150500.53-default #1 SMP PREEMPT_DYNAMIC Wed May 10 07:56:26 UTC 2023 (b630043) x86_64 x86_64 x86_64 GNU/Linux ------------------------------------------------------------ 2. w 09:10:47 up 8:03, 1 user, load average: 5.50, 5.99, 3.54 USER TTY FROM LOGIN@ IDLE JCPU PCPU WHAT root tty1 - 01:08 7:56m 1.62s 0.12s -bash ------------------------------------------------------------ 3. Username From environment variable $USER: root ------------------------------------------------------------ 4. ulimit -a core file size (blocks, -c) unlimited data seg size (kbytes, -d) unlimited scheduling priority (-e) 0 file size (blocks, -f) unlimited pending signals (-i) 4126722 max locked memory (kbytes, -l) 64 max memory size (kbytes, -m) unlimited open files (-n) 1024 pipe size (512 bytes, -p) 8 POSIX message queues (bytes, -q) 819200 real-time priority (-r) 0 stack size (kbytes, -s) unlimited cpu time (seconds, -t) unlimited max user processes (-u) 4126722 virtual memory (kbytes, -v) unlimited file locks (-x) unlimited ------------------------------------------------------------ 5. sysinfo process ancestry /usr/lib/systemd/systemd --switched-root --system --deserialize 34 login -- root -bash -bash runcpu --define default-platform-flags -c ic2024.1-lin-core-avx512-speed-20240308.cfg --define cores=64 --tune all -o all --define drop_caches fpspeed runcpu --define default-platform-flags --configfile ic2024.1-lin-core-avx512-speed-20240308.cfg --define cores=64 --tune all --output_format all --define drop_caches --nopower --runmode speed --tune base:peak --size refspeed fpspeed --nopreenv --note-preenv --logfile $SPEC/tmp/CPU2017.014/templogs/preenv.fpspeed.014.0.log --lognum 014.0 --from_runcpu 2 specperl $SPEC/bin/sysinfo $SPEC = /home/cpu2017 ------------------------------------------------------------ 6. /proc/cpuinfo model name : Intel(R) Xeon(R) Platinum 8362 CPU @ 2.80GHz vendor_id : GenuineIntel cpu family : 6 model : 106 stepping : 6 microcode : 0xd0003b9 bugs : spectre_v1 spectre_v2 spec_store_bypass swapgs mmio_stale_data eibrs_pbrsb cpu cores : 32 siblings : 32 2 physical ids (chips) 64 processors (hardware threads) physical id 0: core ids 0-31 physical id 1: core ids 0-31 physical id 0: apicids 0,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62 physical id 1: apicids 128,130,132,134,136,138,140,142,144,146,148,150,152,154,156,158,160,162,164,166,168,170,172,174,176,178,1 80,182,184,186,188,190 Caution: /proc/cpuinfo data regarding chips, cores, and threads is not necessarily reliable, especially for virtualized systems. Use the above data carefully. ------------------------------------------------------------ 7. lscpu From lscpu from util-linux 2.37.4: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Address sizes: 46 bits physical, 57 bits virtual Byte Order: Little Endian CPU(s): 64 On-line CPU(s) list: 0-63 Vendor ID: GenuineIntel Model name: Intel(R) Xeon(R) Platinum 8362 CPU @ 2.80GHz CPU family: 6 Model: 106 Thread(s) per core: 1 Core(s) per socket: 32 Socket(s): 2 Stepping: 6 CPU max MHz: 3600.0000 CPU min MHz: 800.0000 BogoMIPS: 5600.00 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 invpcid_single intel_ppin ssbd mba ibrs ibpb stibp ibrs_enhanced fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a avx512f avx512dq rdseed adx smap avx512ifma clflushopt clwb intel_pt avx512cd sha_ni avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local split_lock_detect wbnoinvd dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req avx512vbmi umip pku ospke avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg tme avx512_vpopcntdq la57 rdpid fsrm md_clear pconfig flush_l1d arch_capabilities L1d cache: 3 MiB (64 instances) L1i cache: 2 MiB (64 instances) L2 cache: 80 MiB (64 instances) L3 cache: 96 MiB (2 instances) NUMA node(s): 4 NUMA node0 CPU(s): 0-15 NUMA node1 CPU(s): 16-31 NUMA node2 CPU(s): 32-47 NUMA node3 CPU(s): 48-63 Vulnerability Itlb multihit: Not affected Vulnerability L1tf: Not affected Vulnerability Mds: Not affected Vulnerability Meltdown: Not affected Vulnerability Mmio stale data: Mitigation; Clear CPU buffers; SMT disabled Vulnerability Retbleed: Not affected Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl and seccomp Vulnerability Spectre v1: Mitigation; usercopy/swapgs barriers and __user pointer sanitization Vulnerability Spectre v2: Mitigation; Enhanced IBRS, IBPB conditional, RSB filling, PBRSB-eIBRS SW sequence Vulnerability Srbds: Not affected Vulnerability Tsx async abort: Not affected From lscpu --cache: NAME ONE-SIZE ALL-SIZE WAYS TYPE LEVEL SETS PHY-LINE COHERENCY-SIZE L1d 48K 3M 12 Data 1 64 1 64 L1i 32K 2M 8 Instruction 1 64 1 64 L2 1.3M 80M 20 Unified 2 1024 1 64 L3 48M 96M 12 Unified 3 65536 1 64 ------------------------------------------------------------ 8. numactl --hardware NOTE: a numactl 'node' might or might not correspond to a physical chip. available: 4 nodes (0-3) node 0 cpus: 0-15 node 0 size: 257600 MB node 0 free: 253648 MB node 1 cpus: 16-31 node 1 size: 258043 MB node 1 free: 253081 MB node 2 cpus: 32-47 node 2 size: 258043 MB node 2 free: 257647 MB node 3 cpus: 48-63 node 3 size: 258022 MB node 3 free: 256598 MB node distances: node 0 1 2 3 0: 10 11 20 20 1: 11 10 20 20 2: 20 20 10 11 3: 20 20 11 10 ------------------------------------------------------------ 9. /proc/meminfo MemTotal: 1056471844 kB ------------------------------------------------------------ 10. who -r run-level 3 Nov 3 01:08 ------------------------------------------------------------ 11. Systemd service manager version: systemd 249 (249.16+suse.171.gdad0071f15) Default Target Status multi-user running ------------------------------------------------------------ 12. Services, from systemctl list-unit-files STATE UNIT FILES enabled YaST2-Firstboot YaST2-Second-Stage apparmor auditd cron getty@ irqbalance issue-generator kbdsettings klog lvm2-monitor nscd nvmefc-boot-connections postfix purge-kernels rollback rsyslog smartd sshd systemd-pstore wicked wickedd-auto4 wickedd-dhcp4 wickedd-dhcp6 wickedd-nanny enabled-runtime systemd-remount-fs disabled autofs autoyast-initscripts blk-availability boot-sysctl ca-certificates chrony-wait chronyd console-getty cups cups-browsed debug-shell ebtables exchange-bmc-os-info firewalld gpm grub2-once haveged haveged-switch-root hv_fcopy_daemon hv_kvp_daemon hv_vss_daemon ipmi ipmievd issue-add-ssh-keys kexec-load ksm kvm_stat lunmask man-db-create multipathd nfs nfs-blkmap nvmf-autoconnect rpcbind rpmconfigcheck rsyncd rtkit-daemon serial-getty@ smartd_generate_opts snmpd snmptrapd svnserve systemd-boot-check-no-failures systemd-network-generator systemd-sysext systemd-time-wait-sync systemd-timesyncd udisks2 indirect wickedd ------------------------------------------------------------ 13. Linux kernel boot-time arguments, from /proc/cmdline BOOT_IMAGE=/boot/vmlinuz-5.14.21-150500.53-default root=UUID=0c80fe8e-c9ae-48cd-9b3c-c0523ce54286 splash=silent resume=/dev/disk/by-uuid/fd7dae2b-cd72-4c83-b8d2-1869eff1d12c mitigations=auto quiet security=apparmor ------------------------------------------------------------ 14. cpupower frequency-info analyzing CPU 0: current policy: frequency should be within 800 MHz and 3.60 GHz. The governor "powersave" may decide which speed to use within this range. boost state support: Supported: yes Active: yes ------------------------------------------------------------ 15. sysctl kernel.numa_balancing 1 kernel.randomize_va_space 1 vm.compaction_proactiveness 20 vm.dirty_background_bytes 0 vm.dirty_background_ratio 10 vm.dirty_bytes 0 vm.dirty_expire_centisecs 3000 vm.dirty_ratio 8 vm.dirty_writeback_centisecs 500 vm.dirtytime_expire_seconds 43200 vm.extfrag_threshold 500 vm.min_unmapped_ratio 1 vm.nr_hugepages 0 vm.nr_hugepages_mempolicy 0 vm.nr_overcommit_hugepages 0 vm.swappiness 1 vm.watermark_boost_factor 15000 vm.watermark_scale_factor 10 vm.zone_reclaim_mode 1 ------------------------------------------------------------ 16. /sys/kernel/mm/transparent_hugepage defrag [always] defer defer+madvise madvise never enabled [always] madvise never hpage_pmd_size 2097152 shmem_enabled always within_size advise [never] deny force ------------------------------------------------------------ 17. /sys/kernel/mm/transparent_hugepage/khugepaged alloc_sleep_millisecs 60000 defrag 1 max_ptes_none 511 max_ptes_shared 256 max_ptes_swap 64 pages_to_scan 4096 scan_sleep_millisecs 10000 ------------------------------------------------------------ 18. OS release From /etc/*-release /etc/*-version os-release SUSE Linux Enterprise Server 15 SP5 ------------------------------------------------------------ 19. Disk information SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/nvme0n1p3 xfs 2.5T 22G 2.5T 1% /home ------------------------------------------------------------ 20. /sys/devices/virtual/dmi/id Vendor: Cisco Systems Inc Product: UCSC-C240-M6SN Serial: WZP26070X33 ------------------------------------------------------------ 21. dmidecode Additional information from dmidecode 3.4 follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 16x 0xCE00 M393A8G40AB2-CWE 64 GB 2 rank 3200 ------------------------------------------------------------ 22. BIOS (This section combines info from /sys/devices and dmidecode.) BIOS Vendor: Cisco Systems, Inc. BIOS Version: C240M6.4.3.2e.0.1130231848 BIOS Date: 11/30/2023 BIOS Revision: 5.22 Compiler Version Notes ---------------------- ============================================================================================================ C | 619.lbm_s(base, peak) 638.imagick_s(base, peak) 644.nab_s(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2024.1.0 Build 20240308 Copyright (C) 1985-2024 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ C++, C, Fortran | 607.cactuBSSN_s(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2024.1.0 Build 20240308 Copyright (C) 1985-2024 Intel Corporation. All rights reserved. Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2024.1.0 Build 20240308 Copyright (C) 1985-2024 Intel Corporation. All rights reserved. Intel(R) Fortran Compiler for applications running on Intel(R) 64, Version 2024.1.0 Build 20240308 Copyright (C) 1985-2024 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ Fortran | 603.bwaves_s(base, peak) 649.fotonik3d_s(base, peak) 654.roms_s(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) Fortran Compiler for applications running on Intel(R) 64, Version 2024.1.0 Build 20240308 Copyright (C) 1985-2024 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ Fortran, C | 621.wrf_s(base, peak) 627.cam4_s(base, peak) 628.pop2_s(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) Fortran Compiler for applications running on Intel(R) 64, Version 2024.1.0 Build 20240308 Copyright (C) 1985-2024 Intel Corporation. All rights reserved. Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2024.1.0 Build 20240308 Copyright (C) 1985-2024 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icx Fortran benchmarks: ifx Benchmarks using both Fortran and C: ifx icx Benchmarks using Fortran, C, and C++: icpx icx ifx Base Portability Flags ---------------------- 603.bwaves_s: -DSPEC_LP64 607.cactuBSSN_s: -DSPEC_LP64 619.lbm_s: -DSPEC_LP64 621.wrf_s: -DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian 627.cam4_s: -DSPEC_LP64 -DSPEC_CASE_FLAG 628.pop2_s: -DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian -assume byterecl 638.imagick_s: -DSPEC_LP64 644.nab_s: -DSPEC_LP64 649.fotonik3d_s: -DSPEC_LP64 654.roms_s: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -w -std=c11 -m64 -Wl,-z,muldefs -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP -Wno-implicit-int -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc Fortran benchmarks: -w -m64 -Wl,-z,muldefs -DSPEC_OPENMP -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -fiopenmp -nostandard-realloc-lhs -align array32byte -auto -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc Benchmarks using both Fortran and C: -w -m64 -std=c11 -Wl,-z,muldefs -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP -Wno-implicit-int -nostandard-realloc-lhs -align array32byte -auto -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc Benchmarks using Fortran, C, and C++: -w -std=c++14 -m64 -std=c11 -Wl,-z,muldefs -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP -Wno-implicit-int -nostandard-realloc-lhs -align array32byte -auto -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc Peak Compiler Invocation ------------------------ C benchmarks: icx Fortran benchmarks: ifx Benchmarks using both Fortran and C: ifx icx Benchmarks using Fortran, C, and C++: icpx icx ifx Peak Portability Flags ---------------------- Same as Base Portability Flags Peak Optimization Flags ----------------------- C benchmarks: 619.lbm_s: basepeak = yes 638.imagick_s: basepeak = yes 644.nab_s: basepeak = yes Fortran benchmarks: 603.bwaves_s: -w -m64 -Wl,-z,muldefs -DSPEC_OPENMP -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -fiopenmp -nostandard-realloc-lhs -align array32byte -auto -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc 649.fotonik3d_s: basepeak = yes 654.roms_s: basepeak = yes Benchmarks using both Fortran and C: 621.wrf_s: basepeak = yes 627.cam4_s: -w -m64 -std=c11 -Wl,-z,muldefs -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP -Wno-implicit-int -nostandard-realloc-lhs -align array32byte -auto -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc 628.pop2_s: basepeak = yes Benchmarks using Fortran, C, and C++: 607.cactuBSSN_s: basepeak = yes The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic2024-official-linux64.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.0-ICX-revl.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic2024-official-linux64.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.0-ICX-revl.xml SPEC CPU and SPECspeed are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2024 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.9 on 2024-11-03 09:10:47-0500. Report generated on 2024-11-20 11:15:37 by CPU2017 text formatter v6255. Originally published on 2024-11-19.