SPEC CPU(R)2017 Integer Rate Result Lenovo Global Technology ThinkSystem SR630 V3 (2.50 GHz, Intel Xeon Gold 6426Y) CPU2017 License: 9017 Test date: Jan-2023 Test sponsor: Lenovo Global Technology Hardware availability: Feb-2023 Tested by: Lenovo Global Technology Software availability: Jun-2022 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 64 442 231 * 64 415 246 S 500.perlbench_r 64 441 231 S 64 414 246 * 500.perlbench_r 64 442 231 S 64 414 246 S 502.gcc_r 64 322 281 S 64 279 325 * 502.gcc_r 64 315 288 S 64 279 325 S 502.gcc_r 64 317 286 * 64 279 324 S 505.mcf_r 64 190 544 S 64 190 544 S 505.mcf_r 64 190 543 * 64 190 543 * 505.mcf_r 64 191 542 S 64 191 542 S 520.omnetpp_r 64 371 226 * 64 371 226 * 520.omnetpp_r 64 374 224 S 64 374 224 S 520.omnetpp_r 64 371 226 S 64 371 226 S 523.xalancbmk_r 64 111 611 S 64 111 611 S 523.xalancbmk_r 64 110 614 S 64 110 614 S 523.xalancbmk_r 64 110 613 * 64 110 613 * 525.x264_r 64 181 620 S 64 171 655 S 525.x264_r 64 181 620 * 64 171 656 S 525.x264_r 64 181 620 S 64 171 656 * 531.deepsjeng_r 64 320 229 * 64 320 229 * 531.deepsjeng_r 64 320 229 S 64 320 229 S 531.deepsjeng_r 64 320 229 S 64 320 229 S 541.leela_r 64 496 214 * 64 496 214 * 541.leela_r 64 497 213 S 64 497 213 S 541.leela_r 64 495 214 S 64 495 214 S 548.exchange2_r 64 323 519 * 64 323 519 * 548.exchange2_r 64 322 520 S 64 322 520 S 548.exchange2_r 64 323 519 S 64 323 519 S 557.xz_r 64 462 149 S 64 462 149 S 557.xz_r 64 466 148 * 64 466 148 * 557.xz_r 64 467 148 S 64 467 148 S ================================================================================= 500.perlbench_r 64 442 231 * 64 414 246 * 502.gcc_r 64 317 286 * 64 279 325 * 505.mcf_r 64 190 543 * 64 190 543 * 520.omnetpp_r 64 371 226 * 64 371 226 * 523.xalancbmk_r 64 110 613 * 64 110 613 * 525.x264_r 64 181 620 * 64 171 656 * 531.deepsjeng_r 64 320 229 * 64 320 229 * 541.leela_r 64 496 214 * 64 496 214 * 548.exchange2_r 64 323 519 * 64 323 519 * 557.xz_r 64 466 148 * 64 466 148 * SPECrate(R)2017_int_base 321 SPECrate(R)2017_int_peak 329 HARDWARE -------- CPU Name: Intel Xeon Gold 6426Y Max MHz: 4100 Nominal: 2500 Enabled: 32 cores, 2 chips, 2 threads/core Orderable: 1,2 chips Cache L1: 32 KB I + 48 KB D on chip per core L2: 2 MB I+D on chip per core L3: 37.5 MB I+D on chip per chip Other: None Memory: 512 GB (16 x 32 GB 2Rx8 PC5-4800B-R) Storage: 1 x 960 GB SATA SSD Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 15 SP4 (x86_64) Kernel 5.14.21-150400.22-default Compiler: C/C++: Version 2022.1 of Intel oneAPI DPC++/C++ Compiler for Linux; Fortran: Version 2022.1 of Intel Fortran Compiler for Linux; Parallel: No Firmware: Lenovo BIOS Version ESE109L 1.10 released Jan-2023 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc memory allocator V5.0.1 Power Management: BIOS and OS set to prefer performance at the cost of additional power usage Compiler Notes -------------- SPEC has ruled that the compiler used for this result was performing a compilation that specifically improves the performance of the 523.xalancbmk_r / 623.xalancbmk_s benchmarks using a priori knowledge of the SPEC code and dataset to perform a transformation that has narrow applicability. In order to encourage optimizations that have wide applicability (see rule 1.4 https://www.spec.org/cpu2017/Docs/runrules.html#rule_1.4), SPEC will no longer publish results using this optimization. This result is left in the SPEC results database for historical reference. Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017-1.1.8-ic2022.1/lib/intel64:/home/cpu2017-1.1.8-ic2022.1/lib/ia32:/home/cpu2017-1.1.8-ic 2022.1/je5.0.1-32" MALLOC_CONF = "retain:true" General Notes ------------- Binaries compiled on a system with 2x Intel Xeon Platinum 8280M CPU + 384GB RAM memory using Red Hat Enterprise Linux 8.4 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS configuration: Choose Operating Mode set to Maximum Performance and then set it to Custom Mode SNC set to SNC2 LLC Prefetch set to Disabled UPI Link Disable set to Disabled 1 Link C-state set to Legacy Sysinfo program /home/cpu2017-1.1.8-ic2022.1/bin/sysinfo Rev: r6622 of 2021-04-07 982a61ec0915b55891ef0e16acafc64d running on localhost Sun Jan 15 19:12:44 2023 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6426Y 2 "physical id"s (chips) 64 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 16 siblings : 32 physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 From lscpu from util-linux 2.37.2: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Address sizes: 46 bits physical, 57 bits virtual Byte Order: Little Endian CPU(s): 64 On-line CPU(s) list: 0-63 Vendor ID: GenuineIntel Model name: Intel(R) Xeon(R) Gold 6426Y CPU family: 6 Model: 143 Thread(s) per core: 2 Core(s) per socket: 16 Socket(s): 2 Stepping: 8 BogoMIPS: 5000.00 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cat_l2 cdp_l3 invpcid_single intel_ppin cdp_l2 ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a avx512f avx512dq rdseed adx smap avx512ifma clflushopt clwb intel_pt avx512cd sha_ni avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local split_lock_detect avx_vnni avx512_bf16 wbnoinvd dtherm ida arat pln pts avx512vbmi umip pku ospke waitpkg avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg tme avx512_vpopcntdq la57 rdpid bus_lock_detect cldemote movdiri movdir64b enqcmd fsrm md_clear serialize tsxldtrk pconfig arch_lbr avx512_fp16 amx_tile flush_l1d arch_capabilities Virtualization: VT-x L1d cache: 1.5 MiB (32 instances) L1i cache: 1 MiB (32 instances) L2 cache: 64 MiB (32 instances) L3 cache: 75 MiB (2 instances) NUMA node(s): 4 NUMA node0 CPU(s): 0-7,32-39 NUMA node1 CPU(s): 8-15,40-47 NUMA node2 CPU(s): 16-23,48-55 NUMA node3 CPU(s): 24-31,56-63 Vulnerability Itlb multihit: Not affected Vulnerability L1tf: Not affected Vulnerability Mds: Not affected Vulnerability Meltdown: Not affected Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl and seccomp Vulnerability Spectre v1: Mitigation; usercopy/swapgs barriers and __user pointer sanitization Vulnerability Spectre v2: Mitigation; Enhanced IBRS, IBPB conditional, RSB filling Vulnerability Srbds: Not affected Vulnerability Tsx async abort: Not affected From lscpu --cache: NAME ONE-SIZE ALL-SIZE WAYS TYPE LEVEL SETS PHY-LINE COHERENCY-SIZE L1d 48K 1.5M 12 Data 1 64 1 64 L1i 32K 1M 8 Instruction 1 64 1 64 L2 2M 64M 16 Unified 2 2048 1 64 L3 37.5M 75M 15 Unified 3 40960 1 64 /proc/cpuinfo cache data cache size : 38400 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 4 nodes (0-3) node 0 cpus: 0 1 2 3 4 5 6 7 32 33 34 35 36 37 38 39 node 0 size: 128683 MB node 0 free: 127718 MB node 1 cpus: 8 9 10 11 12 13 14 15 40 41 42 43 44 45 46 47 node 1 size: 128985 MB node 1 free: 128322 MB node 2 cpus: 16 17 18 19 20 21 22 23 48 49 50 51 52 53 54 55 node 2 size: 129019 MB node 2 free: 128401 MB node 3 cpus: 24 25 26 27 28 29 30 31 56 57 58 59 60 61 62 63 node 3 size: 128991 MB node 3 free: 128320 MB node distances: node 0 1 2 3 0: 10 12 21 21 1: 12 10 21 21 2: 21 21 10 12 3: 21 21 12 10 From /proc/meminfo MemTotal: 528056312 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* os-release: NAME="SLES" VERSION="15-SP4" VERSION_ID="15.4" PRETTY_NAME="SUSE Linux Enterprise Server 15 SP4" ID="sles" ID_LIKE="suse" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:15:sp4" uname -a: Linux localhost 5.14.21-150400.22-default #1 SMP PREEMPT_DYNAMIC Wed May 11 06:57:18 UTC 2022 (49db222) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-12207 (iTLB Multihit): Not affected CVE-2018-3620 (L1 Terminal Fault): Not affected Microarchitectural Data Sampling: Not affected CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: usercopy/swapgs barriers and __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Enhanced IBRS, IBPB: conditional, RSB filling CVE-2020-0543 (Special Register Buffer Data Sampling): Not affected CVE-2019-11135 (TSX Asynchronous Abort): Not affected run-level 3 Jan 15 18:11 SPEC is set to: /home/cpu2017-1.1.8-ic2022.1 Filesystem Type Size Used Avail Use% Mounted on /dev/sda2 xfs 894G 25G 870G 3% / From /sys/devices/virtual/dmi/id Vendor: Lenovo Product: ThinkSystem SR630 V3 MB,EGS,DDR5,NY,1U Product Family: ThinkSystem Serial: 1234567890 Additional information from dmidecode 3.2 follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 2x Samsung M321R4GA3BB0-CQKMG 32 GB 2 rank 4800 14x Samsung M321R4GA3BB0-CQKVG 32 GB 2 rank 4800 BIOS: BIOS Vendor: Lenovo BIOS Version: ESE109L-1.10 BIOS Date: 01/07/2023 BIOS Revision: 1.10 Firmware Revision: 1.0 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================================================ C | 502.gcc_r(peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on IA-32, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) 525.x264_r(base, peak) | 557.xz_r(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ C | 502.gcc_r(peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on IA-32, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) 525.x264_r(base, peak) | 557.xz_r(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ C++ | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base, peak) 531.deepsjeng_r(base, peak) | 541.leela_r(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ Fortran | 548.exchange2_r(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) Fortran Compiler for applications running on Intel(R) 64, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icx C++ benchmarks: icpx Fortran benchmarks: ifx Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -w -std=c11 -m64 -Wl,-z,muldefs -xCORE-AVX512 -O3 -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc C++ benchmarks: -w -m64 -Wl,-z,muldefs -xCORE-AVX512 -O3 -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc Fortran benchmarks: -w -m64 -Wl,-z,muldefs -xCORE-AVX512 -O3 -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -auto -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc Peak Compiler Invocation ------------------------ C benchmarks: icx C++ benchmarks: icpx Fortran benchmarks: ifx Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -w -std=c11 -m64 -Wl,-z,muldefs -fprofile-generate(pass 1) -fprofile-use=default.profdata(pass 2) -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -fno-strict-overflow -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc 502.gcc_r: -m32 -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/ia32_lin -std=gnu89 -Wl,-z,muldefs -fprofile-generate(pass 1) -fprofile-use=default.profdata(pass 2) -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/jemalloc32-5.0.1/lib -ljemalloc 505.mcf_r: basepeak = yes 525.x264_r: -w -std=c11 -m64 -Wl,-z,muldefs -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -fno-alias -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc 557.xz_r: basepeak = yes C++ benchmarks: 520.omnetpp_r: basepeak = yes 523.xalancbmk_r: basepeak = yes 531.deepsjeng_r: basepeak = yes 541.leela_r: basepeak = yes Fortran benchmarks: 548.exchange2_r: basepeak = yes The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Lenovo-Platform-SPECcpu2017-Flags-V1.2-Eaglestream-N.html http://www.spec.org/cpu2017/flags/Intel-ic2022-official-linux64_revA.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Lenovo-Platform-SPECcpu2017-Flags-V1.2-Eaglestream-N.xml http://www.spec.org/cpu2017/flags/Intel-ic2022-official-linux64_revA.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2024 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.8 on 2023-01-15 06:12:44-0500. Report generated on 2024-01-29 17:20:40 by CPU2017 text formatter v6255. Originally published on 2023-02-01.