# Invocation command line: # /home/lijq/bin/harness/runcpu --nobuild --reportable --iterations 3 --define default-platform-flags --configfile ic2022.1-lin-core-avx512-speed-20220316.cfg --define cores=112 --tune base,peak --output_format all --define drop_caches --nopower --runmode speed --tune base:peak --size refspeed fpspeed # output_root was not used for this run ############################################################################ #------------------------------------------------------------------------------ # This is a sample SPEC CPU2017 config file. It is applicable for: # # Compiler name/version: Intel(R) C/C++ and Fortran 2021 Compilers for Linux # Operating system version: Red Hat Enterprise Linux 8.4, GLIBC 2.28 # ld version: GNU ld version 2.30 and above (older version may not work) # Hardware: Intel(R) processors supporting CORE-AVX512 tuning # # If you wish to build your own: # (1) Copy this to a new name # cd %SPEC%/config # copy this.cfg that.cfg # (2) Change items that are marked 'EDIT' (search for it) # # If you have different software or hardware, this config file may not work. # You may find a better config file for your system next to posted results: # http://www.spec.org/cpu2017/results # # Compiler issues: Contact your compiler vendor, not SPEC. # For SPEC help: http://www.spec.org/auto/cpu2017/Docs/techsupport.html #------------------------------------------------------------------------------ #--------- Preprocessor ------------------------------------------------------- # # Optionally edit if you wish: %define build_ncpus 8 # controls number of simultaneous compiles # Used to date the label %define version 20220316 # Used for the optimization tuning part of the label (not required) %if defined(%{noopt}) %define opt_label -noopt %elif defined(%{medopt}) %define opt_label -medopt %else %define opt_label %endif # Used for labeling static linked builds (not required) %if defined(%{static}) %define static_label -static %else %define static_label %endif #--------- Label -------------------------------------------------------------- # Arbitrary string, tags your binaries & directories. # Two Suggestions: # (1) Change this label as you try new ideas. label = ic2022.1-lin-core-avx512-speed%{opt_label}%{static_label}-%{version} # (2) Make the label meaningful to YOU. #--------- Global Settings ---------------------------------------------------- # For info, see: # https://www.spec.org/auto/cpu2017/Docs/config.html#fieldname XXX # Example: https://www.spec.org/auto/cpu2017/Docs/config.html#tune ######################################################## # ATTENTION ATTENTION ATTENTION ######################################################## # # NOTE If you change fail_build then PLEASE also # change the line 'define version', because # SPEC review tools use 'label' to track binaries. # ######################################################## # # vvvvvvvvvvvv # do not change unless you read NOTE above fail_build=1 # do not change unless you read NOTE above # ^^^^^^^^^^^^ # do not change unless you read NOTE above # ######################################################## # action = validate command_add_redirect = 1 line_width = 1020 log_line_width = 1020 makeflags = -j%{build_ncpus} output_format = txt,cfg,pdf,csv preenv = 1 tune = base bench_post_setup = sync parallel_test = 1 mean_anyway = 1 reportable = 1 # Set some environment variables preENV_OMP_STACKSIZE = 192M %ifdef %{intspeedaffinity} preENV_KMP_AFFINITY = granularity=fine,scatter %else %if defined(%{smt-on}) preENV_KMP_AFFINITY = granularity=fine,compact,1,0 %else preENV_KMP_AFFINITY = granularity=fine,compact %endif %endif #Reference the flags files flagsurl000=http://www.spec.org/cpu2017/flags/Nettrix-Platform-Settings-V1.3-SPR-revA.xml %ifdef %{default-platform-flags} flagsurl001=http://www.spec.org/cpu2017/flags/Intel-ic2022-official-linux64_revA.xml %endif # Set some environment variables # Retain unused virtual memory for later reuse. This avoids out of memory errors for certain benchmarks. preENV_MALLOC_CONF = retain:true intspeed: preENV_LD_LIBRARY_PATH = $[top]/lib/intel64:$[top]/je5.0.1-64 fpspeed: preENV_LD_LIBRARY_PATH = $[top]/lib/intel64:$[top]/je5.0.1-64 #--------- Compilers ---------------------------------------------------------- intspeed,fpspeed: CC = icx -m64 -std=c11 CXX = icpx -m64 FC = ifx -m64 # How to say "Show me your version, please" CC_VERSION_OPTION = -V CXX_VERSION_OPTION = -V FC_VERSION_OPTION = -V JEMALLOC32_DIR = /usr/local/jemalloc32-5.0.1/lib JEMALLOC64_DIR = /usr/local/jemalloc64-5.0.1/lib INTEL64_DIR = /usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin/ %if !defined(%{static}) JEMALLOC32 = jemalloc JEMALLOC64 = jemalloc QKMALLOC = qkmalloc %else JEMALLOC32 = libjemalloc.a JEMALLOC64 = libjemalloc.a %endif #--------- Portability -------------------------------------------------------- intspeed,fpspeed: PORTABILITY = -DSPEC_LP64 600.perlbench_s: CPORTABILITY = -DSPEC_LINUX_X64 621.wrf_s: CPORTABILITY = -DSPEC_CASE_FLAG FPORTABILITY = -convert big_endian 623.xalancbmk_s: CXXPORTABILITY= -DSPEC_LINUX 627.cam4_s: CPORTABILITY= -DSPEC_CASE_FLAG 628.pop2_s: CPORTABILITY = -DSPEC_CASE_FLAG FPORTABILITY = -convert big_endian -assume byterecl #--------- How Many CPUs? ----------------------------------------------------- # Both SPECrate and SPECspeed can test multiple chips / cores / hw threads # - For SPECspeed, you set the number of threads. # See: https://www.spec.org/cpu2017/Docs/system-requirements.html#MultipleCPUs # # q. How many should I set? # a. Unknown, you will have to try it and see! # # To get you started, some suggestions: # # threads - This config file sets a starting point. You could try raising # it. A higher thread count is much more likely to be useful for # fpspeed than for intspeed. # default: %if !defined(%{cores}) %error please add --define cores=[ncores] to runcpu invocation %endif threads = %{cores} # EDIT to change number of OpenMP threads (see above) %ifdef %{smt-on} %define numpeakthreads %{cores} * 2 %endif intspeed: %define numxzthreads %{cores} * 2 %ifdef %{smt-on} threads = %{numxzthreads} %else threads = %{cores} %endif #-------- Tuning Flags ---------------------------------------------- intrate,fprate: #reconsider using a rate config file instead of a speed config file fail=1 intspeed: SSE = -xCORE-AVX512 EXTRA_FOPTIMIZE = -nostandard-realloc-lhs -align array32byte EXTRA_LIBS = -L$(JEMALLOC64_DIR) -l$(JEMALLOC64) EXTRA_LDFLAGS = -Wl,-z,muldefs intspeed_any_cpp: EXTRA_LIBS = -L$(INTEL64_DIR) -l$(QKMALLOC) EXTRA_LDFLAGS = -Wl,-z,muldefs intspeed=base: %if defined(%{noopt}) OPT_ROOT = -O0 %elif defined(%{medopt}) OPT_ROOT = -O2 %else OPT_ROOT = -O3 -ffast-math -flto -mfpmath=sse -funroll-loops OPT_ROOT_F = -O3 -ffast-math -flto -mfpmath=sse -funroll-loops %endif FAST_NO_STATIC = $(SSE) $(OPT_ROOT) FORT_FAST_NO_STATIC = $(SSE) $(OPT_ROOT_F) FAST = $(SSE) $(OPT_ROOT) -static FORT_FAST = $(SSEF) $(OPT_ROOT_F) -static %if !defined(%{static}) COPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 FOPTIMIZE = $(FORT_FAST_NO_STATIC) -qopt-mem-layout-trans=4 %if defined(%{noopt}) COPTIMIZE = $(OPT_ROOT) -fiopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(OPT_ROOT) FOPTIMIZE = $(OPT_ROOT_F) %endif %else COPTIMIZE = $(FAST) -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(FAST) -qopt-mem-layout-trans=4 FOPTIMIZE = $(FORT_FAST) -qopt-mem-layout-trans=4 %if defined(%{noopt}) COPTIMIZE = $(OPT_ROOT) -static -fiopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(OPT_ROOT) -static FOPTIMIZE = $(OPT_ROOT_F) -static %endif %endif fpspeed: SSE = -xCORE-AVX512 EXTRA_FOPTIMIZE = -nostandard-realloc-lhs -align array32byte -auto EXTRA_LIBS = -L$(JEMALLOC64_DIR) -l$(JEMALLOC64) EXTRA_LDFLAGS = -Wl,-z,muldefs fpspeed=base: %if defined(%{noopt}) OPT_ROOT = -O0 %elif defined(%{medopt}) OPT_ROOT = -O2 %else OPT_ROOT = -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops %endif FAST_NO_STATIC = $(SSE) $(OPT_ROOT) FORT_FAST_NO_STATIC = $(SSE) $(OPT_ROOT) FAST = $(SSE) $(OPT_ROOT) -static FORT_FAST = $(SSE) $(OPT_ROOT) -static %if !defined(%{static}) COPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP FOPTIMIZE = $(FORT_FAST_NO_STATIC) -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP %if defined(%{noopt}) COPTIMIZE = $(OPT_ROOT) -fiopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(OPT_ROOT) -fiopenmp -DSPEC_OPENMP FOPTIMIZE = $(OPT_ROOT) -fiopenmp -DSPEC_OPENMP %endif %else COPTIMIZE = $(FAST) -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(FAST) -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP FOPTIMIZE = $(FORT_FAST) -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP %if defined(%{noopt}) COPTIMIZE = $(OPT_ROOT) -fiopenmp -DSPEC_OPENMP -static CXXOPTIMIZE = $(OPT_ROOT) -fiopenmp -DSPEC_OPENMP -static FOPTIMIZE = $(OPT_ROOT) -fiopenmp -DSPEC_OPENMP -static %endif %endif intspeed=peak: %if defined(%{noopt}) || defined(%{medopt}) #not building or executing peak against less opt fail=1 %endif OPT_ROOT = -O3 -ffast-math -flto -mfpmath=sse -funroll-loops FAST_NO_STATIC = $(SSE) $(OPT_ROOT) COPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 FOPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 PASS1_CFLAGS = -fprofile-generate #-xCORE-AVX512 -flto -Ofast PASS2_CFLAGS = -fprofile-use=default.profdata PASS1_FFLAGS = -fprofile-generate #-xCORE-AVX512 -flto -Ofast PASS2_FFLAGS = -fprofile-use=default.profdata PASS1_CXXFLAGS = -fprofile-generate #-xCORE-AVX512 -flto -Ofast PASS2_CXXFLAGS = -fprofile-use=default.profdata PASS1_LDFLAGS = -fprofile-generate #-xCORE-AVX512 -flto -Ofast PASS2_LDFLAGS = -fprofile-use=default.profdata fdo_run1 = $command ; llvm-profdata merge -output=default.profdata *.profraw 600.perlbench_s=peak=default: EXTRA_OPTIMIZE = -fno-strict-overflow 625.x264_s=peak: feedback = 0 EXTRA_OPTIMIZE = -fno-alias 605.mcf_s,620.omnetpp_s,623.xalancbmk_s,631.deepsjeng_s,648.exchange2_s,641.leela_s,657.xz_s=peak: basepeak=1 fpspeed=peak: %if defined(%{noopt}) || defined(%{medopt}) #not building or executing peak against less opt fail=1 %endif OPT_ROOT = -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops FAST_NO_STATIC = $(SSE) $(OPT_ROOT) COPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP FOPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 -fiopenmp -DSPEC_OPENMP PASS1_CFLAGS = -fprofile-generate #-xCORE-AVX512 -flto -Ofast PASS2_CFLAGS = -fprofile-use=default.profdata PASS1_FFLAGS = -fprofile-generate #-xCORE-AVX512 -flto -Ofast PASS2_FFLAGS = -fprofile-use=default.profdata PASS1_CXXFLAGS = -fprofile-generate #-xCORE-AVX512 -flto -Ofast PASS2_CXXFLAGS = -fprofile-use=default.profdata PASS1_LDFLAGS = -fprofile-generate #-xCORE-AVX512 -flto -Ofast PASS2_LDFLAGS = -fprofile-use=default.profdata fdo_run1 = $command ; llvm-profdata merge -output=default.profdata *.profraw 603.bwaves_s,627.cam4_s=peak: feedback = 0 #some benchmarks do not mind sharing cores %ifdef %{smt-on} 628.pop2_s,644.nab_s=peak: threads = %{numpeakthreads} %endif 607.cactuBSSN_s,619.lbm_s,621.wrf_s,628.pop2_s,638.imagick_s,644.nab_s,649.fotonik3d_s,654.roms_s=peak: basepeak=1 #------------------------------------------------------------------------------- # Tester and System Descriptions - EDIT the sections below #------------------------------------------------------------------------------- # For info about any field, see # https://www.spec.org/auto/cpu2017/Docs/config.html#fieldname # Example: https://www.spec.org/auto/cpu2017/Docs/config.html#hw_memory #------------------------------------------------------------------------------- #--------- If you install new compilers, EDIT this section -------------------- intrate,intspeed,fpspeed,fprate: sw_compiler000 = C/C++: Version 2022.1 of Intel oneAPI DPC++/C++ sw_compiler001 = Compiler Build 20220316 for Linux; sw_compiler002 = Fortran: Version 2022.1 of Intel Fortran Compiler sw_compiler003 = Build 20220316 for Linux; sw_base_ptrsize = 64-bit sw_other = jemalloc memory allocator V5.0.1 fprate,fpspeed: sw_peak_ptrsize = 64-bit intspeed: sw_peak_ptrsize = 64-bit intrate: sw_peak_ptrsize = 32/64-bit #--------- EDIT Your info --------------------------------------------------------- # To understand the difference between hw_vendor/sponsor/tester, see: # www.spec.org/auto/cpu2017/Docs/config.html#test_sponsor intrate,intspeed,fprate,fpspeed: # Important: keep this line hw_vendor = Nettrix tester = Nettrix test_sponsor = Nettrix license_num = 6138 prepared_by = Vivienne.Wu(Vivienne.Wu@nettrix.com.cn) #--------- EDIT system availability dates and system information ---------------------------------------------- intrate,intspeed,fprate,fpspeed: # Important: keep this line # Example # Brief info about field hw_avail = Jan-2023 sw_avail = Nov-2022 hw_cpu_nominal_mhz = 2000 hw_cpu_max_mhz = 3800 hw_ncores = 112 hw_nthreadspercore = 1 hw_ncpuorder = 1,2 chips hw_model = R620 G50 LP (Intel Xeon Platinum 8480+, 2.00 GHz) hw_other = None # sw_other = # TurboHeap Library V8.1 # Other perf-relevant sw, or "None" hw_pcache = 32 KB I + 48 KB D on chip per core hw_scache = 2 MB I+D on chip per core hw_tcache = 105 MB I+D on chip per chip hw_ocache = None # hw_memory001 = # 4 TB (256 x 16 GB 2Rx4 PC4-2133P-R, # N GB (M x N GB nRxn # hw_memory002 = # running at 1600 MHz) # PCn-nnnnnR-n[, ECC and other info]) #--------- Sysinfo fields - You may need to adjust this section --------------- # Note: Some commented-out fields above are automatically set to preliminary # values by sysinfo # www.spec.org/auto/cpu2017/Docs/config.html#sysinfo # Uncomment lines for which you already have a better answer than sysinfo # intrate,intspeed,fprate,fpspeed: # Important: keep this line # Example # Brief info about field # hw_cpu_name = # Intel Xeon E9-9999 v9 # chip name # hw_disk = # 9 x 9 TB SATA III 9999 RPM # Size, type, other perf-relevant info # hw_nchips = # 99 # number chips enabled # sw_file = # ext99 # File system # sw_state = # Run level 99 # Software state. # sw_os001 = # Linux Sailboat # Operating system # sw_os002 = # Distribution 7.2 SP1 # and version #--------- EDIT Intel Recommended Fields - You may wish to adjust this section ----- default: notes_000 = Binaries compiled on a system with 2x Intel Xeon Platinum 8280M CPU + 384GB RAM notes_005 = memory using Red Hat Enterprise Linux 8.0 notes_os_000 = Stack size set to unlimited using "ulimit -s unlimited" #Ease of tagging results from the runcpu command line with commands run outside of runcpu harneess #Adjust as necessary for your SUT %if defined(%{THP_enabled}) notes_200 = Transparent Huge Pages enabled with: notes_201 = echo always > /sys/kernel/mm/transparent_hugepage/enabled %elif defined(%{THP_disabled}) notes_200 = Transparent Huge Pages disabled with: notes_201 = echo never > /sys/kernel/mm/transparent_hugepage/enabled %else notes_010 = NA : The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) %endif %ifdef %{drop_caches} notes_015 = is mitigated in the system as tested and documented. notes_020 = Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) notes_025 = is mitigated in the system as tested and documented. notes_030 = Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) notes_035 = is mitigated in the system as tested and documented. notes_040 = Transparent Huge Pages enabled by default notes_045 = Prior to runcpu invocation notes_050 = Filesystem page cache synced and cleared with: notes_055 = sync; echo 3> /proc/sys/vm/drop_caches %endif %ifdef %{invoke_with_interleave} notes_205 = runcpu command invoked through numactl i.e.: notes_206 = numactl --interleave=all runcpu %endif intrate,fprate: %if defined(%{no-numa}) notes_submit_000 = The taskset mechanism was used to bind copies to processors. The config file option 'submit' notes_submit_001 = was used to generate taskset commands to bind each copy to a specific processor. notes_submit_002 = For details, please see the config file. %else notes_submit_000 = The numactl mechanism was used to bind copies to processors. The config file option 'submit' notes_submit_001 = was used to generate numactl commands to bind each copy to a specific processor. notes_submit_002 = For details, please see the config file. %endif intrate,fprate,intspeed,fpspeed: notes_jemalloc_000 = jemalloc, a general purpose malloc implementation notes_jemalloc_005 = built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 notes_jemalloc_010 = sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases # The following settings were obtained by running the sysinfo_program # 'specperl $[top]/bin/sysinfo' (sysinfo:SHA:679c83684f6f4fc369a093999b6661d0a378911de2a006d3245423ad80d3fb9a) default: notes_plat_sysinfo_000 = notes_plat_sysinfo_005 = Sysinfo program /home/lijq/bin/sysinfo notes_plat_sysinfo_010 = Rev: r6622 of 2021-04-07 982a61ec0915b55891ef0e16acafc64d notes_plat_sysinfo_015 = running on localhost Mon Dec 19 17:57:02 2022 notes_plat_sysinfo_020 = notes_plat_sysinfo_025 = SUT (System Under Test) info as seen by some common utilities. notes_plat_sysinfo_030 = For more information on this section, see notes_plat_sysinfo_035 = https://www.spec.org/cpu2017/Docs/config.html#sysinfo notes_plat_sysinfo_040 = notes_plat_sysinfo_045 = From /proc/cpuinfo notes_plat_sysinfo_050 = model name : Intel(R) Xeon(R) Platinum 8480+ notes_plat_sysinfo_055 = 2 "physical id"s (chips) notes_plat_sysinfo_060 = 112 "processors" notes_plat_sysinfo_065 = cores, siblings (Caution: counting these is hw and system dependent. The following notes_plat_sysinfo_070 = excerpts from /proc/cpuinfo might not be reliable. Use with caution.) notes_plat_sysinfo_075 = cpu cores : 56 notes_plat_sysinfo_080 = siblings : 56 notes_plat_sysinfo_085 = physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 notes_plat_sysinfo_090 = 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 notes_plat_sysinfo_095 = 53 54 55 notes_plat_sysinfo_100 = physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 notes_plat_sysinfo_105 = 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 notes_plat_sysinfo_110 = 53 54 55 notes_plat_sysinfo_115 = notes_plat_sysinfo_120 = From lscpu from util-linux 2.36.2: notes_plat_sysinfo_125 = Architecture: x86_64 notes_plat_sysinfo_130 = CPU op-mode(s): 32-bit, 64-bit notes_plat_sysinfo_135 = Byte Order: Little Endian notes_plat_sysinfo_140 = Address sizes: 52 bits physical, 57 bits virtual notes_plat_sysinfo_145 = CPU(s): 112 notes_plat_sysinfo_150 = On-line CPU(s) list: 0-111 notes_plat_sysinfo_155 = Thread(s) per core: 1 notes_plat_sysinfo_160 = Core(s) per socket: 56 notes_plat_sysinfo_165 = Socket(s): 2 notes_plat_sysinfo_170 = NUMA node(s): 2 notes_plat_sysinfo_175 = Vendor ID: GenuineIntel notes_plat_sysinfo_180 = CPU family: 6 notes_plat_sysinfo_185 = Model: 143 notes_plat_sysinfo_190 = Model name: Intel(R) Xeon(R) Platinum 8480+ notes_plat_sysinfo_195 = Stepping: 8 notes_plat_sysinfo_200 = CPU MHz: 3000.000 notes_plat_sysinfo_205 = CPU max MHz: 3800.0000 notes_plat_sysinfo_210 = CPU min MHz: 800.0000 notes_plat_sysinfo_215 = BogoMIPS: 4000.00 notes_plat_sysinfo_220 = Virtualization: VT-x notes_plat_sysinfo_225 = L1d cache: 5.3 MiB notes_plat_sysinfo_230 = L1i cache: 3.5 MiB notes_plat_sysinfo_235 = L2 cache: 224 MiB notes_plat_sysinfo_240 = L3 cache: 210 MiB notes_plat_sysinfo_245 = NUMA node0 CPU(s): 0-55 notes_plat_sysinfo_250 = NUMA node1 CPU(s): 56-111 notes_plat_sysinfo_255 = Vulnerability Itlb multihit: Not affected notes_plat_sysinfo_260 = Vulnerability L1tf: Not affected notes_plat_sysinfo_265 = Vulnerability Mds: Not affected notes_plat_sysinfo_270 = Vulnerability Meltdown: Not affected notes_plat_sysinfo_275 = Vulnerability Mmio stale data: Not affected notes_plat_sysinfo_280 = Vulnerability Retbleed: Not affected notes_plat_sysinfo_285 = Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via notes_plat_sysinfo_290 = prctl and seccomp notes_plat_sysinfo_295 = Vulnerability Spectre v1: Mitigation; usercopy/swapgs barriers and __user notes_plat_sysinfo_300 = pointer sanitization notes_plat_sysinfo_305 = Vulnerability Spectre v2: Mitigation; Enhanced IBRS, IBPB conditional, RSB notes_plat_sysinfo_310 = filling, PBRSB-eIBRS SW sequence notes_plat_sysinfo_315 = Vulnerability Srbds: Not affected notes_plat_sysinfo_320 = Vulnerability Tsx async abort: Not affected notes_plat_sysinfo_325 = Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr notes_plat_sysinfo_330 = pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx notes_plat_sysinfo_335 = pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology notes_plat_sysinfo_340 = nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 ds_cpl vmx smx est notes_plat_sysinfo_345 = tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt notes_plat_sysinfo_350 = tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault notes_plat_sysinfo_355 = epb cat_l3 cat_l2 cdp_l3 invpcid_single cdp_l2 ssbd mba ibrs ibpb stibp notes_plat_sysinfo_360 = ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 notes_plat_sysinfo_365 = hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a avx512f avx512dq rdseed adx smap notes_plat_sysinfo_370 = avx512ifma clflushopt clwb intel_pt avx512cd sha_ni avx512bw avx512vl xsaveopt notes_plat_sysinfo_375 = xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local notes_plat_sysinfo_380 = split_lock_detect avx512_bf16 wbnoinvd dtherm ida arat pln pts hwp hwp_act_window notes_plat_sysinfo_385 = hwp_epp hwp_pkg_req avx512vbmi umip pku ospke waitpkg avx512_vbmi2 gfni vaes notes_plat_sysinfo_390 = vpclmulqdq avx512_vnni avx512_bitalg tme avx512_vpopcntdq la57 rdpid cldemote notes_plat_sysinfo_395 = movdiri movdir64b enqcmd fsrm md_clear serialize tsxldtrk pconfig avx512_fp16 notes_plat_sysinfo_400 = flush_l1d arch_capabilities notes_plat_sysinfo_405 = notes_plat_sysinfo_410 = From lscpu --cache: notes_plat_sysinfo_415 = NAME ONE-SIZE ALL-SIZE WAYS TYPE LEVEL SETS PHY-LINE COHERENCY-SIZE notes_plat_sysinfo_420 = L1d 48K 5.3M 12 Data 1 64 1 64 notes_plat_sysinfo_425 = L1i 32K 3.5M 8 Instruction 1 64 1 64 notes_plat_sysinfo_430 = L2 2M 224M 16 Unified 2 2048 1 64 notes_plat_sysinfo_435 = L3 105M 210M 15 Unified 3 114688 1 64 notes_plat_sysinfo_440 = notes_plat_sysinfo_445 = /proc/cpuinfo cache data notes_plat_sysinfo_450 = cache size : 107520 KB notes_plat_sysinfo_455 = notes_plat_sysinfo_460 = From numactl --hardware notes_plat_sysinfo_465 = WARNING: a numactl 'node' might or might not correspond to a physical chip. notes_plat_sysinfo_470 = available: 2 nodes (0-1) notes_plat_sysinfo_475 = node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 notes_plat_sysinfo_480 = 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 notes_plat_sysinfo_485 = node 0 size: 515565 MB notes_plat_sysinfo_490 = node 0 free: 514558 MB notes_plat_sysinfo_495 = node 1 cpus: 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 notes_plat_sysinfo_500 = 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 notes_plat_sysinfo_505 = 107 108 109 110 111 notes_plat_sysinfo_510 = node 1 size: 515820 MB notes_plat_sysinfo_515 = node 1 free: 513450 MB notes_plat_sysinfo_520 = node distances: notes_plat_sysinfo_525 = node 0 1 notes_plat_sysinfo_530 = 0: 10 21 notes_plat_sysinfo_535 = 1: 21 10 notes_plat_sysinfo_540 = notes_plat_sysinfo_545 = From /proc/meminfo notes_plat_sysinfo_550 = MemTotal: 1056139448 kB notes_plat_sysinfo_555 = HugePages_Total: 0 notes_plat_sysinfo_560 = Hugepagesize: 2048 kB notes_plat_sysinfo_565 = notes_plat_sysinfo_570 = /sys/devices/system/cpu/cpu*/cpufreq/scaling_governor has notes_plat_sysinfo_575 = performance notes_plat_sysinfo_580 = notes_plat_sysinfo_585 = From /etc/*release* /etc/*version* notes_plat_sysinfo_590 = os-release: notes_plat_sysinfo_595 = NAME="SLES" notes_plat_sysinfo_600 = VERSION="15-SP3" notes_plat_sysinfo_605 = VERSION_ID="15.3" notes_plat_sysinfo_610 = PRETTY_NAME="SUSE Linux Enterprise Server 15 SP3" notes_plat_sysinfo_615 = ID="sles" notes_plat_sysinfo_620 = ID_LIKE="suse" notes_plat_sysinfo_625 = ANSI_COLOR="0;32" notes_plat_sysinfo_630 = CPE_NAME="cpe:/o:suse:sles:15:sp3" notes_plat_sysinfo_635 = notes_plat_sysinfo_640 = uname -a: notes_plat_sysinfo_645 = Linux localhost 5.3.18-150300.59.101-default #1 SMP Tue Nov 1 11:32:03 UTC 2022 notes_plat_sysinfo_650 = (b2a976e) x86_64 x86_64 x86_64 GNU/Linux notes_plat_sysinfo_655 = notes_plat_sysinfo_660 = Kernel self-reported vulnerability status: notes_plat_sysinfo_665 = notes_plat_sysinfo_670 = CVE-2018-12207 (iTLB Multihit): Not affected notes_plat_sysinfo_675 = CVE-2018-3620 (L1 Terminal Fault): Not affected notes_plat_sysinfo_680 = Microarchitectural Data Sampling: Not affected notes_plat_sysinfo_685 = CVE-2017-5754 (Meltdown): Not affected notes_plat_sysinfo_690 = mmio_stale_data: Not affected notes_plat_sysinfo_695 = retbleed: Not affected notes_plat_sysinfo_700 = CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store notes_plat_sysinfo_705 = Bypass disabled via prctl and notes_plat_sysinfo_710 = seccomp notes_plat_sysinfo_715 = CVE-2017-5753 (Spectre variant 1): Mitigation: usercopy/swapgs notes_plat_sysinfo_720 = barriers and __user pointer notes_plat_sysinfo_725 = sanitization notes_plat_sysinfo_730 = CVE-2017-5715 (Spectre variant 2): Mitigation: Enhanced IBRS, IBPB: notes_plat_sysinfo_735 = conditional, RSB filling, notes_plat_sysinfo_740 = PBRSB-eIBRS: SW sequence notes_plat_sysinfo_745 = CVE-2020-0543 (Special Register Buffer Data Sampling): Not affected notes_plat_sysinfo_750 = CVE-2019-11135 (TSX Asynchronous Abort): Not affected notes_plat_sysinfo_755 = notes_plat_sysinfo_760 = run-level 3 Dec 19 17:30 notes_plat_sysinfo_765 = notes_plat_sysinfo_770 = SPEC is set to: /home/lijq notes_plat_sysinfo_775 = Filesystem Type Size Used Avail Use% Mounted on notes_plat_sysinfo_780 = /dev/sda5 xfs 142G 53G 89G 38% /home notes_plat_sysinfo_785 = notes_plat_sysinfo_790 = From /sys/devices/virtual/dmi/id notes_plat_sysinfo_795 = Vendor: Nettrix notes_plat_sysinfo_800 = Product: R620 G50 LP notes_plat_sysinfo_805 = Product Family: Rack notes_plat_sysinfo_810 = Serial: 6101823903509474 notes_plat_sysinfo_815 = notes_plat_sysinfo_820 = Additional information from dmidecode 3.2 follows. WARNING: Use caution when you notes_plat_sysinfo_825 = interpret this section. The 'dmidecode' program reads system data which is "intended to notes_plat_sysinfo_830 = allow hardware to be accurately determined", but the intent may not be met, as there are notes_plat_sysinfo_835 = frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. notes_plat_sysinfo_840 = Memory: notes_plat_sysinfo_845 = 16x Samsung M321R8GA0BB0-CQKEG 64 GB 2 rank 4800 notes_plat_sysinfo_850 = notes_plat_sysinfo_855 = BIOS: notes_plat_sysinfo_860 = BIOS Vendor: American Megatrends International, LLC. notes_plat_sysinfo_865 = BIOS Version: NNH1041018-U00-1 notes_plat_sysinfo_870 = BIOS Date: 11/01/2022 notes_plat_sysinfo_875 = BIOS Revision: 5.29 notes_plat_sysinfo_880 = notes_plat_sysinfo_885 = (End of data from sysinfo program) hw_cpu_name = Intel Xeon Platinum 8480+ hw_disk = 1 x 240 GB SATA SSD hw_memory = 1 TB (16 x 64 GB 2Rx4 PC5-4800B-R) hw_nchips = 2 prepared_by = root (is never output, only tags rawfile) sw_file = xfs sw_os000 = SUSE Linux Enterprise Server 15 SP3 sw_os001 = 5.3.18-150300.59.101-default sw_state = Run level 3 (multi-user) # End of settings added by sysinfo_program 998.specrand_is: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 657.xz_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 648.exchange2_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 641.leela_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 631.deepsjeng_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 625.x264_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 623.xalancbmk_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 620.omnetpp_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 605.mcf_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 602.gcc_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 600.perlbench_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 999.specrand_ir: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 557.xz_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 548.exchange2_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 541.leela_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 531.deepsjeng_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 525.x264_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 523.xalancbmk_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 520.omnetpp_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 505.mcf_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 502.gcc_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 500.perlbench_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 654.roms_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 649.fotonik3d_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 644.nab_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 638.imagick_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 628.pop2_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 627.cam4_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 621.wrf_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 619.lbm_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 607.cactuBSSN_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 603.bwaves_s: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 997.specrand_fr: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 554.roms_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 549.fotonik3d_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 544.nab_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 538.imagick_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 527.cam4_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 526.blender_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 521.wrf_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 519.lbm_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 511.povray_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 510.parest_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 508.namd_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 507.cactuBSSN_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 503.bwaves_r: # The following setting was inserted automatically as a result of # post-run basepeak application. basepeak = 1 # The following section was added automatically, and contains settings that # did not appear in the original configuration file, but were added to the # raw file after the run. default: fw_bios000 = Nettrix BIOS Version NNH1041018-U00-1 released fw_bios001 = Nov-2022 power_management000 = BIOS and OS set to prefer performance at the cost power_management001 = of additional power usage notes_plat_000 = BIOS Configuration: notes_plat_005 = Enable LP [Global] set to Single LP notes_plat_010 = LLC Prefetch set to Enabled notes_plat_015 = SNC (Sub NUMA) set to Disabled notes_plat_020 = Patrol Scrub set to Disabled notes_plat_025 = LLC dead line alloc set to Disabled notes_plat_030 = XPT Prefetch set to Enabled notes_plat_035 = KTI Prefetch set to Disabled notes_plat_040 = DCU Streamer Prefetcher set to Disabled notes_plat_045 = Hardware P-States set to Native Mode