SPEC CPU®2017 Floating Point Speed Result

Copyright 2017-2023 Standard Performance Evaluation Corporation

Supermicro

SuperServer SYS-521E-WR
(X13SEW-TF , Intel Xeon Gold 6444Y)

SPECspeed®2017_fp_base = 17500

SPECspeed®2017_fp_peak = 17500

CPU2017 License: 001176 Test Date: Nov-2022
Test Sponsor: Supermicro Hardware Availability: Jan-2023
Tested by: Supermicro Software Availability: Jun-2022

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon Gold 6444Y
  Max MHz: 4000
  Nominal: 3600
Enabled: 16 cores, 1 chip
Orderable: 1 chip
Cache L1: 32 KB I + 48 KB D on chip per core
  L2: 2 MB I+D on chip per core
  L3: 45 MB I+D on chip per chip
  Other: None
Memory: 256 GB (8 x 32 GB 2Rx8 PC5-4800B-R)
Storage: 1 x 240 GB SATA III SSD
Other: None
Software
OS: SUSE Linux Enterprise Server 15 SP4
Kernel 5.14.21-150400.22-default
Compiler: C/C++: Version 2022.1 of Intel oneAPI DPC++/C++
Compiler for Linux;
Fortran: Version 2022.1 of Intel Fortran Compiler
for Linux;
Parallel: Yes
Firmware: Version 1.0a released Nov-2022
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: 64-bit
Other: jemalloc memory allocator V5.0.1
Power Management: BIOS set to prefer performance at the cost of
additional power usage.

Results Table

Benchmark Base Peak
Threads Seconds Ratio Seconds Ratio Seconds Ratio Threads Seconds Ratio Seconds Ratio Seconds Ratio
SPECspeed®2017_fp_base 17500
SPECspeed®2017_fp_peak 17500
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
603.bwaves_s 16 1150 5140 1150 5140 1150 5140 16 1150 5140 1150 5140 1150 5140
607.cactuBSSN_s 16 82.9 2010 82.2 2030 82.3 2020 16 82.9 2010 82.2 2030 82.3 2020
619.lbm_s 16 36.9 1420 36.8 1420 37.2 1410 16 36.9 1420 36.8 1420 37.2 1410
621.wrf_s 16 71.6 1850 71.7 1840 71.8 1840 16 71.6 1850 71.7 1840 71.8 1840
627.cam4_s 16 1030 86.2 1030 86.0 1030 86.1 16 1030 85.7 1030 85.8 1030 86.2
628.pop2_s 16 1030 1150 1030 1150 1030 1150 16 1030 1150 1030 1150 1030 1150
638.imagick_s 16 47.4 3040 47.3 3050 47.6 3030 16 47.4 3040 47.3 3050 47.6 3030
644.nab_s 16 77.3 2260 77.3 2260 77.3 2260 16 77.3 2260 77.3 2260 77.3 2260
649.fotonik3d_s 16 1040 87.4 1040 87.2 1040 87.3 16 1040 87.4 1040 87.2 1040 87.3
654.roms_s 16 93.5 1680 93.5 1680 93.5 1680 16 93.5 1680 93.5 1680 93.5 1680

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Environment Variables Notes

Environment variables set by runcpu before the start of the run:
KMP_AFFINITY = "granularity=fine,compact"
LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-64"
MALLOC_CONF = "retain:true"
OMP_STACKSIZE = "192M"

General Notes

 Binaries compiled on a system with 2x Intel Xeon Platinum 8280M CPU + 384GB RAM
 memory using Redhat Enterprise Linux 8.0
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3>       /proc/sys/vm/drop_caches

 NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
 is mitigated in the system as tested and documented.
 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
 is mitigated in the system as tested and documented.
 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
 is mitigated in the system as tested and documented.
 jemalloc, a general purpose malloc implementation
 built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5
 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases

Platform Notes

BIOS Settings:
Power Technology = Custom
Power Performance Tuning = BIOS Controls EPB
ENERGY_PERF_BIAS_CFG mode = Performance
DCU Streamer Prefetcher = Disable
Hyper-Threading [ALL]= Disable
LLC Dead Line Alloc = Disable
KTI Prefetch = Enable
Stale AtoS = Disable
Patrol Scrub = Disable

 Sysinfo program /home/cpu2017/bin/sysinfo
 Rev: r6622 of 2021-04-07 982a61ec0915b55891ef0e16acafc64d
 running on 135-173-251.engtw Tue Nov 29 22:18:51 2022

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Gold 6444Y
       1  "physical id"s (chips)
       16 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 16
       siblings  : 16
       physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

 From lscpu from util-linux 2.37.2:
      Architecture:                    x86_64
      CPU op-mode(s):                  32-bit, 64-bit
      Address sizes:                   46 bits physical, 57 bits virtual
      Byte Order:                      Little Endian
      CPU(s):                          16
      On-line CPU(s) list:             0-15
      Vendor ID:                       GenuineIntel
      Model name:                      Intel(R) Xeon(R) Gold 6444Y
      CPU family:                      6
      Model:                           143
      Thread(s) per core:              1
      Core(s) per socket:              16
      Socket(s):                       1
      Stepping:                        7
      Frequency boost:                 enabled
      CPU max MHz:                     3601.0000
      CPU min MHz:                     800.0000
      BogoMIPS:                        7200.00
      Flags:                           fpu vme de pse tsc msr pae mce cx8 apic sep mtrr
      pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
      pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology
      nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx
      smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt
      tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault
      epb cat_l3 cat_l2 cdp_l3 invpcid_single cdp_l2 ssbd mba ibrs ibpb stibp
      ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1
      hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a avx512f avx512dq rdseed adx smap
      avx512ifma clflushopt clwb intel_pt avx512cd sha_ni avx512bw avx512vl xsaveopt
      xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local
      split_lock_detect avx_vnni avx512_bf16 wbnoinvd dtherm ida arat pln pts avx512vbmi
      umip pku ospke waitpkg avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg
      tme avx512_vpopcntdq la57 rdpid bus_lock_detect cldemote movdiri movdir64b enqcmd
      fsrm md_clear serialize tsxldtrk pconfig arch_lbr avx512_fp16 amx_tile flush_l1d
      arch_capabilities
      Virtualization:                  VT-x
      L1d cache:                       768 KiB (16 instances)
      L1i cache:                       512 KiB (16 instances)
      L2 cache:                        32 MiB (16 instances)
      L3 cache:                        45 MiB (1 instance)
      NUMA node(s):                    1
      NUMA node0 CPU(s):               0-15
      Vulnerability Itlb multihit:     Not affected
      Vulnerability L1tf:              Not affected
      Vulnerability Mds:               Not affected
      Vulnerability Meltdown:          Not affected
      Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via
      prctl and seccomp
      Vulnerability Spectre v1:        Mitigation; usercopy/swapgs barriers and __user
      pointer sanitization
      Vulnerability Spectre v2:        Mitigation; Enhanced IBRS, IBPB conditional, RSB
      filling
      Vulnerability Srbds:             Not affected
      Vulnerability Tsx async abort:   Not affected

 From lscpu --cache:
      NAME ONE-SIZE ALL-SIZE WAYS TYPE        LEVEL  SETS PHY-LINE COHERENCY-SIZE
      L1d       48K     768K   12 Data            1    64        1             64
      L1i       32K     512K    8 Instruction     1    64        1             64
      L2         2M      32M   16 Unified         2  2048        1             64
      L3        45M      45M   15 Unified         3 49152        1             64

 /proc/cpuinfo cache data
    cache size : 46080 KB

 From numactl --hardware
 WARNING: a numactl 'node' might or might not correspond to a physical chip.
   available: 1 nodes (0)
   node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
   node 0 size: 257439 MB
   node 0 free: 249825 MB
   node distances:
   node   0
     0:  10

 From /proc/meminfo
    MemTotal:       263617636 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /sys/devices/system/cpu/cpu*/cpufreq/scaling_governor has
    ondemand

 From /etc/*release* /etc/*version*
    os-release:
       NAME="SLES"
       VERSION="15-SP4"
       VERSION_ID="15.4"
       PRETTY_NAME="SUSE Linux Enterprise Server 15 SP4"
       ID="sles"
       ID_LIKE="suse"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:15:sp4"

 uname -a:
    Linux 135-173-251.engtw 5.14.21-150400.22-default #1 SMP PREEMPT_DYNAMIC Wed May 11
    06:57:18 UTC 2022 (49db222) x86_64 x86_64 x86_64 GNU/Linux

 Kernel self-reported vulnerability status:

 CVE-2018-12207 (iTLB Multihit):                        Not affected
 CVE-2018-3620 (L1 Terminal Fault):                     Not affected
 Microarchitectural Data Sampling:                      Not affected
 CVE-2017-5754 (Meltdown):                              Not affected
 CVE-2018-3639 (Speculative Store Bypass):              Mitigation: Speculative Store
                                                        Bypass disabled via prctl and
                                                        seccomp
 CVE-2017-5753 (Spectre variant 1):                     Mitigation: usercopy/swapgs
                                                        barriers and __user pointer
                                                        sanitization
 CVE-2017-5715 (Spectre variant 2):                     Mitigation: Enhanced IBRS, IBPB:
                                                        conditional, RSB filling
 CVE-2020-0543 (Special Register Buffer Data Sampling): Not affected
 CVE-2019-11135 (TSX Asynchronous Abort):               Not affected

 run-level 3 Nov 29 19:05

 SPEC is set to: /home/cpu2017
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda2      xfs   221G   14G  208G   7% /

 From /sys/devices/virtual/dmi/id
     Vendor:         Supermicro
     Product:        Super Server
     Product Family: Family
     Serial:         0123456789

 Additional information from dmidecode 3.2 follows.  WARNING: Use caution when you
 interpret this section. The 'dmidecode' program reads system data which is "intended to
 allow hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   Memory:
     8x Samsung M321R4GA3BB6-CQKEG 32 GB 2 rank 4800

 BIOS:
    BIOS Vendor:       American Megatrends International, LLC.
    BIOS Version:      1.0a
    BIOS Date:         11/29/2022
    BIOS Revision:     5.29

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
C               | 619.lbm_s(base, peak) 638.imagick_s(base, peak)
                | 644.nab_s(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2022.1.0 Build 20220316
Copyright (C) 1985-2022 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 607.cactuBSSN_s(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2022.1.0 Build 20220316
Copyright (C) 1985-2022 Intel Corporation. All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2022.1.0 Build 20220316
Copyright (C) 1985-2022 Intel Corporation. All rights reserved.
Intel(R) Fortran Compiler for applications running on Intel(R) 64, Version
  2022.1.0 Build 20220316
Copyright (C) 1985-2022 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran         | 603.bwaves_s(base, peak) 649.fotonik3d_s(base, peak)
                | 654.roms_s(base, peak)
------------------------------------------------------------------------------
Intel(R) Fortran Compiler for applications running on Intel(R) 64, Version
  2022.1.0 Build 20220316
Copyright (C) 1985-2022 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 621.wrf_s(base, peak) 627.cam4_s(base, peak)
                | 628.pop2_s(base, peak)
------------------------------------------------------------------------------
Intel(R) Fortran Compiler for applications running on Intel(R) 64, Version
  2022.1.0 Build 20220316
Copyright (C) 1985-2022 Intel Corporation. All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2022.1.0 Build 20220316
Copyright (C) 1985-2022 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icx 

Fortran benchmarks:

 ifx 

Benchmarks using both Fortran and C:

 ifx   icx 

Benchmarks using Fortran, C, and C++:

 icpx   icx   ifx 

Base Portability Flags

603.bwaves_s:  -DSPEC_LP64 
607.cactuBSSN_s:  -DSPEC_LP64 
619.lbm_s:  -DSPEC_LP64 
621.wrf_s:  -DSPEC_LP64   -DSPEC_CASE_FLAG   -convert big_endian 
627.cam4_s:  -DSPEC_LP64   -DSPEC_CASE_FLAG 
628.pop2_s:  -DSPEC_LP64   -DSPEC_CASE_FLAG   -convert big_endian   -assume byterecl 
638.imagick_s:  -DSPEC_LP64 
644.nab_s:  -DSPEC_LP64 
649.fotonik3d_s:  -DSPEC_LP64 
654.roms_s:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -fiopenmp   -DSPEC_OPENMP   -L/usr/local/jemalloc64-5.0.1/lib   -ljemalloc 

Fortran benchmarks:

 -m64   -Wl,-z,muldefs   -DSPEC_OPENMP   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -fiopenmp   -nostandard-realloc-lhs   -align array32byte   -auto   -L/usr/local/jemalloc64-5.0.1/lib   -ljemalloc 

Benchmarks using both Fortran and C:

 -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -fiopenmp   -DSPEC_OPENMP   -nostandard-realloc-lhs   -align array32byte   -auto   -L/usr/local/jemalloc64-5.0.1/lib   -ljemalloc 

Benchmarks using Fortran, C, and C++:

 -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -fiopenmp   -DSPEC_OPENMP   -nostandard-realloc-lhs   -align array32byte   -auto   -L/usr/local/jemalloc64-5.0.1/lib   -ljemalloc 

Peak Compiler Invocation

C benchmarks:

 icx 

Fortran benchmarks:

 ifx 

Benchmarks using both Fortran and C:

 ifx   icx 

Benchmarks using Fortran, C, and C++:

 icpx   icx   ifx 

Peak Portability Flags

Same as Base Portability Flags

Peak Optimization Flags

C benchmarks:

619.lbm_s:  basepeak = yes 
638.imagick_s:  basepeak = yes 
644.nab_s:  basepeak = yes 

Fortran benchmarks:

603.bwaves_s:  -m64   -Wl,-z,muldefs   -DSPEC_OPENMP   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -fiopenmp   -nostandard-realloc-lhs   -align array32byte   -auto   -L/usr/local/jemalloc64-5.0.1/lib   -ljemalloc 
649.fotonik3d_s:  basepeak = yes 
654.roms_s:  basepeak = yes 

Benchmarks using both Fortran and C:

621.wrf_s:  basepeak = yes 
627.cam4_s:  -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -fiopenmp   -DSPEC_OPENMP   -nostandard-realloc-lhs   -align array32byte   -auto   -L/usr/local/jemalloc64-5.0.1/lib   -ljemalloc 
628.pop2_s:  basepeak = yes 

Benchmarks using Fortran, C, and C++:

607.cactuBSSN_s:  basepeak = yes 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic2022-official-linux64_revA.html,
http://www.spec.org/cpu2017/flags/Supermicro-Platform-Settings-V1.2-SPR-revC.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic2022-official-linux64_revA.xml,
http://www.spec.org/cpu2017/flags/Supermicro-Platform-Settings-V1.2-SPR-revC.xml.