SPEC CPU(R)2017 Integer Rate Result Supermicro SuperServer SYS-240P-TNRT (X12QCH+ , Intel Xeon Gold 6348H) CPU2017 License: 001176 Test date: Nov-2022 Test sponsor: Supermicro Hardware availability: Sep-2020 Tested by: Supermicro Software availability: Jun-2022 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 192 704 434 S 192 644 475 * 500.perlbench_r 192 702 435 * 192 641 477 S 500.perlbench_r 192 701 436 S 192 645 474 S 502.gcc_r 192 601 452 * 192 511 532 S 502.gcc_r 192 596 456 S 192 511 533 * 502.gcc_r 192 602 452 S 192 509 534 S 505.mcf_r 192 307 1010 * 192 307 1010 * 505.mcf_r 192 307 1010 S 192 307 1010 S 505.mcf_r 192 305 1020 S 192 305 1020 S 520.omnetpp_r 192 644 391 S 192 644 391 S 520.omnetpp_r 192 642 393 * 192 642 393 * 520.omnetpp_r 192 641 393 S 192 641 393 S 523.xalancbmk_r 192 203 998 * 192 203 998 * 523.xalancbmk_r 192 205 989 S 192 205 989 S 523.xalancbmk_r 192 203 998 S 192 203 998 S 525.x264_r 192 267 1260 S 192 259 1300 S 525.x264_r 192 269 1250 S 192 260 1290 S 525.x264_r 192 267 1260 * 192 260 1300 * 531.deepsjeng_r 192 457 481 S 192 457 481 S 531.deepsjeng_r 192 457 481 * 192 457 481 * 531.deepsjeng_r 192 457 481 S 192 457 481 S 541.leela_r 192 666 477 * 192 666 477 * 541.leela_r 192 664 479 S 192 664 479 S 541.leela_r 192 666 477 S 192 666 477 S 548.exchange2_r 192 404 1240 S 192 404 1240 S 548.exchange2_r 192 405 1240 S 192 405 1240 S 548.exchange2_r 192 405 1240 * 192 405 1240 * 557.xz_r 192 566 367 * 192 566 367 * 557.xz_r 192 565 367 S 192 565 367 S 557.xz_r 192 566 366 S 192 566 366 S ================================================================================= 500.perlbench_r 192 702 435 * 192 644 475 * 502.gcc_r 192 601 452 * 192 511 533 * 505.mcf_r 192 307 1010 * 192 307 1010 * 520.omnetpp_r 192 642 393 * 192 642 393 * 523.xalancbmk_r 192 203 998 * 192 203 998 * 525.x264_r 192 267 1260 * 192 260 1300 * 531.deepsjeng_r 192 457 481 * 192 457 481 * 541.leela_r 192 666 477 * 192 666 477 * 548.exchange2_r 192 405 1240 * 192 405 1240 * 557.xz_r 192 566 367 * 192 566 367 * SPECrate(R)2017_int_base 633 SPECrate(R)2017_int_peak 651 HARDWARE -------- CPU Name: Intel Xeon Gold 6348H Max MHz: 4200 Nominal: 2300 Enabled: 96 cores, 4 chips, 2 threads/core Orderable: 4 chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 33 MB I+D on chip per chip Other: None Memory: 3 TB (48 x 64 GB 2Rx4 PC4-3200AA-R, running at 2933) Storage: 1 x 480 GB NVMe SSD Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 15 SP4 Kernel 5.14.21-150400.22-default Compiler: C/C++: Version 2022.1 of Intel oneAPI DPC++/C++ Compiler for Linux; Fortran: Version 2022.1 of Intel Fortran Compiler for Linux; Parallel: No Firmware: Version 1.3 released Jul-2022 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc memory allocator V5.0.1 Power Management: BIOS and OS set to prefer performance at the cost of additional power usage. Compiler Notes -------------- SPEC has ruled that the compiler used for this result was performing a compilation that specifically improves the performance of the 523.xalancbmk_r / 623.xalancbmk_s benchmarks using a priori knowledge of the SPEC code and dataset to perform a transformation that has narrow applicability. In order to encourage optimizations that have wide applicability (see rule 1.4 https://www.spec.org/cpu2017/Docs/runrules.html#rule_1.4), SPEC will no longer publish results using this optimization. This result is left in the SPEC results database for historical reference. Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64:/home/cpu2017/lib/ia32:/home/cpu2017/je5.0.1-32" MALLOC_CONF = "retain:true" General Notes ------------- Binaries compiled on a system with 2x Intel Xeon Platinum 8280M CPU + 384GB RAM memory using Red Hat Enterprise Linux 8.4 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS Settings: Power Technology = Custom Power Performance Tuning = BIOS Controls EPB ENERGY_PERF_BIAS_CFG mode = Performance SNC = Enable Stale AtoS = Disable Patrol Scrub = Disable Sysinfo program /home/cpu2017/bin/sysinfo Rev: r6622 of 2021-04-07 982a61ec0915b55891ef0e16acafc64d running on localhost Wed Nov 23 00:25:06 2022 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6348H CPU @ 2.30GHz 4 "physical id"s (chips) 192 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 24 siblings : 48 physical 0: cores 0 1 2 3 4 5 8 9 10 11 12 13 16 17 18 19 20 21 24 25 26 27 28 29 physical 1: cores 0 1 2 3 4 5 8 9 10 11 12 13 16 17 18 19 20 21 24 25 26 27 28 29 physical 2: cores 0 1 2 3 4 5 8 9 10 11 12 13 16 17 18 19 20 21 24 25 26 27 28 29 physical 3: cores 0 1 2 3 4 5 8 9 10 11 12 13 16 17 18 19 20 21 24 25 26 27 28 29 From lscpu from util-linux 2.37.2: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Address sizes: 46 bits physical, 48 bits virtual Byte Order: Little Endian CPU(s): 192 On-line CPU(s) list: 0-191 Vendor ID: GenuineIntel Model name: Intel(R) Xeon(R) Gold 6348H CPU @ 2.30GHz CPU family: 6 Model: 85 Thread(s) per core: 2 Core(s) per socket: 24 Socket(s): 4 Stepping: 11 CPU max MHz: 4200.0000 CPU min MHz: 1000.0000 BogoMIPS: 4600.00 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local avx512_bf16 dtherm ida arat pln pts pku ospke avx512_vnni md_clear flush_l1d arch_capabilities Virtualization: VT-x L1d cache: 3 MiB (96 instances) L1i cache: 3 MiB (96 instances) L2 cache: 96 MiB (96 instances) L3 cache: 132 MiB (4 instances) NUMA node(s): 8 NUMA node0 CPU(s): 0-2,6-8,12-14,18-20,96-98,102-104,108-110,114-116 NUMA node1 CPU(s): 3-5,9-11,15-17,21-23,99-101,105-107,111-113,117-119 NUMA node2 CPU(s): 24-26,30-32,36-38,42-44,120-122,126-128,132-134,138-140 NUMA node3 CPU(s): 27-29,33-35,39-41,45-47,123-125,129-131,135-137,141-143 NUMA node4 CPU(s): 48-50,54-56,60-62,66-68,144-146,150-152,156-158,162-164 NUMA node5 CPU(s): 51-53,57-59,63-65,69-71,147-149,153-155,159-161,165-167 NUMA node6 CPU(s): 72-74,78-80,84-86,90-92,168-170,174-176,180-182,186-188 NUMA node7 CPU(s): 75-77,81-83,87-89,93-95,171-173,177-179,183-185,189-191 Vulnerability Itlb multihit: Not affected Vulnerability L1tf: Not affected Vulnerability Mds: Not affected Vulnerability Meltdown: Not affected Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl and seccomp Vulnerability Spectre v1: Mitigation; usercopy/swapgs barriers and __user pointer sanitization Vulnerability Spectre v2: Mitigation; Enhanced IBRS, IBPB conditional, RSB filling Vulnerability Srbds: Not affected Vulnerability Tsx async abort: Not affected From lscpu --cache: NAME ONE-SIZE ALL-SIZE WAYS TYPE LEVEL SETS PHY-LINE COHERENCY-SIZE L1d 32K 3M 8 Data 1 64 1 64 L1i 32K 3M 8 Instruction 1 64 1 64 L2 1M 96M 16 Unified 2 1024 1 64 L3 33M 132M 11 Unified 3 49152 1 64 /proc/cpuinfo cache data cache size : 33792 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 8 nodes (0-7) node 0 cpus: 0 1 2 6 7 8 12 13 14 18 19 20 96 97 98 102 103 104 108 109 110 114 115 116 node 0 size: 385605 MB node 0 free: 383960 MB node 1 cpus: 3 4 5 9 10 11 15 16 17 21 22 23 99 100 101 105 106 107 111 112 113 117 118 119 node 1 size: 387065 MB node 1 free: 380503 MB node 2 cpus: 24 25 26 30 31 32 36 37 38 42 43 44 120 121 122 126 127 128 132 133 134 138 139 140 node 2 size: 387065 MB node 2 free: 386395 MB node 3 cpus: 27 28 29 33 34 35 39 40 41 45 46 47 123 124 125 129 130 131 135 136 137 141 142 143 node 3 size: 387065 MB node 3 free: 386394 MB node 4 cpus: 48 49 50 54 55 56 60 61 62 66 67 68 144 145 146 150 151 152 156 157 158 162 163 164 node 4 size: 387065 MB node 4 free: 386271 MB node 5 cpus: 51 52 53 57 58 59 63 64 65 69 70 71 147 148 149 153 154 155 159 160 161 165 166 167 node 5 size: 387065 MB node 5 free: 386365 MB node 6 cpus: 72 73 74 78 79 80 84 85 86 90 91 92 168 169 170 174 175 176 180 181 182 186 187 188 node 6 size: 387031 MB node 6 free: 386341 MB node 7 cpus: 75 76 77 81 82 83 87 88 89 93 94 95 171 172 173 177 178 179 183 184 185 189 190 191 node 7 size: 387020 MB node 7 free: 386354 MB node distances: node 0 1 2 3 4 5 6 7 0: 10 11 20 20 20 20 20 20 1: 11 10 20 20 20 20 20 20 2: 20 20 10 11 20 20 20 20 3: 20 20 11 10 20 20 20 20 4: 20 20 20 20 10 11 20 20 5: 20 20 20 20 11 10 20 20 6: 20 20 20 20 20 20 10 11 7: 20 20 20 20 20 20 11 10 From /proc/meminfo MemTotal: 3169265676 kB HugePages_Total: 0 Hugepagesize: 2048 kB /sys/devices/system/cpu/cpu*/cpufreq/scaling_governor has powersave From /etc/*release* /etc/*version* os-release: NAME="SLES" VERSION="15-SP4" VERSION_ID="15.4" PRETTY_NAME="SUSE Linux Enterprise Server 15 SP4" ID="sles" ID_LIKE="suse" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:15:sp4" uname -a: Linux localhost 5.14.21-150400.22-default #1 SMP PREEMPT_DYNAMIC Wed May 11 06:57:18 UTC 2022 (49db222) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-12207 (iTLB Multihit): Not affected CVE-2018-3620 (L1 Terminal Fault): Not affected Microarchitectural Data Sampling: Not affected CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: usercopy/swapgs barriers and __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Enhanced IBRS, IBPB: conditional, RSB filling CVE-2020-0543 (Special Register Buffer Data Sampling): Not affected CVE-2019-11135 (TSX Asynchronous Abort): Not affected run-level 3 Nov 22 02:35 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/nvme0n1p2 xfs 475G 8.0G 467G 2% / From /sys/devices/virtual/dmi/id Vendor: Supermicro Product: Super Server Product Family: Family Serial: 0123456789 Additional information from dmidecode 3.2 follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 48x SK Hynix HMAA8GR7AJR4N-XN 64 GB 2 rank 3200, configured at 2933 BIOS: BIOS Vendor: American Megatrends International, LLC. BIOS Version: 1.3 BIOS Date: 07/18/2022 BIOS Revision: 5.22 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================================================ C | 502.gcc_r(peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on IA-32, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) 525.x264_r(base, peak) | 557.xz_r(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ C | 502.gcc_r(peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on IA-32, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) 525.x264_r(base, peak) | 557.xz_r(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ C++ | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base, peak) 531.deepsjeng_r(base, peak) | 541.leela_r(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ Fortran | 548.exchange2_r(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) Fortran Compiler for applications running on Intel(R) 64, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icx C++ benchmarks: icpx Fortran benchmarks: ifx Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -w -std=c11 -m64 -Wl,-z,muldefs -xCORE-AVX512 -O3 -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc C++ benchmarks: -w -m64 -Wl,-z,muldefs -xCORE-AVX512 -O3 -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc Fortran benchmarks: -w -m64 -Wl,-z,muldefs -xCORE-AVX512 -O3 -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -auto -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc Peak Compiler Invocation ------------------------ C benchmarks: icx C++ benchmarks: icpx Fortran benchmarks: ifx Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -w -std=c11 -m64 -Wl,-z,muldefs -fprofile-generate(pass 1) -fprofile-use=default.profdata(pass 2) -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -fno-strict-overflow -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc 502.gcc_r: -m32 -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/ia32_lin -std=gnu89 -Wl,-z,muldefs -fprofile-generate(pass 1) -fprofile-use=default.profdata(pass 2) -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/jemalloc32-5.0.1/lib -ljemalloc 505.mcf_r: basepeak = yes 525.x264_r: -w -std=c11 -m64 -Wl,-z,muldefs -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -fno-alias -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc 557.xz_r: basepeak = yes C++ benchmarks: 520.omnetpp_r: basepeak = yes 523.xalancbmk_r: basepeak = yes 531.deepsjeng_r: basepeak = yes 541.leela_r: basepeak = yes Fortran benchmarks: 548.exchange2_r: basepeak = yes The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic2022-official-linux64_revA.html http://www.spec.org/cpu2017/flags/Supermicro-Platform-Settings-V1.2-CLX-revJ.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic2022-official-linux64_revA.xml http://www.spec.org/cpu2017/flags/Supermicro-Platform-Settings-V1.2-CLX-revJ.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2024 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.8 on 2022-11-22 11:25:05-0500. Report generated on 2024-01-29 17:11:51 by CPU2017 text formatter v6255. Originally published on 2022-12-20.