SPEC CPU(R)2017 Floating Point Speed Result Cisco Systems Cisco UCS C245 M6 (AMD EPYC 7763 64-Core Processor) CPU2017 License: 9019 Test date: Jun-2021 Test sponsor: Cisco Systems Hardware availability: Jun-2021 Tested by: Cisco Systems Software availability: Mar-2021 Base Base Base Peak Peak Peak Benchmarks Threads Run Time Ratio Threads Run Time Ratio --------------- ------- --------- --------- ------- --------- --------- 603.bwaves_s 128 75.3 783 * 603.bwaves_s 128 75.3 783 S 603.bwaves_s 128 75.3 784 S 607.cactuBSSN_s 128 37.2 448 S 607.cactuBSSN_s 128 37.2 448 * 607.cactuBSSN_s 128 37.5 445 S 619.lbm_s 128 39.1 134 S 619.lbm_s 128 39.1 134 S 619.lbm_s 128 39.1 134 * 621.wrf_s 128 71.4 185 * 621.wrf_s 128 71.4 185 S 621.wrf_s 128 71.9 184 S 627.cam4_s 128 48.1 184 S 627.cam4_s 128 48.2 184 * 627.cam4_s 128 48.6 182 S 628.pop2_s 128 140 84.7 S 628.pop2_s 128 140 84.8 * 628.pop2_s 128 140 84.9 S 638.imagick_s 128 31.5 458 * 638.imagick_s 128 31.5 457 S 638.imagick_s 128 31.5 458 S 644.nab_s 128 28.4 614 * 644.nab_s 128 28.4 615 S 644.nab_s 128 28.4 614 S 649.fotonik3d_s 128 79.3 115 S 649.fotonik3d_s 128 78.3 116 * 649.fotonik3d_s 128 77.7 117 S 654.roms_s 128 46.4 339 S 654.roms_s 128 48.1 327 S 654.roms_s 128 46.7 337 * ================================================================================= 603.bwaves_s 128 75.3 783 * 607.cactuBSSN_s 128 37.2 448 * 619.lbm_s 128 39.1 134 * 621.wrf_s 128 71.4 185 * 627.cam4_s 128 48.2 184 * 628.pop2_s 128 140 84.8 * 638.imagick_s 128 31.5 458 * 644.nab_s 128 28.4 614 * 649.fotonik3d_s 128 78.3 116 * 654.roms_s 128 46.7 337 * SPECspeed(R)2017_fp_base 262 SPECspeed(R)2017_fp_peak Not Run HARDWARE -------- CPU Name: AMD EPYC 7763 Max MHz: 3500 Nominal: 2450 Enabled: 128 cores, 2 chips Orderable: 1,2 chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 512 KB I+D on chip per core L3: 256 MB I+D on chip per chip, 32 MB shared / 8 cores Other: None Memory: 2 TB (16 x 128 GB 4Rx4 PC4-3200V-L) Storage: 1 x 960 GB M.2 SSD SATA Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 15 SP2 (x86_64) kernel version 5.3.18-22-default Compiler: C/C++/Fortran: Version 3.0.0 of AOCC Parallel: Yes Firmware: Version 4.2.200.3 released May-2021 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: Not Applicable Other: jemalloc: jemalloc memory allocator library v5.2.0 Power Management: BIOS set to prefer performance at the cost of additional power usage Compiler Notes -------------- The AMD64 AOCC Compiler Suite is available at http://developer.amd.com/amd-aocc/ Submit Notes ------------ The config file option 'submit' was used. 'numactl' was used to bind copies to the cores. See the configuration file for details. Operating System Notes ---------------------- 'ulimit -s unlimited' was used to set environment stack size 'ulimit -l 2097152' was used to set environment locked pages in memory limit runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu 'echo 8 > /proc/sys/vm/dirty_ratio' run as root to limit dirty cache to 8% of memory. 'echo 1 > /proc/sys/vm/swappiness' run as root to limit swap usage to minimum necessary. 'echo 1 > /proc/sys/vm/zone_reclaim_mode' run as root to free node-local memory and avoid remote memory usage. 'sync; echo 3 > /proc/sys/vm/drop_caches' run as root to reset filesystem caches. 'sysctl -w kernel.randomize_va_space=0' run as root to disable address space layout randomization (ASLR) to reduce run-to-run variability. To enable Transparent Hugepages (THP) for all allocations, 'echo always > /sys/kernel/mm/transparent_hugepage/enabled' and 'echo always > /sys/kernel/mm/transparent_hugepage/defrag' run as root. Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: GOMP_CPU_AFFINITY = "0-127" LD_LIBRARY_PATH = "/home/arthur_backups/AMD/cpu2017/amd_speed_aocc300_milan_A_lib/64;/home /arthur_backups/AMD/cpu2017/amd_speed_aocc300_milan_A_lib/32:" MALLOC_CONF = "retain:true" OMP_DYNAMIC = "false" OMP_SCHEDULE = "static" OMP_STACKSIZE = "16G" OMP_THREAD_LIMIT = "128" General Notes ------------- Binaries were compiled on a system with 2x AMD EPYC 7713 CPU + 512GiB Memory using RHEL 8.2 NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc: configured and built with GCC v9.1.0 in Ubuntu 19.04 with -O3 -znver2 -flto jemalloc 5.2.0 is available here: https://github.com/jemalloc/jemalloc/releases/download/5.2.0/jemalloc-5.2.0.tar.bz2 Platform Notes -------------- BIOS Configuration SMT Mode set to Disabled NUMA nodes per socket set to NPS1 ACPI SRAT L3 Cache As NUMA Domain set to Enabled Determinism Slider set to Power cTDP Control set to Manual cTDP set to 280 EDC Control set to Manual EDC set to 300 Sysinfo program /home/arthur_backups/AMD/cpu2017/bin/sysinfo Rev: r6538 of 2020-09-24 e8664e66d2d7080afeaa89d4b38e2f1c running on localhost Fri Jun 4 22:58:12 2021 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : AMD EPYC 7763 64-Core Processor 2 "physical id"s (chips) 128 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 64 siblings : 64 physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian Address sizes: 48 bits physical, 48 bits virtual CPU(s): 128 On-line CPU(s) list: 0-127 Thread(s) per core: 1 Core(s) per socket: 64 Socket(s): 2 NUMA node(s): 16 Vendor ID: AuthenticAMD CPU family: 25 Model: 1 Model name: AMD EPYC 7763 64-Core Processor Stepping: 1 CPU MHz: 1707.096 CPU max MHz: 2450.0000 CPU min MHz: 1500.0000 BogoMIPS: 4890.72 Virtualization: AMD-V L1d cache: 32K L1i cache: 32K L2 cache: 512K L3 cache: 32768K NUMA node0 CPU(s): 0-7 NUMA node1 CPU(s): 8-15 NUMA node2 CPU(s): 16-23 NUMA node3 CPU(s): 24-31 NUMA node4 CPU(s): 32-39 NUMA node5 CPU(s): 40-47 NUMA node6 CPU(s): 48-55 NUMA node7 CPU(s): 56-63 NUMA node8 CPU(s): 64-71 NUMA node9 CPU(s): 72-79 NUMA node10 CPU(s): 80-87 NUMA node11 CPU(s): 88-95 NUMA node12 CPU(s): 96-103 NUMA node13 CPU(s): 104-111 NUMA node14 CPU(s): 112-119 NUMA node15 CPU(s): 120-127 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf pni pclmulqdq monitor ssse3 fma cx16 pcid sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 invpcid_single hw_pstate ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 erms invpcid cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr wbnoinvd arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold v_vmsave_vmload vgif umip pku ospke vaes vpclmulqdq rdpid overflow_recov succor smca /proc/cpuinfo cache data cache size : 512 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 16 nodes (0-15) node 0 cpus: 0 1 2 3 4 5 6 7 node 0 size: 128834 MB node 0 free: 128580 MB node 1 cpus: 8 9 10 11 12 13 14 15 node 1 size: 129021 MB node 1 free: 128918 MB node 2 cpus: 16 17 18 19 20 21 22 23 node 2 size: 129021 MB node 2 free: 128917 MB node 3 cpus: 24 25 26 27 28 29 30 31 node 3 size: 129021 MB node 3 free: 128638 MB node 4 cpus: 32 33 34 35 36 37 38 39 node 4 size: 129021 MB node 4 free: 128862 MB node 5 cpus: 40 41 42 43 44 45 46 47 node 5 size: 129021 MB node 5 free: 128896 MB node 6 cpus: 48 49 50 51 52 53 54 55 node 6 size: 129021 MB node 6 free: 128700 MB node 7 cpus: 56 57 58 59 60 61 62 63 node 7 size: 116909 MB node 7 free: 116803 MB node 8 cpus: 64 65 66 67 68 69 70 71 node 8 size: 129021 MB node 8 free: 128915 MB node 9 cpus: 72 73 74 75 76 77 78 79 node 9 size: 129021 MB node 9 free: 128924 MB node 10 cpus: 80 81 82 83 84 85 86 87 node 10 size: 129021 MB node 10 free: 128928 MB node 11 cpus: 88 89 90 91 92 93 94 95 node 11 size: 128988 MB node 11 free: 128898 MB node 12 cpus: 96 97 98 99 100 101 102 103 node 12 size: 129021 MB node 12 free: 128929 MB node 13 cpus: 104 105 106 107 108 109 110 111 node 13 size: 129021 MB node 13 free: 128931 MB node 14 cpus: 112 113 114 115 116 117 118 119 node 14 size: 129021 MB node 14 free: 128928 MB node 15 cpus: 120 121 122 123 124 125 126 127 node 15 size: 129016 MB node 15 free: 128925 MB node distances: node 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0: 10 11 11 11 11 11 11 11 32 32 32 32 32 32 32 32 1: 11 10 11 11 11 11 11 11 32 32 32 32 32 32 32 32 2: 11 11 10 11 11 11 11 11 32 32 32 32 32 32 32 32 3: 11 11 11 10 11 11 11 11 32 32 32 32 32 32 32 32 4: 11 11 11 11 10 11 11 11 32 32 32 32 32 32 32 32 5: 11 11 11 11 11 10 11 11 32 32 32 32 32 32 32 32 6: 11 11 11 11 11 11 10 11 32 32 32 32 32 32 32 32 7: 11 11 11 11 11 11 11 10 32 32 32 32 32 32 32 32 8: 32 32 32 32 32 32 32 32 10 11 11 11 11 11 11 11 9: 32 32 32 32 32 32 32 32 11 10 11 11 11 11 11 11 10: 32 32 32 32 32 32 32 32 11 11 10 11 11 11 11 11 11: 32 32 32 32 32 32 32 32 11 11 11 10 11 11 11 11 12: 32 32 32 32 32 32 32 32 11 11 11 11 10 11 11 11 13: 32 32 32 32 32 32 32 32 11 11 11 11 11 10 11 11 14: 32 32 32 32 32 32 32 32 11 11 11 11 11 11 10 11 15: 32 32 32 32 32 32 32 32 11 11 11 11 11 11 11 10 From /proc/meminfo MemTotal: 2101257152 kB HugePages_Total: 0 Hugepagesize: 2048 kB /sys/devices/system/cpu/cpu*/cpufreq/scaling_governor has performance From /etc/*release* /etc/*version* os-release: NAME="SLES" VERSION="15-SP2" VERSION_ID="15.2" PRETTY_NAME="SUSE Linux Enterprise Server 15 SP2" ID="sles" ID_LIKE="suse" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:15:sp2" uname -a: Linux localhost 5.3.18-22-default #1 SMP Wed Jun 3 12:16:43 UTC 2020 (720aeba) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-12207 (iTLB Multihit): Not affected CVE-2018-3620 (L1 Terminal Fault): Not affected Microarchitectural Data Sampling: Not affected CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: usercopy/swapgs barriers and __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Full AMD retpoline, IBPB: conditional, IBRS_FW, STIBP: disabled, RSB filling CVE-2020-0543 (Special Register Buffer Data Sampling): Not affected CVE-2019-11135 (TSX Asynchronous Abort): Not affected run-level 3 Apr 7 09:49 SPEC is set to: /home/arthur_backups/AMD/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/nvme0n1p17 xfs 792G 77G 716G 10% /home From /sys/devices/virtual/dmi/id Vendor: Cisco Systems Inc Product: UCSC-C245-M6SX Serial: WZP25120AZB Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 16x 0xCE00 M386AAG40AM3-CWE 128 GB 4 rank 3200 16x Unknown Unknown BIOS: BIOS Vendor: Cisco Systems, Inc. BIOS Version: C245M6.4.2.200.3.0518212014 BIOS Date: 05/18/2021 BIOS Revision: 5.22 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 619.lbm_s(base) 638.imagick_s(base) 644.nab_s(base) ------------------------------------------------------------------------------ AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on LLVM Mirror.Version.12.0.0) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin ------------------------------------------------------------------------------ ============================================================================== C++, C, Fortran | 607.cactuBSSN_s(base) ------------------------------------------------------------------------------ AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on LLVM Mirror.Version.12.0.0) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on LLVM Mirror.Version.12.0.0) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on LLVM Mirror.Version.12.0.0) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin ------------------------------------------------------------------------------ ============================================================================== Fortran | 603.bwaves_s(base) 649.fotonik3d_s(base) 654.roms_s(base) ------------------------------------------------------------------------------ AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on LLVM Mirror.Version.12.0.0) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 621.wrf_s(base) 627.cam4_s(base) 628.pop2_s(base) ------------------------------------------------------------------------------ AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on LLVM Mirror.Version.12.0.0) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on LLVM Mirror.Version.12.0.0) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: clang Fortran benchmarks: flang Benchmarks using both Fortran and C: flang clang Benchmarks using Fortran, C, and C++: clang++ clang flang Base Portability Flags ---------------------- 603.bwaves_s: -DSPEC_LP64 607.cactuBSSN_s: -DSPEC_LP64 619.lbm_s: -DSPEC_LP64 621.wrf_s: -DSPEC_CASE_FLAG -Mbyteswapio -DSPEC_LP64 627.cam4_s: -DSPEC_CASE_FLAG -DSPEC_LP64 628.pop2_s: -DSPEC_CASE_FLAG -Mbyteswapio -DSPEC_LP64 638.imagick_s: -DSPEC_LP64 644.nab_s: -DSPEC_LP64 649.fotonik3d_s: -DSPEC_LP64 654.roms_s: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -m64 -mno-adx -mno-sse4a -Wl,-mllvm -Wl,-region-vectorize -Wl,-mllvm -Wl,-function-specialize -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6 -Wl,-mllvm -Wl,-reduce-array-computations=3 -O3 -march=znver3 -fveclib=AMDLIBM -ffast-math -flto -fstruct-layout=5 -mllvm -unroll-threshold=50 -mllvm -inline-threshold=1000 -fremap-arrays -mllvm -function-specialize -flv-function-specialization -mllvm -enable-gvn-hoist -mllvm -global-vectorize-slp=true -mllvm -enable-licm-vrp -mllvm -reduce-array-computations=3 -z muldefs -DSPEC_OPENMP -fopenmp -fopenmp=libomp -lomp -lamdlibm -ljemalloc -lflang -lflangrti Fortran benchmarks: -m64 -mno-adx -mno-sse4a -Wl,-mllvm -Wl,-enable-X86-prefetching -Wl,-mllvm -Wl,-enable-licm-vrp -Wl,-mllvm -Wl,-region-vectorize -Wl,-mllvm -Wl,-function-specialize -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6 -Wl,-mllvm -Wl,-reduce-array-computations=3 -Hz,1,0x1 -O3 -march=znver3 -fveclib=AMDLIBM -ffast-math -Mrecursive -mllvm -fuse-tile-inner-loop -funroll-loops -mllvm -extra-vectorizer-passes -mllvm -lsr-in-nested-loop -mllvm -enable-licm-vrp -mllvm -reduce-array-computations=3 -mllvm -global-vectorize-slp=true -z muldefs -DSPEC_OPENMP -fopenmp -fopenmp=libomp -lomp -lamdlibm -ljemalloc -lflang -lflangrti Benchmarks using both Fortran and C: -m64 -mno-adx -mno-sse4a -Wl,-mllvm -Wl,-enable-X86-prefetching -Wl,-mllvm -Wl,-enable-licm-vrp -Wl,-mllvm -Wl,-region-vectorize -Wl,-mllvm -Wl,-function-specialize -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6 -Wl,-mllvm -Wl,-reduce-array-computations=3 -O3 -march=znver3 -fveclib=AMDLIBM -ffast-math -flto -fstruct-layout=5 -mllvm -unroll-threshold=50 -mllvm -inline-threshold=1000 -fremap-arrays -mllvm -function-specialize -flv-function-specialization -mllvm -enable-gvn-hoist -mllvm -global-vectorize-slp=true -mllvm -enable-licm-vrp -mllvm -reduce-array-computations=3 -Hz,1,0x1 -Mrecursive -mllvm -fuse-tile-inner-loop -funroll-loops -mllvm -extra-vectorizer-passes -mllvm -lsr-in-nested-loop -z muldefs -DSPEC_OPENMP -fopenmp -fopenmp=libomp -lomp -lamdlibm -ljemalloc -lflang -lflangrti Benchmarks using Fortran, C, and C++: -m64 -mno-adx -mno-sse4a -std=c++98 -Wl,-mllvm -Wl,-x86-use-vzeroupper=false -Wl,-mllvm -Wl,-region-vectorize -Wl,-mllvm -Wl,-function-specialize -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6 -Wl,-mllvm -Wl,-reduce-array-computations=3 -O3 -march=znver3 -fveclib=AMDLIBM -ffast-math -flto -fstruct-layout=5 -mllvm -unroll-threshold=50 -mllvm -inline-threshold=1000 -fremap-arrays -mllvm -function-specialize -flv-function-specialization -mllvm -enable-gvn-hoist -mllvm -global-vectorize-slp=true -mllvm -enable-licm-vrp -mllvm -reduce-array-computations=3 -mllvm -enable-partial-unswitch -mllvm -unroll-threshold=100 -finline-aggressive -mllvm -loop-unswitch-threshold=200000 -mllvm -reroll-loops -mllvm -aggressive-loop-unswitch -mllvm -extra-vectorizer-passes -mllvm -convert-pow-exp-to-int=false -Hz,1,0x1 -Mrecursive -mllvm -fuse-tile-inner-loop -funroll-loops -mllvm -lsr-in-nested-loop -z muldefs -DSPEC_OPENMP -fopenmp -fopenmp=libomp -lomp -lamdlibm -ljemalloc -lflang -lflangrti Base Other Flags ---------------- C benchmarks: -Wno-unused-command-line-argument -Wno-return-type Fortran benchmarks: -Wno-unused-command-line-argument -Wno-return-type Benchmarks using both Fortran and C: -Wno-unused-command-line-argument -Wno-return-type Benchmarks using Fortran, C, and C++: -Wno-unused-command-line-argument -Wno-return-type The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/aocc300-flags-A1.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-AMD-v2-revC.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/aocc300-flags-A1.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-AMD-v2-revC.xml SPEC CPU and SPECspeed are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2021 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.5 on 2021-06-05 01:58:11-0400. Report generated on 2021-06-22 17:07:38 by CPU2017 text formatter v6255. Originally published on 2021-06-22.