SPEC® CPU2017 Floating Point Rate Result

Copyright 2017-2019 Standard Performance Evaluation Corporation

Hewlett Packard Enterprise (Test Sponsor: HPE)

ProLiant BL460c Gen10
(3.80 GHz, Intel Xeon Gold 5222)

SPECrate2017_fp_base = 78.70

SPECrate2017_fp_peak = Not Run

CPU2017 License: 3 Test Date: Apr-2019
Test Sponsor: HPE Hardware Availability: Apr-2019
Tested by: HPE Software Availability: Feb-2019

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon Gold 5222
  Max MHz.: 3900
  Nominal: 3800
Enabled: 8 cores, 2 chips, 2 threads/core
Orderable: 1, 2 chip(s)
Cache L1: 32 KB I + 32 KB D on chip per core
  L2: 1 MB I+D on chip per core
  L3: 16.5 MB I+D on chip per chip
  Other: None
Memory: 192 GB (12 x 16 GB 2Rx8 PC4-2933Y-R,
running at 2666)
Storage: 1 x 400 GB SAS SSD, RAID 0
Other: None
Software
OS: SUSE Linux Enterprise Server 15 (x86_64)
Kernel 4.12.14-23-default
Compiler: C/C++: Version 19.0.2.187 of Intel C/C++
Compiler Build 20190117 for Linux;
Fortran: Version 19.0.2.187 of Intel Fortran
Compiler Build 20190117 for Linux
Parallel: No
Firmware: HPE BIOS Version I41 02/02/2019 released Apr-2019
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: Not Applicable
Other: None

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
SPECrate2017_fp_base 78.70
SPECrate2017_fp_peak Not Run
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
503.bwaves_r 16 524 3060 525 3060 527 3050
507.cactuBSSN_r 16 404 50.1 404 50.2 404 50.1
508.namd_r 16 330 46.1 327 46.5 330 46.0
510.parest_r 16 703 59.5 706 59.2 704 59.5
511.povray_r 16 514 72.7 511 73.1 512 73.0
519.lbm_r 16 367 46.0 366 46.1 366 46.1
521.wrf_r 16 392 91.5 390 91.8 391 91.6
526.blender_r 16 354 68.8 354 68.8 354 68.8
527.cam4_r 16 364 76.9 361 77.6 365 76.6
538.imagick_r 16 259 1540 262 1520 261 1520
544.nab_r 16 261 1030 263 1030 261 1030
549.fotonik3d_r 16 798 78.1 786 79.3 784 79.5
554.roms_r 16 482 52.8 486 52.3 488 52.1

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3 >       /proc/sys/vm/drop_caches
 runcpu command invoked through numactl i.e.:
  numactl --interleave=all runcpu <etc>

General Notes

Environment variables set by runcpu before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2017_u2/lib/ia32:/home/cpu2017_u2/lib/intel64"

 Binaries compiled on a system with 1x Intel Core i9-7900X CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.5
NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
is mitigated in the system as tested and documented.

Platform Notes

 BIOS Configuration:
  Thermal Configuration set to Maximum Cooling
  Memory Patrol Scrubbing set to Disabled
  LLC Prefetch set to Enabled
  LLC Dead Line Allocation set to Disabled
  Workload Profile set to General Throughput Compute
  Workload Profile set to Custom
   Energy/Performance Bias set to Balanced Performance
 Sysinfo program /home/cpu2017_u2/bin/sysinfo
 Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9
 running on bl460-sles15-6252 Wed Apr 17 10:56:36 2019

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Gold 5222 CPU @ 3.80GHz
       2  "physical id"s (chips)
       16 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 4
       siblings  : 8
       physical 0: cores 1 2 5 13
       physical 1: cores 2 5 9 13

 From lscpu:
      Architecture:        x86_64
      CPU op-mode(s):      32-bit, 64-bit
      Byte Order:          Little Endian
      CPU(s):              16
      On-line CPU(s) list: 0-15
      Thread(s) per core:  2
      Core(s) per socket:  4
      Socket(s):           2
      NUMA node(s):        4
      Vendor ID:           GenuineIntel
      CPU family:          6
      Model:               85
      Model name:          Intel(R) Xeon(R) Gold 5222 CPU @ 3.80GHz
      Stepping:            7
      CPU MHz:             3800.000
      BogoMIPS:            7600.00
      Virtualization:      VT-x
      L1d cache:           32K
      L1i cache:           32K
      L2 cache:            1024K
      L3 cache:            16896K
      NUMA node0 CPU(s):   0,1,8,9
      NUMA node1 CPU(s):   2,3,10,11
      NUMA node2 CPU(s):   4,5,12,13
      NUMA node3 CPU(s):   6,7,14,15
      Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
      pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp
      lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid
      aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3
      sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt
      tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault
      epb cat_l3 cdp_l3 invpcid_single intel_ppin mba tpr_shadow vnmi flexpriority ept
      vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a
      avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl
      xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local
      ibpb ibrs stibp dtherm ida arat pln pts pku ospke avx512_vnni arch_capabilities ssbd

 /proc/cpuinfo cache data
    cache size : 16896 KB

 From numactl --hardware  WARNING: a numactl 'node' might or might not correspond to a
 physical chip.
   available: 4 nodes (0-3)
   node 0 cpus: 0 1 8 9
   node 0 size: 47970 MB
   node 0 free: 47616 MB
   node 1 cpus: 2 3 10 11
   node 1 size: 48354 MB
   node 1 free: 48124 MB
   node 2 cpus: 4 5 12 13
   node 2 size: 48383 MB
   node 2 free: 48262 MB
   node 3 cpus: 6 7 14 15
   node 3 size: 48382 MB
   node 3 free: 48256 MB
   node distances:
   node   0   1   2   3
     0:  10  21  31  31
     1:  21  10  31  31
     2:  31  31  10  21
     3:  31  31  21  10

 From /proc/meminfo
    MemTotal:       197724304 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    os-release:
       NAME="SLES"
       VERSION="15"
       VERSION_ID="15"
       PRETTY_NAME="SUSE Linux Enterprise Server 15"
       ID="sles"
       ID_LIKE="suse"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:15"

 uname -a:
    Linux bl460-sles15-6252 4.12.14-23-default #1 SMP Tue May 29 21:04:44 UTC 2018
    (cd0437b) x86_64 x86_64 x86_64 GNU/Linux

 Kernel self-reported vulnerability status:

 CVE-2017-5754 (Meltdown):          Not affected
 CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization
 CVE-2017-5715 (Spectre variant 2): Mitigation: Indirect Branch Restricted Speculation,
 IBPB, IBRS_FW

 run-level 3 Apr 17 10:55

 SPEC is set to: /home/cpu2017_u2
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda5      xfs    72G   42G   30G  59% /home

 Additional information from dmidecode follows.  WARNING: Use caution when you interpret
 this section. The 'dmidecode' program reads system data which is "intended to allow
 hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   BIOS HPE I41 02/02/2019
   Memory:
    4x UNKNOWN NOT AVAILABLE
    12x UNKNOWN NOT AVAILABLE 16 GB 2 rank 2933

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
 CC  519.lbm_r(base) 538.imagick_r(base) 544.nab_r(base)
------------------------------------------------------------------------------
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.2.187 Build 20190117
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 CXXC 508.namd_r(base) 510.parest_r(base)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.2.187 Build 20190117
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 CC  511.povray_r(base) 526.blender_r(base)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.2.187 Build 20190117
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.2.187 Build 20190117
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 FC  507.cactuBSSN_r(base)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.2.187 Build 20190117
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.2.187 Build 20190117
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R)
  64, Version 19.0.2.187 Build 20190117
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 FC  503.bwaves_r(base) 549.fotonik3d_r(base) 554.roms_r(base)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R)
  64, Version 19.0.2.187 Build 20190117
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 CC  521.wrf_r(base) 527.cam4_r(base)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R)
  64, Version 19.0.2.187 Build 20190117
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.2.187 Build 20190117
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icc -m64 -std=c11 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 ifort -m64   icc -m64 -std=c11 

Benchmarks using both C and C++:

 icpc -m64   icc -m64 -std=c11 

Benchmarks using Fortran, C, and C++:

 icpc -m64   icc -m64 -std=c11   ifort -m64 

Base Portability Flags

503.bwaves_r:  -DSPEC_LP64 
507.cactuBSSN_r:  -DSPEC_LP64 
508.namd_r:  -DSPEC_LP64 
510.parest_r:  -DSPEC_LP64 
511.povray_r:  -DSPEC_LP64 
519.lbm_r:  -DSPEC_LP64 
521.wrf_r:  -DSPEC_LP64   -DSPEC_CASE_FLAG   -convert big_endian 
526.blender_r:  -DSPEC_LP64   -DSPEC_LINUX   -funsigned-char 
527.cam4_r:  -DSPEC_LP64   -DSPEC_CASE_FLAG 
538.imagick_r:  -DSPEC_LP64 
544.nab_r:  -DSPEC_LP64 
549.fotonik3d_r:  -DSPEC_LP64 
554.roms_r:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4 

C++ benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4 

Fortran benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -auto   -nostandard-realloc-lhs   -align array32byte 

Benchmarks using both Fortran and C:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -auto   -nostandard-realloc-lhs   -align array32byte 

Benchmarks using both C and C++:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4 

Benchmarks using Fortran, C, and C++:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -auto   -nostandard-realloc-lhs   -align array32byte 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/HPE-Platform-Flags-Intel-V1.2-CLX-revA.html,
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2019-04-03.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/HPE-Platform-Flags-Intel-V1.2-CLX-revA.xml,
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2019-04-03.xml.