SPEC CPU(R)2017 Integer Speed Result Cisco Systems Cisco UCS C480 M5 (Intel Xeon Gold 6142, 2.60 GHz) CPU2017 License: 9019 Test date: Jan-2019 Test sponsor: Cisco Systems Hardware availability: Aug-2017 Tested by: Cisco Systems Software availability: Oct-2018 Base Base Base Peak Peak Peak Benchmarks Threads Run Time Ratio Threads Run Time Ratio --------------- ------- --------- --------- ------- --------- --------- 600.perlbench_s 64 284 6.26 S 64 238 7.47 S 600.perlbench_s 64 288 6.16 S 64 243 7.32 S 600.perlbench_s 64 285 6.23 * 64 241 7.36 * 602.gcc_s 64 437 9.12 * 64 428 9.31 S 602.gcc_s 64 440 9.05 S 64 425 9.37 S 602.gcc_s 64 434 9.18 S 64 427 9.32 * 605.mcf_s 64 437 10.8 S 64 424 11.1 * 605.mcf_s 64 431 10.9 * 64 426 11.1 S 605.mcf_s 64 431 11.0 S 64 424 11.1 S 620.omnetpp_s 64 265 6.14 S 64 260 6.28 S 620.omnetpp_s 64 280 5.82 S 64 293 5.57 S 620.omnetpp_s 64 279 5.84 * 64 260 6.26 * 623.xalancbmk_s 64 151 9.40 S 64 139 10.2 * 623.xalancbmk_s 64 149 9.50 * 64 138 10.2 S 623.xalancbmk_s 64 148 9.58 S 64 139 10.2 S 625.x264_s 64 135 13.1 S 64 135 13.1 S 625.x264_s 64 135 13.1 S 64 135 13.1 S 625.x264_s 64 135 13.1 * 64 135 13.1 * 631.deepsjeng_s 64 277 5.17 * 64 281 5.10 S 631.deepsjeng_s 64 277 5.18 S 64 281 5.11 S 631.deepsjeng_s 64 277 5.17 S 64 281 5.10 * 641.leela_s 64 379 4.50 S 64 382 4.47 * 641.leela_s 64 379 4.51 * 64 381 4.48 S 641.leela_s 64 378 4.51 S 64 382 4.46 S 648.exchange2_s 64 219 13.5 * 64 219 13.4 S 648.exchange2_s 64 218 13.5 S 64 219 13.5 * 648.exchange2_s 64 219 13.4 S 64 218 13.5 S 657.xz_s 64 263 23.5 S 64 261 23.7 * 657.xz_s 64 261 23.7 S 64 261 23.7 S 657.xz_s 64 261 23.7 * 64 262 23.6 S ================================================================================= 600.perlbench_s 64 285 6.23 * 64 241 7.36 * 602.gcc_s 64 437 9.12 * 64 427 9.32 * 605.mcf_s 64 431 10.9 * 64 424 11.1 * 620.omnetpp_s 64 279 5.84 * 64 260 6.26 * 623.xalancbmk_s 64 149 9.50 * 64 139 10.2 * 625.x264_s 64 135 13.1 * 64 135 13.1 * 631.deepsjeng_s 64 277 5.17 * 64 281 5.10 * 641.leela_s 64 379 4.51 * 64 382 4.47 * 648.exchange2_s 64 219 13.5 * 64 219 13.5 * 657.xz_s 64 261 23.7 * 64 261 23.7 * SPECspeed(R)2017_int_base 8.96 SPECspeed(R)2017_int_peak 9.26 HARDWARE -------- CPU Name: Intel Xeon Gold 6142 Max MHz: 3700 Nominal: 2600 Enabled: 64 cores, 4 chips Orderable: 2,4 Chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 22 MB I+D on chip per chip Other: None Memory: 1536 GB (48 x 32 GB 2Rx4 PC4-2666V-R) Storage: 1 x 1 TB HDD, 7.2K RPM Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP2 (x86_64) 4.4.120-92.70-default Compiler: C/C++: Version 19.0.0.117 of Intel C/C++ Compiler for Linux; Fortran: Version 19.0.0.117 of Intel Fortran Compiler for Linux Parallel: Yes Firmware: Version 3.1.3e released Jun-2018 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc memory allocator V5.0.1 Power Management: -- Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: KMP_AFFINITY = "granularity=fine,scatter" LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64" OMP_STACKSIZE = "192M" Binaries compiled on a system with 1x Intel Core i9-7900X CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS Settings: Intel HyperThreading Technology set to Disabled CPU performance set to Enterprise Power Performance Tuning set to OS Controls SNC set to Disabled Patrol Scrub set to Disabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9 running on linux-9r4j Wed Jan 9 04:35:15 2019 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6142 CPU @ 2.60GHz 4 "physical id"s (chips) 64 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 16 siblings : 16 physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 2: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 3: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 64 On-line CPU(s) list: 0-63 Thread(s) per core: 1 Core(s) per socket: 16 Socket(s): 4 NUMA node(s): 4 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 6142 CPU @ 2.60GHz Stepping: 4 CPU MHz: 1350.564 CPU max MHz: 3700.0000 CPU min MHz: 1000.0000 BogoMIPS: 5194.41 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 22528K NUMA node0 CPU(s): 0-15 NUMA node1 CPU(s): 16-31 NUMA node2 CPU(s): 32-47 NUMA node3 CPU(s): 48-63 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb invpcid_single pln pts dtherm hwp hwp_act_window hwp_epp hwp_pkg_req intel_pt rsb_ctxsw spec_ctrl stibp retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc /proc/cpuinfo cache data cache size : 22528 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 4 nodes (0-3) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 node 0 size: 385622 MB node 0 free: 383225 MB node 1 cpus: 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 node 1 size: 387057 MB node 1 free: 383528 MB node 2 cpus: 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 node 2 size: 387057 MB node 2 free: 385730 MB node 3 cpus: 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 node 3 size: 387054 MB node 3 free: 384858 MB node distances: node 0 1 2 3 0: 10 21 21 21 1: 21 10 21 21 2: 21 21 10 21 3: 21 21 21 10 From /proc/meminfo MemTotal: 1583914512 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux linux-9r4j 4.4.120-92.70-default #1 SMP Wed Mar 14 15:59:43 UTC 2018 (52a83de) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2017-5754 (Meltdown): Mitigation: PTI CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: IBRS+IBPB run-level 3 Nov 30 15:41 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 xfs 930G 42G 889G 5% / Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. C480M5.3.1.3e.0.0613181101 06/13/2018 Memory: 48x 0xCE00 M393A4K40BB2-CTD 32 GB 2 rank 2666 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 600.perlbench_s(base, peak) 602.gcc_s(base, peak) 605.mcf_s(base, | peak) 625.x264_s(base, peak) 657.xz_s(base, peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 623.xalancbmk_s(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 620.omnetpp_s(base, peak) 623.xalancbmk_s(base) | 631.deepsjeng_s(base, peak) 641.leela_s(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 623.xalancbmk_s(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 620.omnetpp_s(base, peak) 623.xalancbmk_s(base) | 631.deepsjeng_s(base, peak) 641.leela_s(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 648.exchange2_s(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 600.perlbench_s: -DSPEC_LP64 -DSPEC_LINUX_X64 602.gcc_s: -DSPEC_LP64 605.mcf_s: -DSPEC_LP64 620.omnetpp_s: -DSPEC_LP64 623.xalancbmk_s: -DSPEC_LP64 -DSPEC_LINUX 625.x264_s: -DSPEC_LP64 631.deepsjeng_s: -DSPEC_LP64 641.leela_s: -DSPEC_LP64 648.exchange2_s: -DSPEC_LP64 657.xz_s: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/usr/local/je5.0.1-64/lib -ljemalloc Peak Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks (except as noted below): icpc -m64 623.xalancbmk_s: icpc -m32 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.0.117/linux/compiler/lib/ia32_lin Fortran benchmarks: ifort -m64 Peak Portability Flags ---------------------- 600.perlbench_s: -DSPEC_LP64 -DSPEC_LINUX_X64 602.gcc_s: -DSPEC_LP64 605.mcf_s: -DSPEC_LP64 620.omnetpp_s: -DSPEC_LP64 623.xalancbmk_s: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 625.x264_s: -DSPEC_LP64 631.deepsjeng_s: -DSPEC_LP64 641.leela_s: -DSPEC_LP64 648.exchange2_s: -DSPEC_LP64 657.xz_s: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 600.perlbench_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -O2 -xCORE-AVX512 -qopt-mem-layout-trans=3 -ipo -O3 -no-prec-div -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -fno-strict-overflow -L/usr/local/je5.0.1-64/lib -ljemalloc 602.gcc_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -O2 -xCORE-AVX512 -qopt-mem-layout-trans=3 -ipo -O3 -no-prec-div -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc 605.mcf_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc 625.x264_s: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc 657.xz_s: Same as 602.gcc_s C++ benchmarks: 620.omnetpp_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc 623.xalancbmk_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-32/lib -ljemalloc 631.deepsjeng_s: Same as 620.omnetpp_s 641.leela_s: Same as 620.omnetpp_s Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/usr/local/je5.0.1-64/lib -ljemalloc The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic19.0-official-linux64.2019-01-15.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic19.0-official-linux64.2019-01-15.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.xml SPEC CPU and SPECspeed are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2020 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.0.5 on 2019-01-09 04:35:15-0500. Report generated on 2020-07-01 13:41:11 by CPU2017 text formatter v6255. Originally published on 2019-02-19.