Cisco Systems Cisco UCS B480 M5 (Intel Xeon Gold 6140M, |
SPECrate2017_int_base = 366 |
SPECrate2017_int_peak = 385 |
CPU2017 License: | 9019 | Test Date: | Nov-2018 |
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Test Sponsor: | Cisco Systems | Hardware Availability: | Aug-2017 |
Tested by: | Cisco Systems | Software Availability: | Mar-2018 |
Benchmark result graphs are available in the PDF report.
Hardware | |
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CPU Name: | Intel Xeon Gold 6140M |
Max MHz.: | 3700 |
Nominal: | 2300 |
Enabled: | 72 cores, 4 chips, 2 threads/core |
Orderable: | 2,4 Chips |
Cache L1: | 32 KB I + 32 KB D on chip per core |
L2: | 1 MB I+D on chip per core |
L3: | 24.75 MB I+D on chip per chip |
Other: | None |
Memory: | 1536 GB (48 x 32 GB 2Rx4 PC4-2666V-R) |
Storage: | 1 x 400 GB SSD SAS |
Other: | None |
Software | |
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OS: | SUSE Linux Enterprise Server 12 SP2 (x86_64) 4.4.120-92.70-default |
Compiler: | C/C++: Version 18.0.2.199 of Intel C/C++ Compiler for Linux; Fortran: Version 18.0.2.199 of Intel Fortran Compiler for Linux |
Parallel: | No |
Firmware: | Version 3.2.3c released Mar-2018 |
File System: | xfs |
System State: | Run level 3 (multi-user) |
Base Pointers: | 64-bit |
Peak Pointers: | 32/64-bit |
Other: | jemalloc memory allocator V5.0.1 |
Benchmark | Base | Peak | ||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Copies | Seconds | Ratio | Seconds | Ratio | Seconds | Ratio | Copies | Seconds | Ratio | Seconds | Ratio | Seconds | Ratio | |
SPECrate2017_int_base | 366 | |||||||||||||
SPECrate2017_int_peak | 385 | |||||||||||||
Results appear in the order in which they were run. Bold underlined text indicates a median measurement. | ||||||||||||||
500.perlbench_r | 144 | 805 | 285 | 801 | 286 | 806 | 284 | 144 | 667 | 344 | 667 | 343 | 669 | 343 |
502.gcc_r | 144 | 670 | 304 | 671 | 304 | 675 | 302 | 144 | 551 | 370 | 551 | 370 | 552 | 369 |
505.mcf_r | 144 | 521 | 446 | 523 | 445 | 541 | 430 | 144 | 530 | 439 | 545 | 427 | 546 | 426 |
520.omnetpp_r | 144 | 818 | 231 | 816 | 231 | 817 | 231 | 144 | 814 | 232 | 857 | 221 | 868 | 218 |
523.xalancbmk_r | 144 | 445 | 342 | 445 | 341 | 444 | 342 | 144 | 359 | 424 | 357 | 426 | 358 | 425 |
525.x264_r | 144 | 336 | 751 | 336 | 751 | 336 | 750 | 144 | 320 | 788 | 321 | 786 | 321 | 786 |
531.deepsjeng_r | 144 | 506 | 326 | 506 | 326 | 503 | 328 | 144 | 515 | 320 | 524 | 315 | 523 | 316 |
541.leela_r | 144 | 768 | 311 | 776 | 307 | 773 | 309 | 144 | 750 | 318 | 745 | 320 | 756 | 315 |
548.exchange2_r | 144 | 531 | 711 | 532 | 709 | 532 | 709 | 144 | 530 | 711 | 531 | 711 | 531 | 711 |
557.xz_r | 144 | 582 | 267 | 582 | 267 | 580 | 268 | 144 | 626 | 248 | 627 | 248 | 628 | 248 |
The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file.
Stack size set to unlimited using "ulimit -s unlimited"
Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.4 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu <etc> Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc: configured and built at default for 32bit (i686) and 64bit (x86_64) targets; jemalloc: built with the RedHat Enterprise 7.4, and the system compiler gcc 4.8.5; jemalloc: sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases
BIOS Settings: Intel HyperThreading Technology set to Enabled CPU performance set to Enterprise Power Performance Tuning set to OS Controls SNC set to Enabled IMC Interleaving set to 1-way Interleave Patrol Scrub set to Disabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f running on linux-xy4f Fri Nov 16 18:36:15 2018 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6140M CPU @ 2.30GHz 4 "physical id"s (chips) 144 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 18 siblings : 36 physical 0: cores 0 1 2 3 4 8 9 10 11 16 17 18 19 20 24 25 26 27 physical 1: cores 0 1 2 3 4 8 9 10 11 16 17 18 19 20 24 25 26 27 physical 2: cores 0 1 2 3 4 8 9 10 11 16 17 18 19 20 24 25 26 27 physical 3: cores 0 1 2 3 4 8 9 10 11 16 17 18 19 20 24 25 26 27 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 144 On-line CPU(s) list: 0-143 Thread(s) per core: 2 Core(s) per socket: 18 Socket(s): 4 NUMA node(s): 8 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 6140M CPU @ 2.30GHz Stepping: 4 CPU MHz: 1349.982 CPU max MHz: 3700.0000 CPU min MHz: 1000.0000 BogoMIPS: 4600.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 25344K NUMA node0 CPU(s): 0-2,5,6,9,10,14,15,72-74,77,78,81,82,86,87 NUMA node1 CPU(s): 3,4,7,8,11-13,16,17,75,76,79,80,83-85,88,89 NUMA node2 CPU(s): 18-20,23,24,27,28,32,33,90-92,95,96,99,100,104,105 NUMA node3 CPU(s): 21,22,25,26,29-31,34,35,93,94,97,98,101-103,106,107 NUMA node4 CPU(s): 36-38,41,42,45,46,50,51,108-110,113,114,117,118,122,123 NUMA node5 CPU(s): 39,40,43,44,47-49,52,53,111,112,115,116,119-121,124,125 NUMA node6 CPU(s): 54-56,59,60,63,64,68,69,126-128,131,132,135,136,140,141 NUMA node7 CPU(s): 57,58,61,62,65-67,70,71,129,130,133,134,137-139,142,143 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb invpcid_single pln pts dtherm hwp hwp_act_window hwp_epp hwp_pkg_req intel_pt rsb_ctxsw spec_ctrl stibp retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc /proc/cpuinfo cache data cache size : 25344 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 8 nodes (0-7) node 0 cpus: 0 1 2 5 6 9 10 14 15 72 73 74 77 78 81 82 86 87 node 0 size: 192095 MB node 0 free: 188551 MB node 1 cpus: 3 4 7 8 11 12 13 16 17 75 76 79 80 83 84 85 88 89 node 1 size: 193528 MB node 1 free: 190231 MB node 2 cpus: 18 19 20 23 24 27 28 32 33 90 91 92 95 96 99 100 104 105 node 2 size: 193528 MB node 2 free: 190223 MB node 3 cpus: 21 22 25 26 29 30 31 34 35 93 94 97 98 101 102 103 106 107 node 3 size: 193528 MB node 3 free: 190217 MB node 4 cpus: 36 37 38 41 42 45 46 50 51 108 109 110 113 114 117 118 122 123 node 4 size: 193528 MB node 4 free: 190217 MB node 5 cpus: 39 40 43 44 47 48 49 52 53 111 112 115 116 119 120 121 124 125 node 5 size: 193528 MB node 5 free: 190238 MB node 6 cpus: 54 55 56 59 60 63 64 68 69 126 127 128 131 132 135 136 140 141 node 6 size: 193528 MB node 6 free: 190223 MB node 7 cpus: 57 58 61 62 65 66 67 70 71 129 130 133 134 137 138 139 142 143 node 7 size: 193525 MB node 7 free: 190221 MB node distances: node 0 1 2 3 4 5 6 7 0: 10 11 21 21 21 21 21 21 1: 11 10 21 21 21 21 21 21 2: 21 21 10 11 21 21 21 21 3: 21 21 11 10 21 21 21 21 4: 21 21 21 21 10 11 21 21 5: 21 21 21 21 11 10 21 21 6: 21 21 21 21 21 21 10 11 7: 21 21 21 21 21 21 11 10 From /proc/meminfo MemTotal: 1583914800 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux linux-xy4f 4.4.120-92.70-default #1 SMP Wed Mar 14 15:59:43 UTC 2018 (52a83de) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Jan 1 01:40 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 xfs 224G 93G 131G 42% / Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. B480M5.3.2.3c.0.0307181316 03/07/2018 Memory: 48x 0xCE00 M393A4K40BB2-CTD 32 GB 2 rank 2666 (End of data from sysinfo program)
============================================================================== CC 500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base, peak) 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CC 500.perlbench_r(peak) 502.gcc_r(peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base) 541.leela_r(base) ------------------------------------------------------------------------------ icpc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(peak) 523.xalancbmk_r(peak) 531.deepsjeng_r(peak) 541.leela_r(peak) ------------------------------------------------------------------------------ icpc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(base, peak) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------
icc -m64 -std=c11 |
icpc -m64 |
ifort -m64 |
500.perlbench_r: | -DSPEC_LP64 -DSPEC_LINUX_X64 |
502.gcc_r: | -DSPEC_LP64 |
505.mcf_r: | -DSPEC_LP64 |
520.omnetpp_r: | -DSPEC_LP64 |
523.xalancbmk_r: | -DSPEC_LP64 -DSPEC_LINUX |
525.x264_r: | -DSPEC_LP64 |
531.deepsjeng_r: | -DSPEC_LP64 |
541.leela_r: | -DSPEC_LP64 |
548.exchange2_r: | -DSPEC_LP64 |
557.xz_r: | -DSPEC_LP64 |
-Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-64/ -ljemalloc |
-Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-64/ -ljemalloc |
-Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/home/cpu2017/je5.0.1-64/ -ljemalloc |
icc -m64 -std=c11 | |
502.gcc_r: | icc -m32 -std=c11 -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32 |
icpc -m64 | |
523.xalancbmk_r: | icpc -m32 -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32 |
ifort -m64 |
500.perlbench_r: | -DSPEC_LP64 -DSPEC_LINUX_X64 |
502.gcc_r: | -D_FILE_OFFSET_BITS=64 |
505.mcf_r: | -DSPEC_LP64 |
520.omnetpp_r: | -DSPEC_LP64 |
523.xalancbmk_r: | -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX |
525.x264_r: | -DSPEC_LP64 |
531.deepsjeng_r: | -DSPEC_LP64 |
541.leela_r: | -DSPEC_LP64 |
548.exchange2_r: | -DSPEC_LP64 |
557.xz_r: | -DSPEC_LP64 |
500.perlbench_r: | -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-strict-overflow -L/home/cpu2017/je5.0.1-64/ -ljemalloc |
502.gcc_r: | -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-32/ -ljemalloc |
505.mcf_r: | -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-64/ -ljemalloc |
525.x264_r: | -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-alias -L/home/cpu2017/je5.0.1-64/ -ljemalloc |
557.xz_r: | Same as 505.mcf_r |
520.omnetpp_r: | -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-64/ -ljemalloc |
523.xalancbmk_r: | -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-32/ -ljemalloc |
531.deepsjeng_r: | Same as 520.omnetpp_r |
541.leela_r: | Same as 520.omnetpp_r |
-Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/home/cpu2017/je5.0.1-64/ -ljemalloc |