SPEC CPU(R)2017 Integer Rate Result Cisco Systems Cisco UCS B480 M5 (Intel Xeon Gold 6140, 2.30 GHz) CPU2017 License: 9019 Test date: May-2018 Test sponsor: Cisco Systems Hardware availability: Aug-2017 Tested by: Cisco Systems Software availability: Mar-2018 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 144 788 291 * 144 653 351 S 500.perlbench_r 144 799 287 S 144 663 346 S 500.perlbench_r 144 787 291 S 144 663 346 * 502.gcc_r 144 661 308 S 144 545 374 * 502.gcc_r 144 658 310 S 144 546 374 S 502.gcc_r 144 661 309 * 144 545 374 S 505.mcf_r 144 518 449 S 144 537 434 S 505.mcf_r 144 532 437 S 144 537 433 * 505.mcf_r 144 532 438 * 144 538 433 S 520.omnetpp_r 144 802 236 * 144 865 218 S 520.omnetpp_r 144 800 236 S 144 857 220 S 520.omnetpp_r 144 802 236 S 144 860 220 * 523.xalancbmk_r 144 447 340 * 144 359 423 S 523.xalancbmk_r 144 447 340 S 144 360 423 S 523.xalancbmk_r 144 451 337 S 144 359 423 * 525.x264_r 144 335 752 * 144 322 784 S 525.x264_r 144 336 751 S 144 321 785 * 525.x264_r 144 335 752 S 144 319 790 S 531.deepsjeng_r 144 503 328 S 144 527 313 S 531.deepsjeng_r 144 518 319 * 144 527 313 * 531.deepsjeng_r 144 520 318 S 144 527 313 S 541.leela_r 144 755 316 * 144 735 324 * 541.leela_r 144 755 316 S 144 735 324 S 541.leela_r 144 754 316 S 144 736 324 S 548.exchange2_r 144 530 712 * 144 529 713 * 548.exchange2_r 144 530 712 S 144 529 713 S 548.exchange2_r 144 530 712 S 144 529 713 S 557.xz_r 144 571 273 S 144 627 248 * 557.xz_r 144 617 252 * 144 627 248 S 557.xz_r 144 617 252 S 144 627 248 S ================================================================================= 500.perlbench_r 144 788 291 * 144 663 346 * 502.gcc_r 144 661 309 * 144 545 374 * 505.mcf_r 144 532 438 * 144 537 433 * 520.omnetpp_r 144 802 236 * 144 860 220 * 523.xalancbmk_r 144 447 340 * 144 359 423 * 525.x264_r 144 335 752 * 144 321 785 * 531.deepsjeng_r 144 518 319 * 144 527 313 * 541.leela_r 144 755 316 * 144 735 324 * 548.exchange2_r 144 530 712 * 144 529 713 * 557.xz_r 144 617 252 * 144 627 248 * SPECrate(R)2017_int_base 366 SPECrate(R)2017_int_peak 386 HARDWARE -------- CPU Name: Intel Xeon Gold 6140 Max MHz: 3700 Nominal: 2300 Enabled: 72 cores, 4 chips, 2 threads/core Orderable: 2,4 Chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 24.75 MB I+D on chip per chip Other: None Memory: 768 GB (48 x 16 GB 2Rx4 PC4-2666V-R) Storage: 1 x 240 GB M.2 SATA SSD Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP2 (x86_64) 4.4.103-92.56-default Compiler: C/C++: Version 18.0.2.199 of Intel C/C++ Compiler for Linux; Fortran: Version 18.0.2.199 of Intel Fortran Compiler for Linux Parallel: No Firmware: Version 3.2.3c released Mar-2018 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc: jemalloc memory allocator library V5.0.1; Power Management: -- Submit Notes ------------ The taskset mechanism was used to bind copies to processors. The config file option 'submit' was used to generate taskset commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-32:/home/cpu2017/je5.0.1-64" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.4 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc: configured and built at default for 32bit (i686) and 64bit (x86_64) targets; jemalloc: built with the RedHat Enterprise 7.4, and the system compiler gcc 4.8.5; jemalloc: sources avilable from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS Settings: Intel HyperThreading Technology set to Enabled CPU performance set to Enterprise Power Performance Tuning set to OS Controls SNC set to Enabled IMC Interleaving set to 1-way Interleave Patrol Scrub set to Disabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f running on linux-xy4f Wed May 30 00:03:49 2018 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6140 CPU @ 2.30GHz 4 "physical id"s (chips) 144 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 18 siblings : 36 physical 0: cores 0 1 2 3 4 8 9 10 11 16 17 18 19 20 24 25 26 27 physical 1: cores 0 1 2 3 4 8 9 10 11 16 17 18 19 20 24 25 26 27 physical 2: cores 0 1 2 3 4 8 9 10 11 16 17 18 19 20 24 25 26 27 physical 3: cores 0 1 2 3 4 8 9 10 11 16 17 18 19 20 24 25 26 27 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 144 On-line CPU(s) list: 0-143 Thread(s) per core: 2 Core(s) per socket: 18 Socket(s): 4 NUMA node(s): 8 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 6140 CPU @ 2.30GHz Stepping: 4 CPU MHz: 3000.000 CPU max MHz: 3700.0000 CPU min MHz: 1000.0000 BogoMIPS: 4599.99 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 25344K NUMA node0 CPU(s): 0-2,5,6,9,10,14,15,72-74,77,78,81,82,86,87 NUMA node1 CPU(s): 3,4,7,8,11-13,16,17,75,76,79,80,83-85,88,89 NUMA node2 CPU(s): 18-20,23,24,27,28,32,33,90-92,95,96,99,100,104,105 NUMA node3 CPU(s): 21,22,25,26,29-31,34,35,93,94,97,98,101-103,106,107 NUMA node4 CPU(s): 36-38,41,42,45,46,50,51,108-110,113,114,117,118,122,123 NUMA node5 CPU(s): 39,40,43,44,47-49,52,53,111,112,115,116,119-121,124,125 NUMA node6 CPU(s): 54-56,59,60,63,64,68,69,126-128,131,132,135,136,140,141 NUMA node7 CPU(s): 57,58,61,62,65-67,70,71,129,130,133,134,137-139,142,143 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb invpcid_single pln pts dtherm hwp hwp_act_window hwp_epp hwp_pkg_req intel_pt spec_ctrl kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc /proc/cpuinfo cache data cache size : 25344 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 8 nodes (0-7) node 0 cpus: 0 1 2 5 6 9 10 14 15 72 73 74 77 78 81 82 86 87 node 0 size: 95327 MB node 0 free: 95189 MB node 1 cpus: 3 4 7 8 11 12 13 16 17 75 76 79 80 83 84 85 88 89 node 1 size: 96760 MB node 1 free: 96599 MB node 2 cpus: 18 19 20 23 24 27 28 32 33 90 91 92 95 96 99 100 104 105 node 2 size: 96760 MB node 2 free: 96586 MB node 3 cpus: 21 22 25 26 29 30 31 34 35 93 94 97 98 101 102 103 106 107 node 3 size: 96760 MB node 3 free: 96558 MB node 4 cpus: 36 37 38 41 42 45 46 50 51 108 109 110 113 114 117 118 122 123 node 4 size: 96760 MB node 4 free: 96641 MB node 5 cpus: 39 40 43 44 47 48 49 52 53 111 112 115 116 119 120 121 124 125 node 5 size: 96760 MB node 5 free: 96626 MB node 6 cpus: 54 55 56 59 60 63 64 68 69 126 127 128 131 132 135 136 140 141 node 6 size: 96760 MB node 6 free: 96645 MB node 7 cpus: 57 58 61 62 65 66 67 70 71 129 130 133 134 137 138 139 142 143 node 7 size: 96758 MB node 7 free: 96584 MB node distances: node 0 1 2 3 4 5 6 7 0: 10 11 21 21 21 21 21 21 1: 11 10 21 21 21 21 21 21 2: 21 21 10 11 21 21 21 21 3: 21 21 11 10 21 21 21 21 4: 21 21 21 21 10 11 21 21 5: 21 21 21 21 11 10 21 21 6: 21 21 21 21 21 21 10 11 7: 21 21 21 21 21 21 11 10 From /proc/meminfo MemTotal: 791191864 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux linux-xy4f 4.4.103-92.56-default #1 SMP Wed Dec 27 16:24:31 UTC 2017 (2fd2155) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Jan 1 06:47 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 xfs 224G 81G 143G 37% / Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. B480M5.3.2.3c.0.0307181316 03/07/2018 Memory: 48x 0xCE00 M393A2G40EB2-CTD 16 GB 2 rank 2666 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 500.perlbench_r(base, peak) 502.gcc_r(base, peak) 505.mcf_r(base, | peak) 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base, peak) | 531.deepsjeng_r(base, peak) 541.leela_r(base, peak) ------------------------------------------------------------------------------ icpc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 548.exchange2_r(base, peak) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-64/ -ljemalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-64/ -ljemalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/home/cpu2017/je5.0.1-64/ -ljemalloc Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 -std=c11 502.gcc_r: icc -m32 -std=c11 -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32 C++ benchmarks (except as noted below): icpc -m64 523.xalancbmk_r: icpc -m32 -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32 Fortran benchmarks: ifort -m64 Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-strict-overflow -L/home/cpu2017/je5.0.1-64/ -ljemalloc 502.gcc_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-32/ -ljemalloc 505.mcf_r: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-64/ -ljemalloc 525.x264_r: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-alias -L/home/cpu2017/je5.0.1-64/ -ljemalloc 557.xz_r: Same as 505.mcf_r C++ benchmarks: 520.omnetpp_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-64/ -ljemalloc 523.xalancbmk_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-32/ -ljemalloc 531.deepsjeng_r: Same as 520.omnetpp_r 541.leela_r: Same as 520.omnetpp_r Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/home/cpu2017/je5.0.1-64/ -ljemalloc The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2018-06-13.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2018-06-13.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2019 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.0.2 on 2018-05-30 00:03:48-0400. Report generated on 2019-12-13 18:56:31 by CPU2017 text formatter v6255. Originally published on 2018-06-26.