xFusion-Platform-Settings-GNR-V1.7 SPEC CPU2017 software OS and BIOS Settings Descriptions for xFusion Platform systems
cpupower frequency-set
cpupower utility is a collection of tools for power efficiency of processor. frequency-set sub-command controls settings for processor frequency. "-g [governor]" specifies a policy to select processor frequency. The performance governor statically sets frequency of the processor cores specified by "-c" option to the highest possible for maximum performance.
cpupower idle-set
idle-set sub-command of cpupower utility controls a processor idle state (C-state) of the kernel. "-d [state_no]>" option disables a specific processor idle state. Disabling idle state can reduce the idle-wakeup delay, but it results in substantially higher power consumption. By default, processor idle states of all CPU cores are set.
irqbalance
Disabled through "service irqbalance stop". Depending on the workload involved, the irqbalance service reassigns various IRQ's to system CPUs. Though this service might help in some situations, disabling it can also help environments which need to minimize or eliminate latency to more quickly respond to events.
isolcpus
This kernel option excludes a specified processor from load balancing by the kernel scheduler. This prevents the scheduler from scheduling any user-space threads on this processor.
nohz_full
This kernel option sets adaptive tick mode (NOHZ_FULL) to specified processors. Since the number of interrupts is reduced to ones per second, latency-sensitive applications can take advantage of it.
numa_balancing
This OS setting controls automatic NUMA balancing on memory mapping and process placement. Setting 0 disables this feature. It is enabled by default (1).
sched_latency_ns
This OS setting configures targeted preemption latency for CPU bound tasks. The default value is 24000000 (ns).
sched_migration_cost_ns
Amount of time after the last execution that a task is considered to be "cache hot" in migration decisions. A "hot" task is less likely to be migrated to another CPU, so increasing this variable reduces task migrations. The default value is 500000 (ns).
sched_min_granularity_ns
This OS setting controls the minimal preemption granularity for CPU bound tasks. As the number of runnable tasks increases, CFS(Complete Fair Scheduler), the scheduler of the Linux kernel, decreases the timeslices of tasks. If the number of runnable tasks exceeds sched_latency_ns/sched_min_granularity_ns, the timeslice becomes number_of_running_tasks * sched_min_granularity_ns. The default value is 10000000(ns).
sched_wakeup_granularity_ns
This OS setting controls the wake-up preemption granularity. Increasing this variable reduces wake-up preemption, reducing disturbance of compute bound tasks. Lowering it improves wake-up latency and throughput for latency critical tasks, particularly when a short duty cycle load component must compete with CPU bound components. The default value is 15000000 (ns).
tuned-adm
A commandline interface for switching between different tuning profiles available in supported Linux distributions. The distribution provided profiles are located in /usr/lib/tuned and the user defined profiles in /etc/tuned. To set a profile, one can issue the command "tuned-adm profile (profile_name)".
Below are details about some relevant profiles:
  • throughput-performance: For typical throughput performance tuning. Disables power saving mechanisms and enables sysctl settings that improve the throughput performance of disk and network I/O. CPU governor is set to performance and CPU energy performance bias is set to performance. Disk readahead values are increased.
  • latency-performance: For low latency performance tuning. Disables power saving mechanisms. CPU governor is set to performance and locked to the low C states. CPU energy performance bias to performance.
  • balanced: Default profile provides balanced power saving and performance. It enables CPU and disk plugins of tuned and makes the conservative governor is active and also sets the CPU energy performance bias to normal. It also enables power saving on audio and graphics card.
  • powersave: Maximal power saving for whole system. It sets the CPU governor to ondemand governor and energy performance bias to powersave. It also enable power saving on USB, SATA, audio and graphics card.
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Hardware Prefetcher (Default = Enabled)

This BIOS option allows the enabling/disabling of a processor mechanism to prefetch data into the cache according to a pattern-recognition algorithm In some cases, setting this option to Disabled may improve performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.

DCU IP Prefetcher (Default = Enabled)

DCU Instruction Pointer (IP) prefetcher is an L1 cache prefetcher. Recommended default setting is Enabled. In some cases, setting this option to disabled can improve performance. Values for this BIOS option can be: Disabled/Enabled.

DCU Streamer Prefetcher (Default = Auto)

DCU Streamer Prefetcher is an L1 data cache prefetcher. When enabled, this parameter fetches the next cache line into the L1 data cache when multiple loads from the same cache line are executed in a certain time limit. Lightly threaded applications and some benchmarks can benefit from having the DCU streamer prefetcher enabled. Values for this BIOS option can be: Auto/Enable/Disable. Current default is Auto (Same as Enable).

Adjacent Cache Prefetch (Default = Enabled)

Adjacent Cache Prefetch (a.k.a. MLC Spatial Prefetcher) is an L2 cache prefetcher. When enabled, fetches both cache lines that make up a 128 byte cache line pair even if the requested data is only in the first cache line. Lightly threaded applications and some benchmarks can benefit from having the adjcent cache line prefetch enabled. Values for this BIOS option can be: Disabled/Enabled.

Last Level Cache (LLC) Prefetch (Default = Disabled)

The last level cache (LLC) prefetch is a prefetcher added to the Intel Xeon Scalable processor family as a result of the non-inclusive cache architecture. The LLC prefetcher is an additional prefetch mechanism on top of the existing prefetchers that prefetch data into the core Data Cache Unit (DCU) and Mid-Level Cache (MLC or second-level cache (L2)). Enabling LLC prefetch gives the core prefetcher the ability to prefetch data directly into the LLC without necessarily filling into the L1 and L2 cache. In some cases, setting this option to disabled can improve performance.

Values for this BIOS option can be:

Disabled: Disables the LLC prefetcher. The other core prefetchers are unaffected.

Enabled: Gives the core prefetcher the ability to prefetch data directly to the LLC.

Page Policy (Default = Adaptive)

A memory controller "page" is data in the DRAM row buffer. Open (adaptive) page mode keeps the page open for some amount of time after access. Closed page mode closes the page immediately after access. Tradeoff between the lower latency of a page hit and the additional latency of a page miss (which requires a page close before opening a new one). Setting the memory controller page policy to closed may improve performance. Values for this BIOS option can be: Auto/Adaptive/Closed. Current default is Adaptive (Same as Auto).

Turbo Mode (Default = Enabled)

Intel Turbo boost Technology, Enabling this option allows the processor cores to automatically increase its frequency and increasing performance if it is running below power, temperature.

Enable LP [Global] (Default = ALL LPs)

The Intel Hyper-Threading knob has been renamed Enable LP [Global] to represent the number of logical processors (LP). Enabling this option allows to use processor resources more efficiently, enabling multiple threads to run on each core and increases processor throughput, improving overall performance on threaded software.

ALL LPs: Hyper-Threading is enabled, each physical processor core functions as two logical processor cores.

Single LP: Run a single logical processor per core.

Performance Profile (Default = Custom)

Values for this BIOS setting can be:

Custom: Allows the user to setup all of the BIOS options according to their requirement.

Performance: Maximize the performance of the server.

Efficiency: Maximize the power efficiency of the server.

Load Balance: The system's performance and power consumption will be adjusted automatically according to the loading.

ACPI C6x Enumeration (Default = Auto)
Use this feature to configure C6 state or C6 P-state as ACPI C2 or ACPI C3 state.
  • Disabled: Don't enumerate any C6S state in ACPI.
  • C6 as ACPI C2: Enumerate C6 as ACPI C2 state. PkgC6 is not allowed.
  • C6 as ACPI C3: Enumerate C6 as ACPI C3 state. PkgC6 is not allowed..
  • C6-P as ACPI C2: Enumerate C6-P as ACPI C2 state. PkgC6 is allowed.
  • C6-P as ACPI C3: Enumerate C6-P as ACPI C3 state. PkgC6 is allowed.
  • Auto(Default Setting): Maps to C6 or C6-P as ACPI C2.
C1 to C1e Promotion (Default = Disabled)

When set to Enabled, the processor is allowed to switch to nimimum performance and save power when idle. Values for this BIOS setting can be: Disabled/Enabled.

Sub NUMA Cluster（SNC）(Default = Auto)

Sub NUMA Clustering (SNC) is a feature for breaking up the LLC into disjoint clusters based on address range,with each cluster bound to a subset of the memory controllers in the system.It improves average latency to the LLC.

Values for this BIOS option can be:

Enabled: "Enabled" means to Enable SNC mode, enabling different SNC(x) according to processor Die architectures.

Disabled: "Disabled" means to Disable SNC mode. SNC disabled will support 1-cluster.

Auto: Same as "Enabled".

Adaptive Double Device Data Correction (ADDDC) Sparing (Default = Disabled)

Adaptive Double Device Data Correction (ADDDC), which is an enhanced feature to DDDC. This function is used to correct data errors on two memory particles, ADDDC still has single-particle multi-bit error correction capability after the first particle failure occurs and is replaced.

Values for this BIOS option can be:

Enabled: Enable the ADDDC Sparing function.

Disabled: Disable the ADDDC Sparing function.

LLC dead line alloc (Default = Enabled)

LLC dead line allocation. The processor marks the row replaced by the MLC as dead, indicating that the row will not be read again. This function is used to set the allocation policy for the data marked as dead in the LLC.

Values for this BIOS option can be:

Enabled: Allows the LLC to fill dead lines into the LLC if there is free space.

Disabled: The dead lines are dropped and are never filled into the LLC, saving the LLC space.

Stale AtoS (Default = Auto)

The in-memory directory has three states: invalid (I), snoopAll (A), and shared (S). Invalid (I) state means the data is clean and does not exist in any other socket`s cache. The snoopAll (A) state means the data may exist in another socket in exclusive or modified state. Shared (S) state means the data is clean and may be shared across one or more socket`s caches. When doing a read to memory, if the directory line is in the A state we must snoop all the other sockets because another socket may have the line in modified state. If this is the case, the snoop will return the modified data. However, it may be the case that a line is read in A state and all the snoops come back a miss. This can happen if another socket read the line earlier and then silently dropped it from its cache without modifying it.

Values for this BIOS option can be:

Auto: The SnoopAll (A) state is used by default. During uncore post MRC, the state is reconfigured based on the setup knob, number of sockets, and BPS memory.

Enabled: The SnoopAll (A) state is changed to the Shared (S) state.

Disabled: The SnoopAll (A) state is used.

Latency Optimized Mode (Default = Disabled)
Prioritize low latency and consistent performance over energy efficiency or other optimizations. Values for this BIOS option can be:
  • Disabled: Out-of-box mode for newer disaggregated SoC arch with significant power savings across the load line. Better performance per watt across the load line. No significant difference in performance compared to Latency Optimized Mode at 100% Load Level.
  • Enabled: Uncore frequencies will run up to their maximum limits within the RAPL budget. This mode is not performance-per-watt optimized across the load line.
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