SPEC CPU2017 Platform Settings for New_H3C AMD-based Systems
- ulimit -s [n | unlimited]:
-
Set the stack size to n kbytes, or unlimited to allow the stack size to grow without limit.
- numactl --interleave=all "runspec command":
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Launching a process with numactl --interleave=all sets the memory interleave policy so that memory will be allocated using round robin on nodes.
When memory cannot be allocated on the current interleave target fall back to other nodes.
- swappiness:
-
This control is used to define how aggressively the kernel swaps out anonymous memory relative to pagecache and other caches. Increasing the value increases the amount of swapping.
The default value is 60. A value of 1 tells the kernel to only swap processes to disk if absolutely necessary. This can be set through a command like "echo 1 > /proc/sys/vm/swappiness".
- Zone Reclaim:
-
Zone reclaim allows the reclaiming of pages from a zone if the number of free pages falls below a watermark even
if other zones still have enough pages available.
Reclaiming a page can be more beneficial than taking the performance penalties that are associated with allocating a page on a remote zone, especially for NUMA machines.
- vm.dirty_ratio:
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This setting is the absolute maximum amount of system memory that can be filled with dirty pages before everything must get committed to disk.
- cpupower frequency-set:
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cpupower utility is a collection of tools for power efficiency of processor.
frequency-set sub-command controls settings for processor frequency.
"-g [governor]" specifies a policy to select processor frequency.
The performance governor statically sets frequency of the processor cores specified by "-c" option to the highest possible for maximum performance.
- kernel.randomize_va_space (ASLR)
-
This setting can be used to control the memory address randomization mechanism (address space layout randomization) under Linux.
Possible settings:
- 0: Turn process address space randomization off.
- 1: Randomize addresses of mmap base, stack, and VDSO pages.
- 2: Additionally randomize the heap.
- Transparent Hugepages (THP)
-
THP is an abstraction layer that automates most aspects of creating, managing,
and using huge pages. It is designed to hide much of the complexity in using
huge pages from system administrators and developers. Huge pages
increase the memory page size from 4 kilobytes to 2 megabytes. This provides
significant performance advantages on systems with highly contended resources
and large memory workloads. If memory utilization is too high or memory is badly
fragmented which prevents hugepages being allocated, the kernel will assign
smaller 4k pages instead. Most recent Linux OS releases have THP enabled by default.
THP usage is controlled by the sysfs setting /sys/kernel/mm/transparent_hugepage/enabled.
Possible values:
- never: entirely disable THP usage.
- madvise: enable THP usage only inside regions marked MADV_HUGEPAGE using madvise(3).
- always: enable THP usage system-wide. This is the default.
THP creation is controlled by the sysfs setting /sys/kernel/mm/transparent_hugepage/defrag.
Possible values:
- never: if no THP are available to satisfy a request, do not attempt to make any.
- defer: an allocation requesting THP when none are available get normal pages while requesting THP creation in the background.
- defer+madvise: acts like "always", but only for allocations in regions marked MADV_HUGEPAGE using madvise(3); for all other regions it's like "defer".
- madvise: acts like "always", but only for allocations in regions marked MADV_HUGEPAGE using madvise(3). This is the default.
- always: an allocation requesting THP when none are available will stall until some are made.
An application that "always" requests THP often can benefit from waiting for an allocation until those huge pages can be assembled.
For more information see the Linux transparent hugepage documentation.
- drop_cache:
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This Command "sysctl -w vm.drop_caches=3" is used to release the filesystem cache for memory reclamation.
- SMT Control: (Default="Enabled"):
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This is CPU Symmetric Multi-Threading (SMT) function. With SMT Control enabled,each physical processor core operates as two logical processor cores.
Values for this BIOS setting can be:
- Disabled: Disable symmertic multi-threading.
- Enabled: Enable symmertic multi-threading.
- SVM Mode:(Default="Enabled"):
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This is CPU virtualization function. With SVM enabled you'll be able to install a virtual machine on your system.
Values for this BIOS setting can be:
- Disabled: Disable CPU Virtualization.
- Enabled: Enable CPU Virtualization.
- ACPI SRAT L3 Cache As NUMA Domain: (Default="Auto"):
-
Each L3 Cache will be exposed as a NUMA node when enabling ACPI SRAT L3 Cache as a NUMA node.
On a dual processor system, with up to 8 L3 Caches per processor, this setting will expose 16 NUMA domains.
Values for this BIOS setting can be:
- Auto: Use default value of CPI SRAT L3 Cache As NUMA Domain.
- Enabled: Each CCX in the system will be declared as a separate NUMA domain.
- Disabled: Memory Addressing \ NUMA nodes per socket will be declared.
- L1/L2 Stream HW Prefetcher: (Default="Auto"):
-
Most workloads will benefit from the L1 and L2 Stream Hardware prefetchers gathering data and keeping the core pipeline busy.
There are however some workloads that are very random in nature and will actually obtain better overall performance by disabling one or both of the prefetchers.
Values for this BIOS setting can be:
- Auto: Use default value of L1/L2 Stream HW Prefetcher.
- Enabled: Enable L1/L2 Stream HW Prefetcher.
- Disabled: Disable L1/L2 Stream HW Prefetcher.
- DLWM Support: (Default="Auto"):
-
Dynamic Link Width Management(DLWM) reduces xGMI lane width from x16 to x8 or x2 if xGMI links have limited traffic. DLWM feature is optimized to
trade power between CPU core intensive workloads and I/O bandwidth intensiveworkloads. When link activity is above a threshold, DLWM will
increase lane width from x8 to x16 at the cost of some delay, because the I/O die must disconnect the links, retrain them at the new speed
and release the system back to functionality.Values for this BIOS setting can be:
- Auto: Use default value of DLWM.
- Enabled: Enable DLWM Support.
- Disabled: Disable DLWM Support.
- IOMMU: (Default="Auto"):
-
The Input-Output Memory Management Unit(IOMMU) provides several benefits and is required when using x2APIC. Enabling the IOMMU allows devices
(such as the EPYC integrated SATA controller) to present separate IRQs for each attached device instead of one IRQ for the subsystem.
The IOMMU also allows operating systems to provide additional protection for DMA capable I/O devices.
Values for this BIOS option can be:
- Auto: Use default value of IOMMU.
- Enabled: Enable I/O memory management unit.
- Disabled: Disable I/O memory management unit.
- ACPI_CST C1 Declaration: (Default="Auto"):
-
Determins whether or not to declare the C1 state to the OS.Values for this BIOS option can be:
- Auto: Use default value of ACPI_CST C1 Declaration.
- Enabled: Declare the C1 state to the OS.
- Disabled: Not declare the C1 state to the OS.
- Determinism Slider: (Default="Auto"):
-
This option allows for AGESA determinism to control performance. Values for this BIOS setting can be:
- Auto: Use AGESA default value for deterministic performance control.
- Performance: Provides predictable performance across all processors of the same type.
- Power: Maximizes performance within the power limits defined by cTDP and PPT.
- Global C-states Control: (Default="Disabled"):
-
Controls IO based C-state generation and DF C-states.Values for this BIOS setting can be:
- Auto: Use default value of Global C-states Control.
- Enabled: Enable CPUs to operate in C-state power saving mode.
- Disabled: Disable CPUs to operate in C-state power saving mode.
- cTDP Control: (Default="Auto"):
-
This option allows for user to set customized value of TDP.Values for this BIOS setting can be:
- Auto: Use the fused cTDP.
- Manual: User can set customized cTDP.
- cTDP:
-
TDP is an acronym for "Thermal Design Power." TDP is the recommended target for power used when designing the cooling capacity for a server.
EPYC processors are able to control this target power consumption within certain limits. This capability is referred to as "configurable TDP" or "cTDP."
cTDP can be used to reduce power consumption for greater efficiency, or in some cases, increase power consumption above the default value to provide additional performance.
cTDP is controlled using a BIOS option.
| Model | Minimum cTDP | Maximum cTDP |
|---|
| EPYC 7763 | 225 | 280 |
| EPYC 7713 | 225 | 240 |
| EPYC 7713P | 225 | 240 |
| EPYC 7643 | 225 | 240 |
| EPYC 75F3 | 225 | 280 |
| EPYC 7543 | 225 | 240 |
| EPYC 7543P | 225 | 240 |
| EPYC 7513 | 165 | 200 |
| EPYC 74F3 | 225 | 240 |
| EPYC 7413 | 165 | 200 |
| EPYC 7343 | 165 | 200 |
| EPYC 7313 | 155 | 180 |
| EPYC 7313P | 155 | 180 |
| EPYC 72F3 | 165 | 200 |
- NUMA nodes per socket: (Default="Auto"):
-
Specifies the number of desired NUMA nodes per socket. Values for this BIOS setting can be:
- Auto: Use default value of NUMA nodes per socket.
- NPS4: sets four NUMA nodes per socket, one per Quadrant.
- NPS2: sets two NUMA nodes per socket.
- NPS1: sets one NUMA nodes per socket.
- NPS0: will attempt to interleave the two sockets together.
- APBDIS: (Default="Auto"):
-
Application Power Management (APM) allows the processor to provide maximum performance while remaining within
the specified power delivery and removal envelope. APM dynamically monitors processor activity and generates an
approximation of power consumption. If power consumption exceeds a defined power limit, a P-state limit is applied by
APM hardware to reduce power consumption. APM ensures that average power consumption over a thermally significant
time period remains at or below the defined power limit. Set APBDIS=1 will disable Data Fabric APM and the SOC P-state will be fixed.
Values for this BIOS setting can be:
- Auto: Use default value of APBDIS.
- 0: Dynamically switch Infinity Fabric P-state based on link usage.
- 1: Enable fixed Infinity Fabric P-state control.
- Fix Soc P-States: (Default="Auto"):
-
To minimize variance or trade-off memory latency versus bandwidth, algorithm performance boost
(APBDIS) can be set and specific hard-fused Data Fabric (SoC) P-states forced for optimized
workloads sensitive to latency or throughput.This item is available only when APBDIS is set to 1.
Values for this BIOS setting can be:
- Auto: Use default value of Fix Soc P-States.
- P0: Highest-performing Infinity Fabric P-state,which will force the Infinity Fabric and memory controllers into full-power mode.
- P1: Next-highest-performing Infinity Fabric P-state.
- P2: Next highest-performing Infinity Fabric P-state.
- P3: Minimum Infinity Fabric power P-state.
- Package Power Limit Control: (Default="Auto"):
-
This is a per Processor Power Limit value applicable for all populated processors in the system.
This can be set to limit the processor power to a certain value.
Values for this BIOS option can be.
- Auto: Uses the default processor value.
- Manual: Lets the user set a power limit and exposes Package Power Limit value field that a user can enter a number into. If a number is entered higher than what the processor and/or system supports, the BIOS will limit the power to the max possible value.
- Package Power Limit:
-
Set customize processor Package Power Limit (PPT) value to be used on all populated processors in the system.