OS Tuning
irqbalance:
Disabled through "systemctrl stop irqbalance.service". Depending on the workload involved, the irqbalance service reassigns various IRQ's to system CPUs. Though this service might help in some situations, disabling it can also help environments which need to minimize or eliminate latency to more quickly respond to events.
sched_cfs_bandwidth_slice_us (Default = 5000):
When Completely Fair Scheduler bandwidth control is in use, this parameter controls the amount of run-time (bandwidth) transferred to a run queue from the task's control group bandwidth pool. Small values allow the global bandwidth to be shared in a fine-grained manner among tasks, larger values reduce transfer overhead.
sched_migration_cost_ns (Default = 500000):
Amount of time after the last execution that a task is considered to be "cache hot" in migration decisions. A "hot" task is less likely to be migrated to another CPU, so increasing this variable reduces task migrations.
Firmware Settings
One or more of the following settings may have been set. If so, the "Platform Notes" section of the report will say so; and you can read below to find out more about what these settings mean.
Hyper-Threading (Default = Enabled):
This feature allows enabling or disabling of logical processor cores on processors supporting Intel Hyper-Threading (HT). When enabled, each physical processor core operates as two logical processor cores. When disabled, each physical core operates as only one logical processor core. Enabling this option can improve overall performance for applications that benefit from a higher processor core count.
VT-x (Default = Enabled):
When enabled, a hypervisor or operating system supporting this option can use hardware capabilities provided by Intel virtualization technology. Some hypervisors require that you enable VT-x. You can leave this set to Enabled even if you are not using a hypervisor or an operating system that uses this option.
Hardware Prefetcher (Default = Enabled):
This BIOS option allows the enabling/disabling of a processor mechanism to prefetch data into the cache according to a pattern-recognition algorithm. In some cases, setting this option to disabled may improve performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.
Adjacent Cache Line Prefetch (Default = Enabled):
This option allows the enabling/disabling of a processor mechanism to fetch the adjacent cache line within a 128-byte sector that contains the data needed due to a cache line miss. In some cases, setting this option to disabled can improve performance. Typically, setting this option to enabled provides better performance. Only disable this option after performing application benchmarking to verify improved performance in the environment.
Last updated October 28, 2019.