SPEC CPU2017 Flag Description - Platform settings

Operating System Tuning Parameters

ulimit
This sets user limits of system-wide resources and can set the stack size to n kbytes, or unlimited to allow the stack size to grow without limit. Some common ulimit commands may include:
Kernel parameters
The following Linux Kernel parameters were set for better optimize performance.

Firmware / BIOS / Microcode Settings

ACPI CST C2 Latency
This BIOS switch defines C2 latency values in microseconds. Larger C2 latency values will reduce the number of C2 transitions and C2 residency. On the other hand, higher values may allow higher frequency boost and reduce idle core power. Default value is "800".
ACPI SRAT L3 Cache as NUMA Domain
This BIOS switch allows 2 options: "Disable" and "Enabled". This feature exposes each L3 Cache as a NUMA node when enabled. Default is "Disabled".
APBDIS
This BIOS switch allows 2 options: "0" and "1". This feature disables or enable an IO boost on uncore. When "1" is selected, Data Fabric Application Power Management (APM) is disabled and uncore P-state is fixed. "0" enables APM to control uncore P-state based on power consumption. Default is "0".
Chipselect Interleaving
This BIOS switch allows 3 options: "Disabled", "Enabled", and "Auto". This feature enables or disables interleaving memory blocks across the DRAM chip selects for node 0. "Auto" enables system to determine if DIMMs are capable of supporting the feature and select the proper settings. "Enabled" or "Disabled" overrides certain optimization policies.
Determinism Slider
This BIOS switch allows 2 options: "Power", and "Performance". This feature is for the determinism to control performance. "Perforomance" setting uses default values for deterministic performance control. "Power" setting provides predicable performance across all processors of the same type. "Power" setting maximizes performance withing the power limits defined by "TDP Limit". Default is "Performance".
DF PState Frequency Optimizer
This BIOS switch allows 2 options: "Enabled" and "Disabled". This feature enables or disables DFPstate CCLK effective frequency optimizer. Default is "Disabled"
FAN Control
This BIOS switch allows 2 options: "Auto" and "Full". The default setting is "Auto", which allows the system to control the fan speed according to the system temperature. If "Full" is selected, the system runs fans at 100% speed and it mayimprove the system performance. But it increases the power consumption of the system.
L2 Stream HW Prefetcher
This BIOS switch allows 2 options: "Disabled", "Enabled, and "Auto". This feature allows enabling or disabling of L2 Stream HW Prefetcher. Default is "Auto".
NUMA nodes per socket
This BIOS switch allows 4 options: "NPS0", "NPS1", "NPS2", and "NPS4". This feature specifies the number of desired NUMA nodes per populated socket in the system: Default is "NPS1".
Probe Filter Organization
This BIOS switch allows 3 options: "Auto", "Dedicated", and "Shared". This feature specifies whether multiple memory channels will share ("Shared") probe filter storage or not ("Dedicated"). For memory sizes of 16 TB or larger, this feature is automatically set to "Shared". "Auto" selects the optimized setting in the configuration. Default is "Dedicated".
Package Power Limit Control
This BIOS switch allows 2 options: "Manual" and "Auto". This feature enables or disables user to specify "Package Power Limit" "Auto" uses the fused values. "Manual" enables user to configure customized values in "Package Power Limit" switch. Default is "Auto".
Package Power Limit
This BIOS switch specifies the maximum power that each CPU package may consume in the system. The actual power limit is the maximum of the Package Power Limit and "TDP Limit".
Periodic Directory Rinse (PDR) Tuning
This BIOS switch allows 5 options: "Memory-Sensitive", "Cache-Bound", "Neutral", "Adaptive", and "Auto". It controls Periodic Directory Rinse which may help manage directory capacity more efficiently and may improve performance in specific scenarios. Default is "Auto".
Power Profile Selection
This BIOS switch allows 3 options: "High Performance Mode", "Efficinecy Mode", and "Maximum IO Performance Mode". This feature select DF Pstate based on each profile policy. Default is "Efficinecy Mode".
SMT Control
This BIOS switch allows 2 options: "Enabled" and "Disabled". This feature allows enabling or disabling of symmetric multithreading on processors. When enabled ("Enabled"), each physical processor core operates as two logical processor cores. When disabled ("Disabled"), each physical core operates as only one logical processor core. "Enabled" can improve overall performance for applications that benefit from a higher processor core count. Default is "Enabled".
TDP Control
This BIOS switch allows 2 options: "Manual" and "Auto". This feature enables or disables user to specify "TDP Limit". "Auto" uses the fused values. "Manual" enables user to configure customized values in "TDP Limit" switch. Default is "Auto".
TDP Limit
This BIOS switch specifies the maximum power that the CPU will consume, up to the platform power limit. Valid values vary by CPU model. If value outside the valid range is set, the CPU will automatically adjust the value so that it does fall within the valid range. When increasing TDP Limit, additional power will only be consumed up to the Package Power Limit, which may be less than the TDP Limit setting.
ModelMinimum TDPMaximum TDP
EPYC 9654320400
EPYC 9654P320400
EPYC 9634240300
EPYC 9554320400
EPYC 9554P320400
EPYC 9534240300
EPYC 9454240300
EPYC 9454P240300
EPYC 9354240300
EPYC 9354P240300
EPYC 9334200240
EPYC 9274F320400
EPYC 9254200240
EPYC 9224200240
EPYC 9174F320400
EPYC 9124200240
EPYC 9754320400
EPYC 9384X320400
EPYC 9184X320400