- Power Technology:
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This BIOS option allows to disable or define Power Management on server.
This can be one of the following: [Disable], [Energy Efficient] or [Custom].
Users should set this option as [Custom] for performing application benchmarking.
- Turbo Mode:
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The options are [Disable] or [Enable].
This option allows the processor to automatically increrase its frequency if it is running below power, temperature, and current specifications.
Users should set this option as [Enable] for performing application benchmarking.
- Enhanced Halt State (C1E):
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The options are [Disable] or [Enable].
When enabled, C1E halt state invoked by the operating system's idle process turns down the entire CPU's clock frequency and voltage and cut a CPU's power consumption and heat production.
Users should set this option as [Disabled] for performing application benchmarking.
- CPU C6 report:
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The options are [Disable], [Enable] or [Auto].
Enabling this option allows the processor to send the C6 report to the Operating system.
Users should set this option as [Disable] for performing application benchmarking.
- Package C State:
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Use this feature to set the limit on the C-State package register.
The options are [C0/C1 state], [C2 state], [C6 non Retention state], [C6 Retention state], [No limit] or [Auto].
Users should set this option as [No limit] for performing application benchmarking.
- Software Controlled T-States:
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T-states exist to save processors from burning when the cooling fan failed
while the processor is running with maximum performance. If a temperature
sensor register that the temperature is reaching a level that could cause
damage to the package or its contents, the power manager would place the
processor in different T-States (which will let him cool down) depending
upon temperature: the higher the temperature - the higher the T-State etc.
If this feature is set to Enable, CPU throttling settings will be supported
by the software of the system.
Users should set this option as [Disable] for performing application benchmarking.
- Hyper-Threading (All):
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Enabling this option allows to use processor resources more efficiently, enabling multiple threads to run on each core
and increases processor throughput, improving overall performance on threaded software.
This can be one of the following: [Enable] or [Disable].
Users should set this option as [Enable] for CPU2017 INT/FP Rate benchmark.
Users should set this option as [Disable] for CPU2017 INT/FP Speed benchmark.
- Enforce POR:
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Enable to enforce POR restriction for DDR4 frequency and voltage programming.
This can be one of the following: [Disable] or [POR].
- Memory Frequency:
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When Enforce POR option is set as [POR], Memory Frequency is set automatically
by the Bios and cannot be changed.
When Enforce POR option is set as [Disable], users can manually set Memory Frequency
to maximum supported by the processor and memory modules.
The options are [Auto], [1866], [2000], [2133], [2400] and [2666].
For performing application benchmarking, users should set this option as right for specific processor and memory.
- Patrol Scrub:
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The options are [Disable] and [Enable].
When enabled, performs periodic checks on memory cells and proactively walks through populated memory space, to seek and correct soft ECC errors.
Users should set this option as [Disable] for performing application benchmarking.
- IMC Interleaving:
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This BIOS option controls the interleaving between the Integrated Memory Controllers (IMCs).
The options are [Auto], [1-way Interleave] or [2-way Interleave].
There are two Integrated Memory Controllers in Skylake CPUs.
If IMC Interleaving is set to 2-way, addresses will be interleaved between the two IMCs.
If IMC Interleaving is set to 1-way, there will be no interleaving.
If Sub_NUMA Cluster is disabled, IMC Interleaving should be set to 2-way.
If Sub_NUMA Cluster is enabled, IMC Interleaving should be set to 1-way.
- SNC:
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The options are [Disable], [Enable] or [Auto].
SNC (Sub_NUMA Cluster) provides similar localization benefits as Cluster-On-Die (COD), without some of COD downsides.
SNC breaks up the LLC into two disjoint clusters based on address range, with each cluster bound to a subset of the memory controllers in the system.
SNC improves average latency to the LLC (last level cache) and memory.
For a multi-socketed system, all clusters are mapped to unique NUMA domains.
IMC Interleaving must be set to the correct value to correspond with SNC enable/disable.