SPEC® CFP2006 Result

Cisco Systems

Cisco UCS B200 M5 (Intel Xeon Silver 4114,
2.20 GHz)

SPECfp®_rate2006 = 852

SPECfp_rate_base2006 = 839

CPU2006 license:	9019	Test date:	Dec-2017
Test sponsor:	Cisco Systems	Hardware Availability:	Aug-2017
Tested by:	Cisco Systems	Software Availability:	Jul-2017

Hardware
CPU Name:	Intel Xeon Silver 4114
CPU Characteristics:	Intel Turbo Boost Technology up to 3.00 GHz
CPU MHz:	2200
FPU:	Integrated
CPU(s) enabled:	20 cores, 2 chips, 10 cores/chip, 2 threads/core
CPU(s) orderable:	1,2 chips
Primary Cache:	32 KB I + 32 KB D on chip per core
Secondary Cache:	1 MB I+D on chip per core
L3 Cache:	13.75 MB I+D on chip per chip
Other Cache:	None
Memory:	384 GB (24 x 16 GB 2Rx4 PC4-2666V-R, running at 2400)
Disk Subsystem:	1 x 600 GB SAS HDD, 10K RPM
Other Hardware:	None

Software
Operating System:	SUSE Linux Enterprise Server 12 SP2 (x86_64) 4.4.21-69-default
Compiler:	C/C++: Version 17.0.3.191 of Intel C/C++ Compiler for Linux; Fortran: Version 17.0.3.191 of Intel Fortran Compiler for Linux
Auto Parallel:	Yes
File System:	xfs
System State:	Run level 3 (multi-user)
Base Pointers:	32/64-bit
Peak Pointers:	32/64-bit
Other Software:	None

Results Table

Benchmark	Base							Peak
Benchmark	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
410.bwaves	40	665	818	665	818	665	818	40	665	818	665	818	665	818
416.gamess	40	1068	733	1069	733	1070	732	40	1036	756	1037	755	1036	756
433.milc	40	445	825	445	825	445	826	40	445	825	445	825	445	826
434.zeusmp	40	342	1060	344	1060	343	1060	40	342	1060	344	1060	343	1060
435.gromacs	40	324	882	317	902	319	897	40	314	909	319	894	313	912
436.cactusADM	40	436	1100	437	1090	443	1080	40	436	1100	437	1090	443	1080
437.leslie3d	40	678	555	658	571	653	575	40	669	562	653	576	660	569
444.namd	40	537	598	534	601	535	599	40	530	605	532	603	532	603
447.dealII	40	378	1210	380	1200	378	1210	40	378	1210	380	1200	378	1210
450.soplex	40	588	567	587	568	587	568	40	557	599	558	598	558	598
453.povray	40	198	1070	201	1060	199	1070	40	173	1230	172	1230	172	1240
454.calculix	40	291	1130	292	1130	291	1130	40	291	1130	292	1130	291	1130
459.GemsFDTD	40	786	540	786	540	786	540	40	785	541	786	540	787	539
465.tonto	40	481	818	474	831	472	834	40	466	844	461	853	462	851
470.lbm	40	516	1060	516	1060	516	1060	40	516	1060	516	1060	516	1060
481.wrf	40	468	954	466	958	466	959	40	468	954	466	958	466	959
482.sphinx3	40	1046	746	1044	747	1045	746	40	1046	746	1044	747	1045	746

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Platform Notes

BIOS Settings:
Intel HyperThreading Technology set to Enabled
CPU performance set to Enterprise
Power Performance Tuning set to OS Controls
SNC set to Enabled
IMC Interleaving set to 1-way Interleave
Patrol Scrub set to Disabled
 Sysinfo program /home/cpu2006-1.2/config/sysinfo.rev6993
 Revision 6993 of 2015-11-06 (b5e8d4b4eb51ed28d7f98696cbe290c1)
 running on linux-qc7k Sat Dec 16 08:06:33 2017

 This section contains SUT (System Under Test) info as seen by
 some common utilities.  To remove or add to this section, see:
   http://www.spec.org/cpu2006/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Silver 4114 CPU @ 2.20GHz
       2 "physical id"s (chips)
       40 "processors"
    cores, siblings (Caution: counting these is hw and system dependent.  The
    following excerpts from /proc/cpuinfo might not be reliable.  Use with
    caution.)
       cpu cores : 10
       siblings  : 20
       physical 0: cores 0 1 2 3 4 8 9 10 11 12
       physical 1: cores 0 1 2 3 4 8 9 10 11 12
    cache size : 14080 KB

 From /proc/meminfo
    MemTotal:       394832364 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 2
       # This file is deprecated and will be removed in a future service pack or
       release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP2"
       VERSION_ID="12.2"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp2"

 uname -a:
    Linux linux-qc7k 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016
    (9464f67) x86_64 x86_64 x86_64 GNU/Linux

 run-level 3 Dec 31 23:10

 SPEC is set to: /home/cpu2006-1.2
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda1      xfs   224G   85G  139G  38% /
 Additional information from dmidecode:

    Warning: Use caution when you interpret this section. The 'dmidecode' program
    reads system data which is "intended to allow hardware to be accurately
    determined", but the intent may not be met, as there are frequent changes to
    hardware, firmware, and the "DMTF SMBIOS" standard.

   BIOS Cisco Systems, Inc. B200M5.3.2.1d.5.0727171353 07/27/2017
   Memory:
    24x 0xCE00 M393A2G40EB2-CTD 16 GB 2 rank 2666 MHz, configured at 2400 MHz

 (End of data from sysinfo program)

General Notes

Environment variables set by runspec before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2006-1.2/lib/ia32:/home/cpu2006-1.2/lib/intel64:/home/cpu2006-1.2/sh10.2"

 Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.2
 Transparent Huge Pages enabled with:
 echo always > /sys/kernel/mm/transparent_hugepage/enabled
 Filesystem page cache cleared with:
 shell invocation of 'sync; echo 3 > /proc/sys/vm/drop_caches' prior to run
 runspec command invoked through numactl i.e.:
 numactl --interleave=all runspec <etc>
 No: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
 is mitigated in the system as tested and documented.
 No: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
 is mitigated in the system as tested and documented.
 No: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
 is mitigated in the system as tested and documented.

This benchmark result is intended to provide perspective on
past performance using the historical hardware and/or
software described on this result page.

The system as described on this result page was formerly
generally available.  At the time of this publication, it may
not be shipping, and/or may not be supported, and/or may fail
to meet other tests of General Availability described in the
SPEC OSG Policy document, http://www.spec.org/osg/policy.html

This measured result may not be representative of the result
that would be measured were this benchmark run with hardware
and software available as of the publication date.

Base Compiler Invocation

C benchmarks:

icc -m64

C++ benchmarks:

icpc -m64

Fortran benchmarks:

ifort -m64

Benchmarks using both Fortran and C:

icc -m64 ifort -m64

Base Portability Flags

410.bwaves:	-DSPEC_CPU_LP64
416.gamess:	-DSPEC_CPU_LP64
433.milc:	-DSPEC_CPU_LP64
434.zeusmp:	-DSPEC_CPU_LP64
435.gromacs:	-DSPEC_CPU_LP64 -nofor_main
436.cactusADM:	-DSPEC_CPU_LP64 -nofor_main
437.leslie3d:	-DSPEC_CPU_LP64
444.namd:	-DSPEC_CPU_LP64
447.dealII:	-DSPEC_CPU_LP64
450.soplex:	-DSPEC_CPU_LP64
453.povray:	-DSPEC_CPU_LP64
454.calculix:	-DSPEC_CPU_LP64 -nofor_main
459.GemsFDTD:	-DSPEC_CPU_LP64
465.tonto:	-DSPEC_CPU_LP64
470.lbm:	-DSPEC_CPU_LP64
481.wrf:	-DSPEC_CPU_LP64 -DSPEC_CPU_CASE_FLAG -DSPEC_CPU_LINUX
482.sphinx3:	-DSPEC_CPU_LP64

Peak Compiler Invocation

C benchmarks:

icc -m64

C++ benchmarks (except as noted below):

	icpc -m64
450.soplex:	icpc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32

Fortran benchmarks:

ifort -m64

Benchmarks using both Fortran and C:

icc -m64 ifort -m64

Peak Portability Flags

410.bwaves:	-DSPEC_CPU_LP64
416.gamess:	-DSPEC_CPU_LP64
433.milc:	-DSPEC_CPU_LP64
434.zeusmp:	-DSPEC_CPU_LP64
435.gromacs:	-DSPEC_CPU_LP64 -nofor_main
436.cactusADM:	-DSPEC_CPU_LP64 -nofor_main
437.leslie3d:	-DSPEC_CPU_LP64
444.namd:	-DSPEC_CPU_LP64
447.dealII:	-DSPEC_CPU_LP64
450.soplex:	-D_FILE_OFFSET_BITS=64
453.povray:	-DSPEC_CPU_LP64
454.calculix:	-DSPEC_CPU_LP64 -nofor_main
459.GemsFDTD:	-DSPEC_CPU_LP64
465.tonto:	-DSPEC_CPU_LP64
470.lbm:	-DSPEC_CPU_LP64
481.wrf:	-DSPEC_CPU_LP64 -DSPEC_CPU_CASE_FLAG -DSPEC_CPU_LINUX
482.sphinx3:	-DSPEC_CPU_LP64

Peak Optimization Flags

C benchmarks:

433.milc:	basepeak = yes
470.lbm:	basepeak = yes
482.sphinx3:	basepeak = yes

C++ benchmarks:

444.namd:	-prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -fno-alias -auto-ilp32 -qopt-mem-layout-trans=3
447.dealII:	basepeak = yes
450.soplex:	-prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -qopt-malloc-options=3 -qopt-mem-layout-trans=3
453.povray:	-prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -unroll4 -qopt-mem-layout-trans=3

Fortran benchmarks:

410.bwaves:	-xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-prefetch
416.gamess:	-prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -unroll2 -inline-level=0 -scalar-rep-
434.zeusmp:	basepeak = yes
437.leslie3d:	Same as 410.bwaves
459.GemsFDTD:	Same as 410.bwaves
465.tonto:	-prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -unroll4 -auto -inline-calloc -qopt-malloc-options=3

Benchmarks using both Fortran and C:

435.gromacs:	-prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -qopt-prefetch -auto-ilp32 -qopt-mem-layout-trans=3
436.cactusADM:	basepeak = yes
454.calculix:	basepeak = yes
481.wrf:	basepeak = yes

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.html,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.xml,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.xml.