SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS B420 M4 (Intel Xeon E5-4610 v3, 1.70 GHz) Mon Aug 3 04:49:34 2015 CPU2006 License: 9019 Test date: Aug-2015 Test sponsor: Cisco Systems Hardware availability: Jun-2015 Tested by: Cisco Systems Software availability: Nov-2014 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 80 1028 760 S 80 813 962 S 400.perlbench 80 1022 764 S 80 816 957 S 400.perlbench 80 1025 763 * 80 814 960 * 401.bzip2 80 1463 528 S 80 1396 553 S 401.bzip2 80 1466 527 * 80 1395 553 S 401.bzip2 80 1473 524 S 80 1396 553 * 403.gcc 80 758 850 S 80 755 853 * 403.gcc 80 756 852 * 80 756 852 S 403.gcc 80 754 854 S 80 754 854 S 429.mcf 80 474 1540 S 80 474 1540 S 429.mcf 80 475 1540 * 80 475 1540 * 429.mcf 80 476 1530 S 80 476 1530 S 445.gobmk 80 1184 709 * 80 1175 714 S 445.gobmk 80 1184 709 S 80 1175 714 S 445.gobmk 80 1183 709 S 80 1175 714 * 456.hmmer 80 481 1550 S 80 429 1740 S 456.hmmer 80 489 1530 S 80 428 1740 * 456.hmmer 80 483 1550 * 80 427 1750 S 458.sjeng 80 1285 753 S 80 1234 784 S 458.sjeng 80 1284 754 S 80 1233 785 * 458.sjeng 80 1285 753 * 80 1233 785 S 462.libquantum 80 149 11200 S 80 149 11200 S 462.libquantum 80 148 11200 * 80 148 11200 * 462.libquantum 80 148 11200 S 80 148 11200 S 464.h264ref 80 1455 1220 * 80 1385 1280 * 464.h264ref 80 1402 1260 S 80 1380 1280 S 464.h264ref 80 1456 1220 S 80 1432 1240 S 471.omnetpp 80 779 641 S 80 739 677 * 471.omnetpp 80 777 644 S 80 740 676 S 471.omnetpp 80 778 643 * 80 736 680 S 473.astar 80 909 618 S 80 909 618 S 473.astar 80 908 618 S 80 908 618 S 473.astar 80 909 618 * 80 909 618 * 483.xalancbmk 80 453 1220 * 80 453 1220 * 483.xalancbmk 80 453 1220 S 80 453 1220 S 483.xalancbmk 80 453 1220 S 80 453 1220 S ============================================================================== 400.perlbench 80 1025 763 * 80 814 960 * 401.bzip2 80 1466 527 * 80 1396 553 * 403.gcc 80 756 852 * 80 755 853 * 429.mcf 80 475 1540 * 80 475 1540 * 445.gobmk 80 1184 709 * 80 1175 714 * 456.hmmer 80 483 1550 * 80 428 1740 * 458.sjeng 80 1285 753 * 80 1233 785 * 462.libquantum 80 148 11200 * 80 148 11200 * 464.h264ref 80 1455 1220 * 80 1385 1280 * 471.omnetpp 80 778 643 * 80 739 677 * 473.astar 80 909 618 * 80 909 618 * 483.xalancbmk 80 453 1220 * 80 453 1220 * SPECint(R)_rate_base2006 1090 SPECint_rate2006 1140 HARDWARE -------- CPU Name: Intel Xeon E5-4610 v3 CPU Characteristics: CPU MHz: 1700 FPU: Integrated CPU(s) enabled: 40 cores, 4 chips, 10 cores/chip, 2 threads/core CPU(s) orderable: 2,4 chip Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 25 MB I+D on chip per chip Other Cache: None Memory: 512 GB (32 x 16 GB 2Rx4 PC4-2133P-R, running at 1600 MHz) Disk Subsystem: 1 x 300 GB SAS, 15K RPM Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 (x86_64) 3.12.28-4-default Compiler: C/C++: Version 15.0.0.090 of Intel C++ Studio XE for Linux Auto Parallel: No File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V10.0 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- BIOS Configuraton: CPU performance set to Enterprise Power Technology set to Energy-Efficient Energy Performance BIAS setting set to Balanced Performance Memory RAS configuration set to Maximum Performance LV DDR Mode set to Performance-mode Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6914 $Rev: 6914 $ $Date:: 2014-06-25 #$ e3fbb8667b5a285932ceab81e28219e1 running on linux-616o Mon Aug 3 14:19:36 2015 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-4610 v3 @ 1.70GHz 4 "physical id"s (chips) 80 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 10 siblings : 20 physical 0: cores 0 1 2 3 4 8 9 10 11 12 physical 1: cores 0 1 2 3 4 8 9 10 11 12 physical 2: cores 0 1 2 3 4 8 9 10 11 12 physical 3: cores 0 1 2 3 4 8 9 10 11 12 cache size : 25600 KB From /proc/meminfo MemTotal: 529330852 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 0 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12" VERSION_ID="12" PRETTY_NAME="SUSE Linux Enterprise Server 12" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12" uname -a: Linux linux-616o 3.12.28-4-default #1 SMP Thu Sep 25 17:02:34 UTC 2014 (9879bd4) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Aug 3 14:17 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sdc2 xfs 250G 12G 239G 5% / Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. B420M4.2.2.5.0.043020152304 04/30/2015 Memory: 32x 0xCE00 M393A2G40DB0-CPB 16 GB 2 rank 2133 MHz, configured at 1600 MHz 16x NO DIMM NO DIMM (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64:/opt/cpu2006-1.2/sh" Binaries compiled on a system with 1x Core i5-4670K CPU + 16GB memory using RedHat EL 7.0 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches runspec command invoked through numactl i.e.: numactl --interleave=all runspec Base Compiler Invocation ------------------------ C benchmarks: icc -m32 -L/opt/intel/composer_xe_2015/lib/ia32 C++ benchmarks: icpc -m32 -L/opt/intel/composer_xe_2015/lib/ia32 Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 C++ benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 -Wl,-z,muldefs -L/sh -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m32 -L/opt/intel/composer_xe_2015/lib/ia32 400.perlbench: icc -m64 401.bzip2: icc -m64 456.hmmer: icc -m64 458.sjeng: icc -m64 C++ benchmarks: icpc -m32 -L/opt/intel/composer_xe_2015/lib/ia32 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xCORE-AVX2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -auto-ilp32 401.bzip2: -xCORE-AVX2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -opt-prefetch -auto-ilp32 -ansi-alias 403.gcc: -xCORE-AVX2 -ipo -O3 -no-prec-div 429.mcf: basepeak = yes 445.gobmk: -xCORE-AVX2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -ansi-alias -opt-mem-layout-trans=3 456.hmmer: -xCORE-AVX2 -ipo -O3 -no-prec-div -unroll2 -auto-ilp32 458.sjeng: -xCORE-AVX2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32 462.libquantum: basepeak = yes 464.h264ref: -xCORE-AVX2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: -xCORE-AVX2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/sh -lsmartheap 473.astar: basepeak = yes 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic15.0-official-linux64.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revC.20150812.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic15.0-official-linux64.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revC.20150812.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2015 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Tue Sep 8 22:41:32 2015 by CPU2006 ASCII formatter v6932. Originally published on 8 September 2015.