SPEC® CINT2006 Result

Copyright 2006-2014 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS C420 M3 (Intel Xeon E5-4650, 2.70 GHz)

CPU2006 license: 9019 Test date: Jun-2014
Test sponsor: Cisco Systems Hardware Availability: Sep-2012
Tested by: Cisco Systems Software Availability: Sep-2013
Benchmark results graph
Hardware
CPU Name: Intel Xeon E5-4650
CPU Characteristics: Intel Turbo Boost Technology up to 3.30 GHz
CPU MHz: 2700
FPU: Integrated
CPU(s) enabled: 32 cores, 4 chips, 8 cores/chip, 2 threads/core
CPU(s) orderable: 1,2,3,4 chip
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 256 KB I+D on chip per core
L3 Cache: 20 MB I+D on chip per chip
Other Cache: None
Memory: 512 GB (32 x 16 GB 2Rx4 PC3-12800R-11, ECC)
Disk Subsystem: 1 X 100 GB SAS SSD
Other Hardware: None
Software
Operating System: Red Hat Enterprise Linux Server release 6.3
(Santiago)
2.6.32-279.el6.x86_64
Compiler: C/C++: Version 14.0.0.080 of Intel C++ Studio XE
for Linux
Auto Parallel: No
File System: ext4
System State: Run level 5 (multi-user)
Base Pointers: 32-bit
Peak Pointers: 32/64-bit
Other Software: Microquill SmartHeap V10.0

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench 64 684 914 684 914 684 914 64 563 1110 561 1110 561 1110
401.bzip2 64 939 658 939 657 939 658 64 921 670 921 671 924 668
403.gcc 64 566 910 566 910 568 908 64 575 896 572 901 567 908
429.mcf 64 333 1750 333 1750 333 1750 64 333 1750 333 1750 333 1750
445.gobmk 64 736 912 739 909 737 910 64 723 929 718 936 722 930
456.hmmer 64 378 1580 373 1600 372 1610 64 350 1710 349 1710 349 1710
458.sjeng 64 852 909 852 909 852 909 64 825 938 826 937 826 937
462.libquantum 64 175 7580 176 7550 175 7580 64 175 7580 176 7550 175 7580
464.h264ref 64 885 1600 892 1590 889 1590 64 903 1570 887 1600 900 1570
471.omnetpp 64 607 659 609 657 608 658 64 576 695 578 692 577 693
473.astar 64 650 692 651 691 651 690 64 650 692 651 691 651 690
483.xalancbmk 64 374 1180 375 1180 374 1180 64 374 1180 375 1180 374 1180

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Platform Notes

BIOS Settings:
Intel HT Technology = Enabled
CPU performance set to HPC
Power Technology set to Custom
CPU Power State C6 set to Enabled
CPU Power State C1 Enhanced set to Disabled
Energy Performance policy set to Performance
Memory RAS configuration set to Maximum Performance
DRAM Clock Throttling Set to Performance
LV DDR Mode set to Performance-mode
DRAM Refresh Rate Set to 1x
 Sysinfo program /home/cpu2006/config/sysinfo.rev6818
 $Rev: 6818 $ $Date:: 2012-07-17 #$ e86d102572650a6e4d596a3cee98f191
 running on Arsenal Sat Jun  7 00:29:45 2014

 This section contains SUT (System Under Test) info as seen by
 some common utilities.  To remove or add to this section, see:
   http://www.spec.org/cpu2006/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) CPU E5-4650 0 @ 2.70GHz
       4 "physical id"s (chips)
       64 "processors"
    cores, siblings (Caution: counting these is hw and system dependent.  The
    following excerpts from /proc/cpuinfo might not be reliable.  Use with
    caution.)
       cpu cores : 8
       siblings  : 16
       physical 0: cores 0 1 2 3 4 5 6 7
       physical 1: cores 0 1 2 3 4 5 6 7
       physical 2: cores 0 1 2 3 4 5 6 7
       physical 3: cores 0 1 2 3 4 5 6 7
    cache size : 20480 KB

 From /proc/meminfo
    MemTotal:       529406984 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /usr/bin/lsb_release -d
    Red Hat Enterprise Linux Server release 6.3 (Santiago)

 From /etc/*release* /etc/*version*
    redhat-release: Red Hat Enterprise Linux Server release 6.3 (Santiago)
    system-release: Red Hat Enterprise Linux Server release 6.3 (Santiago)
    system-release-cpe: cpe:/o:redhat:enterprise_linux:6server:ga:server

 uname -a:
    Linux Arsenal 2.6.32-279.el6.x86_64 #1 SMP Wed Jun 13 18:24:36 EDT 2012
    x86_64 x86_64 x86_64 GNU/Linux

 run-level 5 Jun 5 20:28

 SPEC is set to: /home/cpu2006
    Filesystem    Type    Size  Used Avail Use% Mounted on
    /dev/mapper/vg_arsenal-lv_home
                  ext4     81G  7.8G   69G  11% /home

 Additional information from dmidecode:
   BIOS Cisco Systems, Inc. C420M3.1.5.7.0.042820140524 04/28/2014
   Memory:
    32x 0xCE00 M393B2G70BH0-YK0 16 GB 1600 MHz 2 rank
    16x NO DIMM NO DIMM

 (End of data from sysinfo program)

General Notes

Environment variables set by runspec before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2006/libs/32:/home/cpu2006/libs/64:/home/cpu2006/sh"

 Binaries compiled on a system with 1x Core i7-860 CPU + 8GB
 memory using RedHat EL 6.4
 Transparent Huge Pages enabled with:
 echo always > /sys/kernel/mm/redhat_transparent_hugepage/enabled
 Filesystem page cache cleared with:
 echo 1>       /proc/sys/vm/drop_caches
 runspec command invoked through numactl i.e.:
 numactl --interleave=all runspec <etc>

Base Compiler Invocation

C benchmarks:

 icc -m32 

C++ benchmarks:

 icpc -m32 

Base Portability Flags

400.perlbench:  -DSPEC_CPU_LINUX_IA32 
462.libquantum:  -DSPEC_CPU_LINUX 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Base Optimization Flags

C benchmarks:

 -xSSE4.2   -ipo   -O3   -no-prec-div   -opt-prefetch   -opt-mem-layout-trans=3 

C++ benchmarks:

 -xSSE4.2   -ipo   -O3   -no-prec-div   -opt-prefetch   -opt-mem-layout-trans=3   -Wl,-z,muldefs   -L/sh -lsmartheap 

Base Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc -m32 
400.perlbench:  icc -m64 
401.bzip2:  icc -m64 
456.hmmer:  icc -m64 
458.sjeng:  icc -m64 

C++ benchmarks:

 icpc -m32 

Peak Portability Flags

400.perlbench:  -DSPEC_CPU_LP64   -DSPEC_CPU_LINUX_X64 
401.bzip2:  -DSPEC_CPU_LP64 
456.hmmer:  -DSPEC_CPU_LP64 
458.sjeng:  -DSPEC_CPU_LP64 
462.libquantum:  -DSPEC_CPU_LINUX 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Peak Optimization Flags

C benchmarks:

400.perlbench:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -auto-ilp32 
401.bzip2:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -opt-prefetch   -auto-ilp32   -ansi-alias 
403.gcc:  -xSSE4.2   -ipo   -O3   -no-prec-div 
429.mcf:  basepeak = yes 
445.gobmk:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -prof-use(pass 2)   -ansi-alias   -opt-mem-layout-trans=3 
456.hmmer:  -xSSE4.2   -ipo   -O3   -no-prec-div   -unroll2   -auto-ilp32 
458.sjeng:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -unroll4   -auto-ilp32 
462.libquantum:  basepeak = yes 
464.h264ref:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -unroll2   -ansi-alias 

C++ benchmarks:

471.omnetpp:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -ansi-alias   -opt-ra-region-strategy=block   -Wl,-z,muldefs   -L/sh -lsmartheap 
473.astar:  basepeak = yes 
483.xalancbmk:  basepeak = yes 

Peak Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic14.0-official-linux64.20140128.html,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revB.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic14.0-official-linux64.20140128.xml,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revB.xml.