SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS C420 M3 (Intel Xeon E5-4607, 2.20 GHz) Sat Feb 23 01:03:07 2013 CPU2006 License: 9019 Test date: Feb-2012 Test sponsor: Cisco Systems Hardware availability: Nov-2012 Tested by: Cisco Systems Software availability: Feb-2012 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 48 924 507 S 48 793 592 S 400.perlbench 48 922 508 S 48 794 590 S 400.perlbench 48 923 508 * 48 793 592 * 401.bzip2 48 1289 359 S 48 1263 367 S 401.bzip2 48 1289 359 * 48 1267 366 * 401.bzip2 48 1294 358 S 48 1275 363 S 403.gcc 48 716 540 * 48 721 536 S 403.gcc 48 713 542 S 48 721 536 * 403.gcc 48 717 539 S 48 722 535 S 429.mcf 48 422 1040 S 48 422 1040 S 429.mcf 48 422 1040 * 48 422 1040 * 429.mcf 48 422 1040 S 48 422 1040 S 445.gobmk 48 960 524 * 48 956 527 S 445.gobmk 48 987 510 S 48 966 521 S 445.gobmk 48 960 525 S 48 962 524 * 456.hmmer 48 519 863 S 48 439 1020 * 456.hmmer 48 520 861 * 48 439 1020 S 456.hmmer 48 526 852 S 48 439 1020 S 458.sjeng 48 1142 509 * 48 1096 530 S 458.sjeng 48 1142 509 S 48 1096 530 * 458.sjeng 48 1142 509 S 48 1098 529 S 462.libquantum 48 240 4140 S 48 240 4140 S 462.libquantum 48 240 4150 S 48 240 4150 S 462.libquantum 48 240 4140 * 48 240 4140 * 464.h264ref 48 1231 863 S 48 1225 867 S 464.h264ref 48 1246 852 S 48 1221 870 * 464.h264ref 48 1232 862 * 48 1219 871 S 471.omnetpp 48 762 394 S 48 712 421 S 471.omnetpp 48 761 394 * 48 713 421 * 471.omnetpp 48 761 394 S 48 715 420 S 473.astar 48 838 402 S 48 838 402 S 473.astar 48 836 403 * 48 836 403 * 473.astar 48 832 405 S 48 832 405 S 483.xalancbmk 48 458 723 * 48 458 723 * 483.xalancbmk 48 459 722 S 48 459 722 S 483.xalancbmk 48 456 726 S 48 456 726 S ============================================================================== 400.perlbench 48 923 508 * 48 793 592 * 401.bzip2 48 1289 359 * 48 1267 366 * 403.gcc 48 716 540 * 48 721 536 * 429.mcf 48 422 1040 * 48 422 1040 * 445.gobmk 48 960 524 * 48 962 524 * 456.hmmer 48 520 861 * 48 439 1020 * 458.sjeng 48 1142 509 * 48 1096 530 * 462.libquantum 48 240 4140 * 48 240 4140 * 464.h264ref 48 1232 862 * 48 1221 870 * 471.omnetpp 48 761 394 * 48 713 421 * 473.astar 48 836 403 * 48 836 403 * 483.xalancbmk 48 458 723 * 48 458 723 * SPECint(R)_rate_base2006 679 SPECint_rate2006 705 HARDWARE -------- CPU Name: Intel Xeon E5-4607 CPU Characteristics: CPU MHz: 2200 FPU: Integrated CPU(s) enabled: 24 cores, 4 chips, 6 cores/chip, 2 threads/core CPU(s) orderable: 1,2,3,4 chip Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 12 MB I+D on chip per chip Other Cache: None Memory: 256 GB (32 x 8 GB 2Rx4 PC3-12800R-11, ECC, running at 1066 MHz and CL7) Disk Subsystem: 1 X 600 GB 10000 RPM SAS Other Hardware: None SOFTWARE -------- Operating System: Red Hat Enterprise Linux Server release 6.2 (Santiago) 2.6.32-220.el6.x86_64 Compiler: C/C++: Version 12.1.3.293 of Intel C++ Studio XE for Linux Auto Parallel: No File System: ext4 System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V9.01 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- BIOS Configuration: Processor Power State C6 set to Disabled Processor Power State C1 Enhanced set to Disabled Power Technology set to Custom Energy Performance set to Performance DRAM Clock Throttling set to Performance Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6800 $Rev: 6800 $ $Date:: 2011-10-11 #$ 6f2ebdff5032aaa42e583f96b07f99d3 running on localhost.localdomain Fri Feb 22 22:03:09 2013 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-4607 0 @ 2.20GHz 4 "physical id"s (chips) 48 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 6 siblings : 12 physical 0: cores 0 1 2 3 4 5 physical 1: cores 0 1 2 3 4 5 physical 2: cores 0 1 2 3 4 5 physical 3: cores 0 1 2 3 4 5 cache size : 12288 KB From /proc/meminfo MemTotal: 529253824 kB HugePages_Total: 0 Hugepagesize: 2048 kB /usr/bin/lsb_release -d Red Hat Enterprise Linux Server release 6.2 (Santiago) From /etc/*release* /etc/*version* redhat-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release-cpe: cpe:/o:redhat:enterprise_linux:6server:ga:server uname -a: Linux localhost.localdomain 2.6.32-220.el6.x86_64 #1 SMP Wed Nov 9 08:03:13 EST 2011 x86_64 x86_64 x86_64 GNU/Linux run-level 3 Feb 22 21:52 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 ext4 458G 10G 425G 3% / Additional information from dmidecode: Memory: 32x 0xCE00 M393B2G70BH0-YK0 16 GB 1600 MHz 2 rank (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64" Intel HT Technology=enable Binaries compiled on a system with 2 X Intel Xeon E5-2690 CPU + 128 GB memory using RHEL 6.2 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/redhat_transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches Base Compiler Invocation ------------------------ C benchmarks: icc -m32 C++ benchmarks: icpc -m32 Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 C++ benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 -Wl,-z,muldefs -L/smartheap -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m32 400.perlbench: icc -m64 401.bzip2: icc -m64 456.hmmer: icc -m64 458.sjeng: icc -m64 C++ benchmarks: icpc -m32 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -auto-ilp32 401.bzip2: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -opt-prefetch -auto-ilp32 -ansi-alias 403.gcc: -xSSE4.2 -ipo -O3 -no-prec-div 429.mcf: basepeak = yes 445.gobmk: -xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -ansi-alias -opt-mem-layout-trans=3 456.hmmer: -xSSE4.2 -ipo -O3 -no-prec-div -unroll2 -auto-ilp32 458.sjeng: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32 462.libquantum: basepeak = yes 464.h264ref: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/smartheap -lsmartheap 473.astar: basepeak = yes 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic13-official-linux64.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20130607.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic13-official-linux64.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20130607.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Thu Jul 24 15:28:21 2014 by CPU2006 ASCII formatter v6932. Originally published on 23 April 2013.