SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS B420 M3 (ntel Xeon E5-4607, 2.20 GHz) Thu Jan 3 04:35:45 2013 CPU2006 License: 9019 Test date: Jan-2013 Test sponsor: Cisco Systems Hardware availability: Nov-2012 Tested by: Cisco Systems Software availability: Feb-2012 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 48 917 512 S 48 780 601 S 400.perlbench 48 915 513 * 48 788 595 * 400.perlbench 48 915 513 S 48 788 595 S 401.bzip2 48 1262 367 * 48 1238 374 S 401.bzip2 48 1259 368 S 48 1239 374 * 401.bzip2 48 1263 367 S 48 1242 373 S 403.gcc 48 701 551 * 48 708 546 * 403.gcc 48 701 551 S 48 705 548 S 403.gcc 48 706 547 S 48 709 545 S 429.mcf 48 412 1060 * 48 412 1060 * 429.mcf 48 413 1060 S 48 413 1060 S 429.mcf 48 410 1070 S 48 410 1070 S 445.gobmk 48 975 516 * 48 934 539 S 445.gobmk 48 981 513 S 48 943 534 * 445.gobmk 48 955 527 S 48 952 529 S 456.hmmer 48 522 858 S 48 439 1020 S 456.hmmer 48 521 860 * 48 438 1020 * 456.hmmer 48 519 863 S 48 438 1020 S 458.sjeng 48 1132 513 S 48 1080 538 S 458.sjeng 48 1130 514 * 48 1089 533 * 458.sjeng 48 1130 514 S 48 1090 533 S 462.libquantum 48 240 4140 S 48 240 4140 S 462.libquantum 48 239 4160 S 48 239 4160 S 462.libquantum 48 240 4150 * 48 240 4150 * 464.h264ref 48 1221 870 S 48 1218 872 S 464.h264ref 48 1237 859 * 48 1216 873 * 464.h264ref 48 1247 852 S 48 1215 874 S 471.omnetpp 48 739 406 S 48 693 433 * 471.omnetpp 48 740 406 S 48 693 433 S 471.omnetpp 48 739 406 * 48 693 433 S 473.astar 48 827 408 * 48 827 408 * 473.astar 48 825 408 S 48 825 408 S 473.astar 48 829 407 S 48 829 407 S 483.xalancbmk 48 448 739 S 48 448 739 S 483.xalancbmk 48 449 738 * 48 449 738 * 483.xalancbmk 48 449 737 S 48 449 737 S ============================================================================== 400.perlbench 48 915 513 * 48 788 595 * 401.bzip2 48 1262 367 * 48 1239 374 * 403.gcc 48 701 551 * 48 708 546 * 429.mcf 48 412 1060 * 48 412 1060 * 445.gobmk 48 975 516 * 48 943 534 * 456.hmmer 48 521 860 * 48 438 1020 * 458.sjeng 48 1130 514 * 48 1089 533 * 462.libquantum 48 240 4150 * 48 240 4150 * 464.h264ref 48 1237 859 * 48 1216 873 * 471.omnetpp 48 739 406 * 48 693 433 * 473.astar 48 827 408 * 48 827 408 * 483.xalancbmk 48 449 738 * 48 449 738 * SPECint(R)_rate_base2006 686 SPECint_rate2006 715 HARDWARE -------- CPU Name: Intel Xeon E5-4607 CPU Characteristics: CPU MHz: 2200 FPU: Integrated CPU(s) enabled: 24 cores, 4 chips, 6 cores/chip, 2 threads/core CPU(s) orderable: 2,4 chip Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 12 MB I+D on chip per chip Other Cache: None Memory: 256 GB (32 x 8 GB 2Rx4 PC3-12800R-11, ECC, running at 1066 MHz and CL7) Disk Subsystem: 1 X 300 GB 15000 RPM SAS Other Hardware: None SOFTWARE -------- Operating System: Red Hat Enterprise Linux Server release 6.2 (Santiago) 2.6.32-220.el6.x86_64 Compiler: C/C++: Version 12.1.3.293 of Intel C++ Studio XE for Linux Auto Parallel: No File System: ext4 System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V9.01 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- BIOS Configuration: Processor C6 Report set to Disabled Processor C1E set to Disabled CPU Performance set to HPC LV DDR Mode set to Performance-mode Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6800 $Rev: 6800 $ $Date:: 2011-10-11 #$ 6f2ebdff5032aaa42e583f96b07f99d3 running on localhost.localdomain Thu Jan 3 01:35:47 2013 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-4607 0 @ 2.20GHz 4 "physical id"s (chips) 48 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 6 siblings : 12 physical 0: cores 0 1 2 3 4 5 physical 1: cores 0 1 2 3 4 5 physical 2: cores 0 1 2 3 4 5 physical 3: cores 0 1 2 3 4 5 cache size : 12288 KB From /proc/meminfo MemTotal: 264504036 kB HugePages_Total: 0 Hugepagesize: 2048 kB /usr/bin/lsb_release -d Red Hat Enterprise Linux Server release 6.2 (Santiago) From /etc/*release* /etc/*version* redhat-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release-cpe: cpe:/o:redhat:enterprise_linux:6server:ga:server uname -a: Linux localhost.localdomain 2.6.32-220.el6.x86_64 #1 SMP Wed Nov 9 08:03:13 EST 2011 x86_64 x86_64 x86_64 GNU/Linux run-level 3 Jan 3 01:34 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 ext4 275G 9.9G 251G 4% / Additional information from dmidecode: Memory: 32x 0xCE00 M393B1K70DH0-YK0 8 GB 1600 MHz 2 rank (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64" Intel HT Technology=enable Binaries compiled on a system with 2 X Intel Xeon E5-2690 CPU + 128 GB memory using RHEL 6.2 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/redhat_transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches Base Compiler Invocation ------------------------ C benchmarks: icc -m32 C++ benchmarks: icpc -m32 Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 C++ benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 -Wl,-z,muldefs -L/smartheap -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m32 400.perlbench: icc -m64 401.bzip2: icc -m64 456.hmmer: icc -m64 458.sjeng: icc -m64 C++ benchmarks: icpc -m32 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -auto-ilp32 401.bzip2: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -opt-prefetch -auto-ilp32 -ansi-alias 403.gcc: -xSSE4.2 -ipo -O3 -no-prec-div 429.mcf: basepeak = yes 445.gobmk: -xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -ansi-alias -opt-mem-layout-trans=3 456.hmmer: -xSSE4.2 -ipo -O3 -no-prec-div -unroll2 -auto-ilp32 458.sjeng: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32 462.libquantum: basepeak = yes 464.h264ref: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/smartheap -lsmartheap 473.astar: basepeak = yes 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20120425.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20130607.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20120425.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20130607.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Thu Jul 24 14:54:36 2014 by CPU2006 ASCII formatter v6932. Originally published on 29 January 2013.