SPEC® CINT2006 Result

Copyright 2006-2014 Standard Performance Evaluation Corporation

HITACHI

BladeSymphony BS520H (Intel Xeon E5-2637)

CPU2006 license: 35 Test date: Oct-2012
Test sponsor: HITACHI Hardware Availability: Nov-2012
Tested by: HITACHI Software Availability: Feb-2012
Benchmark results graph
Hardware
CPU Name: Intel Xeon E5-2637
CPU Characteristics: Intel Turbo Boost Technology up to 3.50 GHz
CPU MHz: 3000
FPU: Integrated
CPU(s) enabled: 4 cores, 2 chips, 2 cores/chip, 2 threads/core
CPU(s) orderable: 1, 2 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 256 KB I+D on chip per core
L3 Cache: 5 MB I+D on chip per chip
Other Cache: None
Memory: 128 GB (16 x 8 GB 2Rx4 PC3L-12800R-11, ECC)
Disk Subsystem: 1 x 146 GB SAS, 15000 RPM
Other Hardware: None
Software
Operating System: Red Hat Enterprise Linux Server release 6.2,
Kernel 2.6.32-220.4.2.el6.x86_64
Compiler: C/C++: Version 12.1.0.225 of Intel C++ Studio XE
for Linux
Auto Parallel: No
File System: ext4
System State: Run level 3 (multi-user)
Base Pointers: 32-bit
Peak Pointers: 32/64-bit
Other Software: Microquill SmartHeap V9.01

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench 8 573 136   573 136   573 137   8 482 162 487 160 487 160
401.bzip2 8 789 97.9 791 97.6 790 97.8 8 766 101 762 101 762 101
403.gcc 8 427 151   424 152   425 152   8 423 152 424 152 425 152
429.mcf 8 243 301   243 301   242 302   8 243 301 243 301 242 302
445.gobmk 8 615 136   602 139   601 140   8 587 143 602 139 592 142
456.hmmer 8 321 233   323 231   321 232   8 268 279 267 279 267 280
458.sjeng 8 718 135   717 135   717 135   8 666 145 686 141 683 142
462.libquantum 8 149 1110   149 1110   149 1110   8 149 1110 149 1110 149 1110
464.h264ref 8 742 239   747 237   738 240   8 734 241 742 239 732 242
471.omnetpp 8 470 106   466 107   466 107   8 433 115 435 115 432 116
473.astar 8 484 116   476 118   480 117   8 484 116 476 118 480 117
483.xalancbmk 8 269 206   268 206   267 207   8 269 206 268 206 267 207

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Platform Notes

 Sysinfo program /home/cpu2006/config/sysinfo.rev6800
 $Rev: 6800 $ $Date:: 2011-10-11 #$ 6f2ebdff5032aaa42e583f96b07f99d3
 running on localhost.localdomain Sat Oct 20 06:59:00 2012

 This section contains SUT (System Under Test) info as seen by
 some common utilities.  To remove or add to this section, see:
   http://www.spec.org/cpu2006/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) CPU E5-2637 0 @ 3.00GHz
       2 "physical id"s (chips)
       8 "processors"
    cores, siblings (Caution: counting these is hw and system dependent.  The
    following excerpts from /proc/cpuinfo might not be reliable.  Use with
    caution.)
       cpu cores : 2
       siblings  : 4
       physical 0: cores 0 1
       physical 1: cores 0 1
    cache size : 5120 KB

 From /proc/meminfo
    MemTotal:       132136072 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /usr/bin/lsb_release -d
    Red Hat Enterprise Linux Server release 6.2 (Santiago)

 From /etc/*release* /etc/*version*
    redhat-release: Red Hat Enterprise Linux Server release 6.2 (Santiago)
    system-release: Red Hat Enterprise Linux Server release 6.2 (Santiago)
    system-release-cpe: cpe:/o:redhat:enterprise_linux:6server:ga:server

 uname -a:
    Linux localhost.localdomain 2.6.32-220.4.2.el6.x86_64 #1 SMP Mon Feb 6
    16:39:28 EST 2012 x86_64 x86_64 x86_64 GNU/Linux

 run-level 3 Oct 20 06:53

 (End of data from sysinfo program)

General Notes

Environment variables set by runspec before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2006/libs/32:/home/cpu2006/libs/64"

 Binaries compiled on a system with 1x Core i7-860 CPU + 8GB
 memory using RHEL5.5
 Transparent Huge Pages enabled with:
 echo always > /sys/kernel/mm/redhat_transparent_hugepage/enabled
 Filesystem page cache cleared with:
 echo 1>       /proc/sys/vm/drop_caches
 runspec command invoked through numactl i.e.:
 numactl --interleave=all runspec <etc>

HITACHI BladeSymphony BS520H and HITACHI Compute Blade 520H are electronically equivalent.
The results have been measured on a HITACHI BladeSymphony BS520H.

Base Compiler Invocation

C benchmarks:

 icc -m32 

C++ benchmarks:

 icpc -m32 

Base Portability Flags

400.perlbench:  -DSPEC_CPU_LINUX_IA32 
462.libquantum:  -DSPEC_CPU_LINUX 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Base Optimization Flags

C benchmarks:

 -xSSE4.2   -ipo   -O3   -no-prec-div   -opt-prefetch   -opt-mem-layout-trans=3 

C++ benchmarks:

 -xSSE4.2   -ipo   -O3   -no-prec-div   -opt-prefetch   -opt-mem-layout-trans=3   -Wl,-z,muldefs   -L/smartheap -lsmartheap 

Base Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc -m32 
400.perlbench:  icc -m64 
401.bzip2:  icc -m64 
456.hmmer:  icc -m64 
458.sjeng:  icc -m64 

C++ benchmarks:

 icpc -m32 

Peak Portability Flags

400.perlbench:  -DSPEC_CPU_LP64   -DSPEC_CPU_LINUX_X64 
401.bzip2:  -DSPEC_CPU_LP64 
456.hmmer:  -DSPEC_CPU_LP64 
458.sjeng:  -DSPEC_CPU_LP64 
462.libquantum:  -DSPEC_CPU_LINUX 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Peak Optimization Flags

C benchmarks:

400.perlbench:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -auto-ilp32 
401.bzip2:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -opt-prefetch   -auto-ilp32   -ansi-alias 
403.gcc:  -xSSE4.2   -ipo   -O3   -no-prec-div 
429.mcf:  basepeak = yes 
445.gobmk:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -prof-use(pass 2)   -ansi-alias   -opt-mem-layout-trans=3 
456.hmmer:  -xSSE4.2   -ipo   -O3   -no-prec-div   -unroll2   -auto-ilp32 
458.sjeng:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -unroll4   -auto-ilp32 
462.libquantum:  basepeak = yes 
464.h264ref:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -unroll2   -ansi-alias 

C++ benchmarks:

471.omnetpp:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -ansi-alias   -opt-ra-region-strategy=block   -Wl,-z,muldefs   -L/smartheap -lsmartheap 
473.astar:  basepeak = yes 
483.xalancbmk:  basepeak = yes 

Peak Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20120829.html,
http://www.spec.org/cpu2006/flags/PlatformHitachi-V1.2.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20120829.xml,
http://www.spec.org/cpu2006/flags/PlatformHitachi-V1.2.xml.

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For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2014 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.2.
Report generated on Thu Jul 24 14:02:53 2014 by SPEC CPU2006 HTML formatter v6932.
Originally published on 20 November 2012.