SPEC® CINT2006 Result

SGI

SGI UV 2000 (Intel Xeon E5-4650, 2.7 GHz)

SPECint®_rate2006 = Not Run

SPECint_rate_base2006 = 16700

CPU2006 license:	4	Test date:	May-2012
Test sponsor:	SGI	Hardware Availability:	Jun-2012
Tested by:	SGI	Software Availability:	May-2012

Hardware
CPU Name:	Intel Xeon E5-4650
CPU Characteristics:	Intel Turbo Boost Technology disabled
CPU MHz:	2700
FPU:	Integrated
CPU(s) enabled:	512 cores, 64 chips, 8 cores/chip, 2 threads/core
CPU(s) orderable:	4-256 chips
Primary Cache:	32 KB I + 32 KB D on chip per core
Secondary Cache:	256 KB I+D on chip per core
L3 Cache:	20 MB I+D on chip per chip
Other Cache:	None
Memory:	2 TB (256 x 8 GB 2Rx4 PC3-12800R-11, ECC)
Disk Subsystem:	2 TB tmpfs
Other Hardware:	NUMAlink6 routers

Software
Operating System:	SUSE Linux Enterprise Server 11 (x86_64) SP2, Kernel 3.0.13-0.27.1-uv
Compiler:	C/C++: Version 12.1.0.225 of Intel C++ Studio XE for Linux
Auto Parallel:	No
File System:	tmpfs
System State:	Run Level 3 (multi-user)
Base Pointers:	32-bit
Peak Pointers:	32/64-bit
Other Software:	Microquill SmartHeap V9.01 SGI Foundation Software 2.6, Build 706r30.sles11sp2-1205012006 SGI Accelerate 1.4, Build 706r30.sles11sp2-1205012006

Results Table

Benchmark	Base							Peak
Benchmark	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench	1016	749	13300	751	13200	752	13200
401.bzip2	1016	1019	9630	1019	9620	1022	9600
403.gcc	1016	643	12700	640	12800	644	12700
429.mcf	1016	417	22200	403	23000	422	21900
445.gobmk	1016	1054	10100	1042	10200	1042	10200
456.hmmer	1016	448	21200	450	21100	451	21000
458.sjeng	1016	931	13200	931	13200	931	13200
462.libquantum	1016	193	109000	193	109000	193	109000
464.h264ref	1016	980	22900	980	22900	977	23000
471.omnetpp	1016	636	9980	637	9970	636	9990
473.astar	1016	702	10200	703	10100	701	10200
483.xalancbmk	1016	399	17600	403	17400	399	17600

Submit Notes

 The dplace mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate dplace commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Tmpfs filesystem set up with:
   mount -t tmpfs -o remount,size=2048g,rw,mpol=interleave tmpfs /dev/shm/
   The mpol=interleave option sets the NUMA memory allocation
   policy for all files to allocate from each node in turn.

 Stack size set to unlimited using "ulimit -s unlimited"

General Notes

Environment variables set by runspec before the start of the run:
LD_LIBRARY_PATH = "/dev/shm/cpu2006-1.2/libs/32:/dev/shm/cpu2006-1.2/libs/64"

 Binaries compiled on a system with 1x Core i7-860 CPU + 8GB
 memory using RHEL5.5
 Transparent Huge Pages enabled with:
 echo always > /sys/kernel/mm/transparent_hugepage/enabled
 Filesystem page cache cleared with:
 echo 1 > /proc/sys/vm/drop_caches

Base Compiler Invocation

C benchmarks:

icc -m32

C++ benchmarks:

icpc -m32

Base Portability Flags

400.perlbench:	-DSPEC_CPU_LINUX_IA32
462.libquantum:	-DSPEC_CPU_LINUX
483.xalancbmk:	-DSPEC_CPU_LINUX

Base Optimization Flags

C benchmarks:

-xAVX -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3

C++ benchmarks:

-xAVX -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 -Wl,-z,muldefs -L/smartheap -lsmartheap

Base Other Flags

C benchmarks:

403.gcc:

-Dalloca=_alloca

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20111122.html,
http://www.spec.org/cpu2006/flags/SGI-platform.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20111122.xml,
http://www.spec.org/cpu2006/flags/SGI-platform.xml.