SPEC(R) CFP2006 Summary HITACHI Compute Blade 520H (Intel Xeon E5-2670) Thu Mar 22 08:24:37 2012 CPU2006 License: 35 Test date: Mar-2012 Test sponsor: HITACHI Hardware availability: Apr-2012 Tested by: HITACHI Software availability: Feb-2012 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 410.bwaves 32 1075 405 S 16 527 413 S 410.bwaves 32 1075 404 * 16 527 412 * 410.bwaves 32 1076 404 S 16 527 412 S 416.gamess 32 1216 515 * 32 1191 526 S 416.gamess 32 1220 514 S 32 1196 524 * 416.gamess 32 1215 516 S 32 1197 523 S 433.milc 32 751 391 * 32 749 392 S 433.milc 32 750 392 S 32 748 393 S 433.milc 32 751 391 S 32 749 392 * 434.zeusmp 32 537 542 S 32 537 542 S 434.zeusmp 32 536 544 * 32 536 544 * 434.zeusmp 32 531 549 S 32 531 549 S 435.gromacs 32 546 418 * 32 546 418 S 435.gromacs 32 545 419 S 32 544 420 S 435.gromacs 32 547 417 S 32 545 419 * 436.cactusADM 32 621 616 S 32 621 616 S 436.cactusADM 32 623 614 S 32 623 614 S 436.cactusADM 32 621 616 * 32 621 616 * 437.leslie3d 32 1087 277 S 16 505 298 * 437.leslie3d 32 1084 277 S 16 505 298 S 437.leslie3d 32 1086 277 * 16 505 298 S 444.namd 32 620 414 S 32 615 417 * 444.namd 32 621 413 * 32 614 418 S 444.namd 32 628 409 S 32 617 416 S 447.dealII 32 417 877 S 32 417 877 S 447.dealII 32 417 878 * 32 417 878 * 447.dealII 32 414 884 S 32 414 884 S 450.soplex 32 908 294 * 16 380 351 S 450.soplex 32 911 293 S 16 380 351 * 450.soplex 32 908 294 S 16 381 351 S 453.povray 32 248 688 S 32 210 812 S 453.povray 32 247 691 * 32 214 794 S 453.povray 32 246 692 S 32 211 808 * 454.calculix 32 415 637 * 32 416 634 S 454.calculix 32 415 636 S 32 413 639 * 454.calculix 32 414 637 S 32 411 642 S 459.GemsFDTD 32 1280 265 * 32 1280 265 * 459.GemsFDTD 32 1281 265 S 32 1281 265 S 459.GemsFDTD 32 1280 265 S 32 1280 265 S 465.tonto 32 580 543 S 32 557 565 S 465.tonto 32 583 540 S 32 557 565 * 465.tonto 32 581 542 * 32 557 565 S 470.lbm 32 847 519 S 32 847 519 S 470.lbm 32 844 521 S 32 844 521 S 470.lbm 32 846 520 * 32 846 520 * 481.wrf 32 735 487 * 32 727 492 S 481.wrf 32 734 487 S 32 726 492 * 481.wrf 32 735 487 S 32 726 493 S 482.sphinx3 32 1371 455 S 32 1371 455 S 482.sphinx3 32 1373 454 S 32 1373 454 S 482.sphinx3 32 1372 455 * 32 1372 455 * ============================================================================== 410.bwaves 32 1075 404 * 16 527 412 * 416.gamess 32 1216 515 * 32 1196 524 * 433.milc 32 751 391 * 32 749 392 * 434.zeusmp 32 536 544 * 32 536 544 * 435.gromacs 32 546 418 * 32 545 419 * 436.cactusADM 32 621 616 * 32 621 616 * 437.leslie3d 32 1086 277 * 16 505 298 * 444.namd 32 621 413 * 32 615 417 * 447.dealII 32 417 878 * 32 417 878 * 450.soplex 32 908 294 * 16 380 351 * 453.povray 32 247 691 * 32 211 808 * 454.calculix 32 415 637 * 32 413 639 * 459.GemsFDTD 32 1280 265 * 32 1280 265 * 465.tonto 32 581 542 * 32 557 565 * 470.lbm 32 846 520 * 32 846 520 * 481.wrf 32 735 487 * 32 726 492 * 482.sphinx3 32 1372 455 * 32 1372 455 * SPECfp(R)_rate_base2006 468 SPECfp_rate2006 482 HARDWARE -------- CPU Name: Intel Xeon E5-2670 CPU Characteristics: Intel Turbo Boost Technology up to 3.30 GHz CPU MHz: 2600 FPU: Integrated CPU(s) enabled: 16 cores, 2 chips, 8 cores/chip, 2 threads/core CPU(s) orderable: 1, 2 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 20 MB I+D on chip per chip Other Cache: None Memory: 128 GB (16 x 8 GB 2Rx4 PC3L-12800R-11, ECC) Disk Subsystem: 1 x 146 GB SAS, 15000 RPM Other Hardware: None SOFTWARE -------- Operating System: Red Hat Enterprise Linux Server release 6.2, Kernel 2.6.32-220.4.2.el6.x86_64 Compiler: C/C++: Version 12.1.0.225 of Intel C++ Studio XE for Linux; Fortran: Version 12.1.0.225 of Intel Fortran Studio XE for Linux Auto Parallel: No File System: ext4 System State: Run level 3 (multi-user) Base Pointers: 32/64-bit Peak Pointers: 32/64-bit Other Software: None Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- Sysinfo program /home/cpu2006/config/sysinfo.rev6800 $Rev: 6800 $ $Date:: 2011-10-11 #$ 6f2ebdff5032aaa42e583f96b07f99d3 running on localhost.localdomain Thu Mar 22 21:24:39 2012 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-2670 0 @ 2.60GHz 2 "physical id"s (chips) 32 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 8 siblings : 16 physical 0: cores 0 1 2 3 4 5 6 7 physical 1: cores 0 1 2 3 4 5 6 7 cache size : 20480 KB From /proc/meminfo MemTotal: 132137096 kB HugePages_Total: 0 Hugepagesize: 2048 kB /usr/bin/lsb_release -d Red Hat Enterprise Linux Server release 6.2 (Santiago) From /etc/*release* /etc/*version* redhat-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release-cpe: cpe:/o:redhat:enterprise_linux:6server:ga:server uname -a: Linux localhost.localdomain 2.6.32-220.4.2.el6.x86_64 #1 SMP Mon Feb 6 16:39:28 EST 2012 x86_64 x86_64 x86_64 GNU/Linux run-level 3 Mar 22 21:19 (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/home/cpu2006/libs/32:/home/cpu2006/libs/64" Binaries compiled on a system with 1x Core i7-860 CPU + 8GB memory using RHEL5.5 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/redhat_transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches runspec command invoked through numactl i.e.: numactl --interleave=all runspec HITACHI BladeSymphony BS520H and HITACHI Compute Blade 520H are electronically equivalent. The results have been measured on a HITACHI BladeSymphony BS520H. Base Compiler Invocation ------------------------ C benchmarks: icc -m64 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Benchmarks using both Fortran and C: icc -m64 ifort -m64 Base Portability Flags ---------------------- 410.bwaves: -DSPEC_CPU_LP64 416.gamess: -DSPEC_CPU_LP64 433.milc: -DSPEC_CPU_LP64 434.zeusmp: -DSPEC_CPU_LP64 435.gromacs: -DSPEC_CPU_LP64 -nofor_main 436.cactusADM: -DSPEC_CPU_LP64 -nofor_main 437.leslie3d: -DSPEC_CPU_LP64 444.namd: -DSPEC_CPU_LP64 447.dealII: -DSPEC_CPU_LP64 450.soplex: -DSPEC_CPU_LP64 453.povray: -DSPEC_CPU_LP64 454.calculix: -DSPEC_CPU_LP64 -nofor_main 459.GemsFDTD: -DSPEC_CPU_LP64 465.tonto: -DSPEC_CPU_LP64 470.lbm: -DSPEC_CPU_LP64 481.wrf: -DSPEC_CPU_LP64 -DSPEC_CPU_CASE_FLAG -DSPEC_CPU_LINUX 482.sphinx3: -DSPEC_CPU_LP64 Base Optimization Flags ----------------------- C benchmarks: -xAVX -ipo -O3 -no-prec-div -static -opt-prefetch -auto-p32 -ansi-alias -opt-mem-layout-trans=3 C++ benchmarks: -xAVX -ipo -O3 -no-prec-div -static -opt-prefetch -auto-p32 -ansi-alias -opt-mem-layout-trans=3 Fortran benchmarks: -xAVX -ipo -O3 -no-prec-div -static -opt-prefetch Benchmarks using both Fortran and C: -xAVX -ipo -O3 -no-prec-div -static -opt-prefetch -auto-p32 -ansi-alias -opt-mem-layout-trans=3 Peak Compiler Invocation ------------------------ C benchmarks: icc -m64 C++ benchmarks (except as noted below): icpc -m64 450.soplex: icpc -m32 Fortran benchmarks: ifort -m64 Benchmarks using both Fortran and C: icc -m64 ifort -m64 Peak Portability Flags ---------------------- 410.bwaves: -DSPEC_CPU_LP64 416.gamess: -DSPEC_CPU_LP64 433.milc: -DSPEC_CPU_LP64 434.zeusmp: -DSPEC_CPU_LP64 435.gromacs: -DSPEC_CPU_LP64 -nofor_main 436.cactusADM: -DSPEC_CPU_LP64 -nofor_main 437.leslie3d: -DSPEC_CPU_LP64 444.namd: -DSPEC_CPU_LP64 447.dealII: -DSPEC_CPU_LP64 453.povray: -DSPEC_CPU_LP64 454.calculix: -DSPEC_CPU_LP64 -nofor_main 459.GemsFDTD: -DSPEC_CPU_LP64 465.tonto: -DSPEC_CPU_LP64 470.lbm: -DSPEC_CPU_LP64 481.wrf: -DSPEC_CPU_LP64 -DSPEC_CPU_CASE_FLAG -DSPEC_CPU_LINUX 482.sphinx3: -DSPEC_CPU_LP64 Peak Optimization Flags ----------------------- C benchmarks: 433.milc: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -static -auto-ilp32 -opt-mem-layout-trans=3 470.lbm: basepeak = yes 482.sphinx3: basepeak = yes C++ benchmarks: 444.namd: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -fno-alias -auto-ilp32 447.dealII: basepeak = yes 450.soplex: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -opt-malloc-options=3 453.povray: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll4 -ansi-alias Fortran benchmarks: 410.bwaves: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -static 416.gamess: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll2 -inline-level=0 -scalar-rep- -static 434.zeusmp: basepeak = yes 437.leslie3d: -xAVX -ipo -O3 -no-prec-div -static -opt-prefetch 459.GemsFDTD: basepeak = yes 465.tonto: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll4 -auto -inline-calloc -opt-malloc-options=3 Benchmarks using both Fortran and C: 435.gromacs: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -opt-prefetch -static -auto-ilp32 -opt-mem-layout-trans=3 436.cactusADM: basepeak = yes 454.calculix: -xAVX -ipo -O3 -no-prec-div -static -auto-ilp32 -opt-mem-layout-trans=3 481.wrf: Same as 454.calculix The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20111122.html http://www.spec.org/cpu2006/flags/PlatformHitachi-V1.2.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20111122.xml http://www.spec.org/cpu2006/flags/PlatformHitachi-V1.2.xml SPEC and SPECfp are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Thu Jul 24 07:07:17 2014 by CPU2006 ASCII formatter v6932. Originally published on 10 April 2012.