SPEC(R) CINT2006 Summary IBM Corporation IBM BladeCenter HS21 XM (Intel Xeon E5345) Wed Jan 3 04:12:09 2007 CPU2006 License: 11 Test date: Jan-2007 Test sponsor: IBM Corporation Hardware availability: Feb-2007 Tested by: IBM Corporation Software availability: Aug-2006 Base Base Base Peak Peak Peak Benchmarks Ref. Run Time Ratio Ref. Run Time Ratio -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 9770 575 17.0 S 400.perlbench 9770 575 17.0 * 400.perlbench 9770 575 17.0 S 401.bzip2 9650 795 12.1 S 401.bzip2 9650 795 12.1 * 401.bzip2 9650 796 12.1 S 403.gcc 8050 806 9.99 S 403.gcc 8050 804 10.0 S 403.gcc 8050 805 10.0 * 429.mcf 9120 569 16.0 * 429.mcf 9120 569 16.0 S 429.mcf 9120 569 16.0 S 445.gobmk 10490 687 15.3 S 445.gobmk 10490 687 15.3 S 445.gobmk 10490 687 15.3 * 456.hmmer 9330 945 9.87 S 456.hmmer 9330 945 9.87 S 456.hmmer 9330 945 9.87 * 458.sjeng 12100 849 14.2 S 458.sjeng 12100 849 14.3 S 458.sjeng 12100 849 14.3 * 462.libquantum 20720 1489 13.9 * 462.libquantum 20720 1489 13.9 S 462.libquantum 20720 1488 13.9 S 464.h264ref 22130 903 24.5 S 464.h264ref 22130 904 24.5 * 464.h264ref 22130 904 24.5 S 471.omnetpp 6250 595 10.5 S 471.omnetpp 6250 594 10.5 * 471.omnetpp 6250 594 10.5 S 473.astar 7020 637 11.0 * 473.astar 7020 637 11.0 S 473.astar 7020 637 11.0 S 483.xalancbmk 6900 395 17.5 * 483.xalancbmk 6900 395 17.5 S 483.xalancbmk 6900 395 17.5 S ============================================================================== 400.perlbench 9770 575 17.0 * 401.bzip2 9650 795 12.1 * 403.gcc 8050 805 10.0 * 429.mcf 9120 569 16.0 * 445.gobmk 10490 687 15.3 * 456.hmmer 9330 945 9.87 * 458.sjeng 12100 849 14.3 * 462.libquantum 20720 1489 13.9 * 464.h264ref 22130 904 24.5 * 471.omnetpp 6250 594 10.5 * 473.astar 7020 637 11.0 * 483.xalancbmk 6900 395 17.5 * SPECint(R)_base2006 13.8 SPECint2006 Not Run HARDWARE -------- CPU Name: Intel Xeon E5345 CPU Characteristics: 1333MHz system bus CPU MHz: 2333 FPU: Integrated CPU(s) enabled: 8 cores, 2 chips, 4 cores/chip CPU(s) orderable: 1,2 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 8 MB I+D on chip per chip, 4 MB shared / 2 cores L3 Cache: None Other Cache: None Memory: 16 GB (8 x 2GB DDR2-5300F ECC) Disk Subsystem: 1 x 74 GB SAS, 1000 RPM Other Hardware: None SOFTWARE -------- Operating System: Microsoft Windows Server 2003 Enterprise x64 Edition + SP1 (64-bit) Compiler: Intel C++ Compiler for IA32 version 9.1 Build no 20060816 Microsoft Visual Studio .Net 2003 (for libraries) Auto Parallel: No File System: NTFS System State: Default Base Pointers: 32-bit Peak Pointers: Not Applicable Other Software: Smart Heap Library, Version 8 Base Compiler Invocation ------------------------ C benchmarks: icl -Qvc7.1 -Qc99 C++ benchmarks: icl -Qvc7.1 Base Portability Flags ---------------------- 403.gcc: -DSPEC_CPU_WIN32 464.h264ref: -DSPEC_CPU_NO_INTTYPES -DWIN32 Base Optimization Flags ----------------------- C benchmarks: -fast /F512000000 shlw32m.lib -link /FORCE:MULTIPLE C++ benchmarks: -fast -Qcxx_features /F512000000 shlw32m.lib -link /FORCE:MULTIPLE Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags file that was used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic91-flags.20090714.html You can also download the XML flags source by saving the following link: http://www.spec.org/cpu2006/flags/Intel-ic91-flags.20090714.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.0. Report generated on Tue Jul 22 10:36:50 2014 by CPU2006 ASCII formatter v6932. Originally published on 6 March 2007.