Base Compiler Invocation
C benchmarks
-
- icc
![[user]](http://www.spec.org/auto/accel/flags/user.png)
- CC, LD
-
Invoke the Intel C compiler.
Fortran benchmarks
-
- ifort
- FC, LD
-
Invoke the Intel Fortran compiler.
Compilers: Intel c/c++/fortran Compiler 17.0.3.191
Operating systems: Linux
Last updated: 04-Apr-2017
The text for many of the descriptions below was taken from the "icc --help".
Copyright © 1985-2017 Intel Corporation. All Rights Reserved.
Invoke the Intel C compiler.
Invoke the Intel Fortran compiler.
Invoke the Intel C compiler.
Invoke the Intel Fortran compiler.
![[benchmark]](http://www.spec.org/auto/accel/flags/benchmark.png)
Enable use of SIMD directive inside of loop rather than on outer loop.
Enables the use of nested SIMD statements for OpenMP.
Enables the use of nested SIMD statements for OpenMP.
Enable use of SIMD directive inside of loop rather than on outer loop.
FPORTABILITY flag
Enable use of SIMD directive inside of loop rather than on outer loop.
Enables the use of nested SIMD statements for OpenMP.
Enable use of SIMD directive inside of loop rather than on outer loop.
Enables the use of nested SIMD statements for OpenMP.
Enable use of SIMD directive inside of loop rather than on outer loop.
Enable use of SIMD directive inside of loop rather than on outer loop.
Enable use of SIMD directive inside of loop rather than on outer loop.
Enable use of SIMD directive inside of loop rather than on outer loop.
No Fortran main method exists, use C equivalent instead.
Enables the use of nested SIMD statements for OpenMP.
Enable use of SIMD directive inside of loop rather than on outer loop.
Enable use of SIMD directive inside of loop rather than on outer loop.
Enable use of SIMD directive inside of loop rather than on outer loop.
Enables the use of nested SIMD statements for OpenMP.
Enables the use of nested SIMD statements for OpenMP.
Enable use of SIMD directive inside of loop rather than on outer loop.
FPORTABILITY flag
Enable use of SIMD directive inside of loop rather than on outer loop.
By default, 551.ppalm uses the Temperton Algorithm to compute FFTs. By defining SPEC_HOST_FFTW3, the benchmark will instead use a user suppiled FFTW3 library. The arrays passed to this library will be the host copy.
Users must specify both -DSPEC_HOST_FFTW as well as the include path to the FFTW3 interface file, fftw3.f03. They must also add the FFTW3 libary to the libraries. For example:
315.palm:
Enables the use of nested SIMD statements for OpenMP.
Enable use of SIMD directive inside of loop rather than on outer loop.
Enables the use of nested SIMD statements for OpenMP.
Enable use of SIMD directive inside of loop rather than on outer loop.
Enable use of SIMD directive inside of loop rather than on outer loop.
Enable use of SIMD directive inside of loop rather than on outer loop.
Enable use of SIMD directive inside of loop rather than on outer loop.
No Fortran main method exists, use C equivalent instead.
Enables the use of nested SIMD statements for OpenMP.
Enable use of SIMD directive inside of loop rather than on outer loop.
Enable use of SIMD directive inside of loop rather than on outer loop.
optimize for maximum speed and enable more aggressive optimizations that may not improve performance on some programs
May generate Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512) Foundation instructions, Intel(R) AVX-512 Conflict Detection instructions, as well as the instructions enabled with CORE-AVX2. Optimizes for Intel(R) processors that support Intel(R) AVX-512 instructions.
Enable the compiler to generate multi-threaded code based on the OpenMP* directives (same as -fopenmp)
Enables OpenMP* offloading compilation for target pragmas. This
option only applies to Intel(R) MIC Architecture and Intel(R)
Graphics Technology. Enabled by default with -qopenmp.
Use -qno-openmp-offload to disable.
Specify kind to specify the default device for target pragmas
host - allow target code to run on host system while still doing
the outlining for offload
mic - specify Intel(R) MIC Architecture
gfx - specify Intel(R) Graphics Technology
optimize for maximum speed and enable more aggressive optimizations that may not improve performance on some programs
May generate Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512) Foundation instructions, Intel(R) AVX-512 Conflict Detection instructions, as well as the instructions enabled with CORE-AVX2. Optimizes for Intel(R) processors that support Intel(R) AVX-512 instructions.
Enable the compiler to generate multi-threaded code based on the OpenMP* directives (same as -fopenmp)
Enables OpenMP* offloading compilation for target pragmas. This
option only applies to Intel(R) MIC Architecture and Intel(R)
Graphics Technology. Enabled by default with -qopenmp.
Use -qno-openmp-offload to disable.
Specify kind to specify the default device for target pragmas
host - allow target code to run on host system while still doing
the outlining for offload
mic - specify Intel(R) MIC Architecture
gfx - specify Intel(R) Graphics Technology
optimize for maximum speed and enable more aggressive optimizations that may not improve performance on some programs
May generate Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512) Foundation instructions, Intel(R) AVX-512 Conflict Detection instructions, as well as the instructions enabled with CORE-AVX2. Optimizes for Intel(R) processors that support Intel(R) AVX-512 instructions.
Enable the compiler to generate multi-threaded code based on the OpenMP* directives (same as -fopenmp)
Enables OpenMP* offloading compilation for target pragmas. This
option only applies to Intel(R) MIC Architecture and Intel(R)
Graphics Technology. Enabled by default with -qopenmp.
Use -qno-openmp-offload to disable.
Specify kind to specify the default device for target pragmas
host - allow target code to run on host system while still doing
the outlining for offload
mic - specify Intel(R) MIC Architecture
gfx - specify Intel(R) Graphics Technology
optimize for maximum speed and enable more aggressive optimizations that may not improve performance on some programs
May generate Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512) Foundation instructions, Intel(R) AVX-512 Conflict Detection instructions, as well as the instructions enabled with CORE-AVX2. Optimizes for Intel(R) processors that support Intel(R) AVX-512 instructions.
Enable the compiler to generate multi-threaded code based on the OpenMP* directives (same as -fopenmp)
Enables OpenMP* offloading compilation for target pragmas. This
option only applies to Intel(R) MIC Architecture and Intel(R)
Graphics Technology. Enabled by default with -qopenmp.
Use -qno-openmp-offload to disable.
Specify kind to specify the default device for target pragmas
host - allow target code to run on host system while still doing
the outlining for offload
mic - specify Intel(R) MIC Architecture
gfx - specify Intel(R) Graphics Technology
Specifies whether streaming stores are generated:
always - enables generation of streaming stores under the assumption that the application is memory bound
auto - compiler decides when streaming stores are used (DEFAULT)
never - disables generation of streaming stores
Enable multi-file IP optimization between files.
optimize for maximum speed and enable more aggressive optimizations that may not improve performance on some programs
May generate Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512) Foundation instructions, Intel(R) AVX-512 Conflict Detection instructions, as well as the instructions enabled with CORE-AVX2. Optimizes for Intel(R) processors that support Intel(R) AVX-512 instructions.
Enable the compiler to generate multi-threaded code based on the OpenMP* directives (same as -fopenmp)
Enables OpenMP* offloading compilation for target pragmas. This
option only applies to Intel(R) MIC Architecture and Intel(R)
Graphics Technology. Enabled by default with -qopenmp.
Use -qno-openmp-offload to disable.
Specify kind to specify the default device for target pragmas
host - allow target code to run on host system while still doing
the outlining for offload
mic - specify Intel(R) MIC Architecture
gfx - specify Intel(R) Graphics Technology
Specifies whether streaming stores are generated:
always - enables generation of streaming stores under the assumption that the application is memory bound
auto - compiler decides when streaming stores are used (DEFAULT)
never - disables generation of streaming stores
optimize for maximum speed and enable more aggressive optimizations that may not improve performance on some programs
May generate Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512) Foundation instructions, Intel(R) AVX-512 Conflict Detection instructions, as well as the instructions enabled with CORE-AVX2. Optimizes for Intel(R) processors that support Intel(R) AVX-512 instructions.
Enable the compiler to generate multi-threaded code based on the OpenMP* directives (same as -fopenmp)
Enables OpenMP* offloading compilation for target pragmas. This
option only applies to Intel(R) MIC Architecture and Intel(R)
Graphics Technology. Enabled by default with -qopenmp.
Use -qno-openmp-offload to disable.
Specify kind to specify the default device for target pragmas
host - allow target code to run on host system while still doing
the outlining for offload
mic - specify Intel(R) MIC Architecture
gfx - specify Intel(R) Graphics Technology
defines the accuracy (precision) for math library functions value - defined as one of the following values high - equivalent to max-error = 0.6 medium - equivalent to max-error = 4 (DEFAULT) low - equivalent to accuracy-bits = 11 (single precision); accuracy-bits = 26 (double precision) funclist - optional comma separated list of one or more math library functions to which the attribute should be applied
optimize for maximum speed and enable more aggressive optimizations that may not improve performance on some programs
May generate Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512) Foundation instructions, Intel(R) AVX-512 Conflict Detection instructions, as well as the instructions enabled with CORE-AVX2. Optimizes for Intel(R) processors that support Intel(R) AVX-512 instructions.
Enable the compiler to generate multi-threaded code based on the OpenMP* directives (same as -fopenmp)
Enables OpenMP* offloading compilation for target pragmas. This
option only applies to Intel(R) MIC Architecture and Intel(R)
Graphics Technology. Enabled by default with -qopenmp.
Use -qno-openmp-offload to disable.
Specify kind to specify the default device for target pragmas
host - allow target code to run on host system while still doing
the outlining for offload
mic - specify Intel(R) MIC Architecture
gfx - specify Intel(R) Graphics Technology
Adds the directory for include files to the search path at compile time.
Adds the library directory search path at link time
optimize for maximum speed and enable more aggressive optimizations that may not improve performance on some programs
May generate Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512) Foundation instructions, Intel(R) AVX-512 Conflict Detection instructions, as well as the instructions enabled with CORE-AVX2. Optimizes for Intel(R) processors that support Intel(R) AVX-512 instructions.
Enable the compiler to generate multi-threaded code based on the OpenMP* directives (same as -fopenmp)
Enables OpenMP* offloading compilation for target pragmas. This
option only applies to Intel(R) MIC Architecture and Intel(R)
Graphics Technology. Enabled by default with -qopenmp.
Use -qno-openmp-offload to disable.
Specify kind to specify the default device for target pragmas
host - allow target code to run on host system while still doing
the outlining for offload
mic - specify Intel(R) MIC Architecture
gfx - specify Intel(R) Graphics Technology
Enable multi-file IP optimization between files.
optimize for maximum speed and enable more aggressive optimizations that may not improve performance on some programs
May generate Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512) Foundation instructions, Intel(R) AVX-512 Conflict Detection instructions, as well as the instructions enabled with CORE-AVX2. Optimizes for Intel(R) processors that support Intel(R) AVX-512 instructions.
Enable the compiler to generate multi-threaded code based on the OpenMP* directives (same as -fopenmp)
Enables OpenMP* offloading compilation for target pragmas. This
option only applies to Intel(R) MIC Architecture and Intel(R)
Graphics Technology. Enabled by default with -qopenmp.
Use -qno-openmp-offload to disable.
Specify kind to specify the default device for target pragmas
host - allow target code to run on host system while still doing
the outlining for offload
mic - specify Intel(R) MIC Architecture
gfx - specify Intel(R) Graphics Technology
Specifies whether streaming stores are generated:
always - enables generation of streaming stores under the assumption that the application is memory bound
auto - compiler decides when streaming stores are used (DEFAULT)
never - disables generation of streaming stores
Link using FFTW 3.3.6 library for Linux. Description from FFTW:
FFTW lib compiled with -O3 -xCORE-AVX2
FFTW is a C subroutine library for computing the discrete Fourier transform (DFT) in one or more dimensions, of arbitrary input size, and of both real and complex data (as well as of even/odd data, i.e. the discrete cosine/sine transforms or DCT/DST).
This result has been formatted using multiple flags files. The "sw environment" from each of them appears next.
BIOS settings
Maximum Performance
Mode will maximize the absolute performance of the system without regard for power.In this mode, power consumption is a don't care. Things like fan speed and heat output of the system may increase in addition to power consumption. Efficiency of the system may go down in this mode, but the absolute performance may increase depending on the workload that is running.
Custom
Allows the user to individually modify any of the low-level settings that are preset and unchangeable in any of the other 4 preset modes.
Hyper-Threading
Enabling Hyper-Threading let operating system addresses two virtual or logical cores for a physical presented core. Workloads can be shared between virtual or logical cores when possible. The main function of hyper-threading is to increase the number of independent instructions in the pipeline for using the processor resources more efficiently.
C-States
Legacy: When "Legacy" is selected, the operating system initiates the C-state transitions. For E5/E7 CPUs, ACPI C1/C2/C3 map to Intel C1/C3/C6. For 6500/7500 CPUs, ACPI C1/C3 map to Intel C1/C3 (ACPI C2 is not available). Some OS SW may defeat the ACPI mapping (e.g. intel_idle driver).
Autonomous: When "Autonomous" is selected, HALT and C1 request get converted to C6 requests in hardware.
Disable: When "Disable" is selected, only C0 and C1 are used by the OS. C1 gets enabled automatically when an OS autohalts.
Platform settings
One or more of the following settings may have been applied to the testbed. If so, the "Platform Notes" section of the report will say so; and you can read below to find out more about what these settings mean.
ulimit -s <n> (Unix)
Sets the stack size to n kbytes, or "unlimited" to allow the stack size to grow without limit.
Mode will maximize the absolute performance of the system without regard for power. In this mode, power consumption is a don't care. Things like fan speed and heat output of the system may increase in addition to power consumption. Efficiency of the system may go down in this mode, but the absolute performance may increase depending on the workload that is running.
Custom
Allows the user to individually modify any of the low-level settings that are preset and unchangeable in any of the other 4 preset modes.
Hyper-ThreadingEnabling Hyper-Threading let operating system addresses two virtual or logical cores for a physical presented core. Workloads can be shared between virtual or logical cores when possible. The main function of hyper-threading is to increase the number of independent instructions in the pipeline for using the processor resources more efficiently.
C-StatesLegacy: When "Legacy" is selected, the operating system initiates the C-state transitions. For E5/E7 CPUs, ACPI C1/C2/C3 map to Intel C1/C3/C6. For 6500/7500 CPUs, ACPI C1/C3 map to Intel C1/C3 (ACPI C2 is not available). Some OS SW may defeat the ACPI mapping (e.g. intel_idle driver). Autonomous: When "Autonomous" is selected, HALT and C1 request get converted to C6 requests in hardware. Disable: When "Disable" is selected, only C0 and C1 are used by the OS. C1 gets enabled automatically when an OS autohalts.
Flag description origin markings:
|
Indicates that the flag description came from the user flags file. |
![[suite]](http://www.spec.org/auto/accel/flags/suite.png) |
Indicates that the flag description came from the suite-wide flags file. |
|
Indicates that the flag description came from a per-benchmark flags file. |
For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2015-2020 Standard Performance Evaluation Corporation
Tested with SPEC ACCEL v1.3.
Report generated on Tue Oct 13 17:09:56 2020 by SPEC ACCEL flags formatter v1290.