SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
Hewlett-Packard Company
HP Integrity Server rx1600 (1000 MHz, Itanium 2)
SPECint_rate2000 = 19.1  
SPECint_rate_base2000 = 18.8  
SPEC license # 3 Tested by: HP Richardson Test date: Jan-2004 Hardware Avail: Mar-2004 Software Avail: Mar-2004
Graph Scale Benchmark Base
Copies
Base
Runtime
Base
Ratio
Copies Runtime Ratio
164.gzip base result bar (14.8)
164.gzip peak result bar (14.8)
164.gzip 2 220    14.8   2 220    14.8  
175.vpr base result bar (15.2)
175.vpr peak result bar (15.4)
175.vpr 2 214    15.2   2 212    15.4  
176.gcc base result bar (22.9)
176.gcc peak result bar (22.9)
176.gcc 2 112    22.9   2 112    22.9  
181.mcf base result bar (14.7)
181.mcf peak result bar (14.7)
181.mcf 2 284    14.7   2 284    14.7  
186.crafty base result bar (19.0)
186.crafty peak result bar (19.0)
186.crafty 2 122    19.0   2 122    19.0  
197.parser base result bar (14.5)
197.parser peak result bar (14.5)
197.parser 2 289    14.5   2 289    14.5  
252.eon base result bar (28.0)
252.eon peak result bar (28.7)
252.eon 2 108    28.0   2 105    28.7  
253.perlbmk base result bar (19.1)
253.perlbmk peak result bar (20.6)
253.perlbmk 2 219    19.1   2 203    20.6  
254.gap base result bar (18.3)
254.gap peak result bar (18.3)
254.gap 2 140    18.3   2 140    18.3  
255.vortex base result bar (27.6)
255.vortex peak result bar (27.9)
255.vortex 2 160    27.6   2 158    27.9  
256.bzip2 base result bar (17.1)
256.bzip2 peak result bar (17.1)
256.bzip2 2 203    17.1   2 203    17.1  
300.twolf base result bar (19.9)
300.twolf peak result bar (21.5)
300.twolf 2 350    19.9   2 324    21.5  
  SPECint_rate_base2000 18.8    
  SPECint_rate2000 19.1  

Hardware
Hardware Vendor: Hewlett-Packard Company
Model Name: HP Integrity Server rx1600 (1000 MHz, Itanium 2)
CPU: Intel Itanium 2
CPU MHz: 1000
FPU: Integrated
CPU(s) enabled: 2 cores, 2 chips, 1 core/chip
CPU(s) orderable: 1-2
Parallel: no
Primary Cache: 16KBI + 16KBD (on chip) per CPU
Secondary Cache: 256KB (on chip) per CPU
L3 Cache: 1.5MB (on chip) per CPU
Other Cache: N/A
Memory: 8GB (8 * 1GB DIMMs)
Disk Subsystem: 1x147GB 10k RPM SCSI disk
Other Hardware: N/A
Software
Operating System: HPUX11i-TCOE B.11.23
Compiler: HP C/ANSI C Compiler B.11.23 (C.05.55)
HP aC++ Compiler B.11.23 (C.05.55)
File System: VxFS
System State: Multi-user
Notes / Tuning Information
 Portability Flags
 176.gcc    : -DHOST_WORDS_BIG_ENDIAN
 186.crafty : -DHP
 252.eon    : -DFMAX_IS_DOUBLE
 253.perlbmk: -DSPEC_CPU2000_HP
 254.gap    : -DSPEC_CPU2000_HP -DSYS_IS_USG -DSYS_HAS_IOCTL_PROTO
              -DSYS_HAS_TIME_PROTO -DSYS_HAS_CALLOC_PROTO
 
Base Flags
 PBO       : +Oprofile=collect:all/+Oprofile=use
 C         : PBO +Ofaster -exec +Odatalayout
 C++       : PBO +Ofaster +inline_level 2 -minshared 
 
Peak Flags
 164.gzip   : basepeak=true
 175.vpr    : PBO +Ofaster +Odatalayout +Onorecovery 
                +Onoptrs_to_globals -exec
              LIBS = -Wl,-aarchive_shared -Bprotected
 176.gcc    : basepeak=true
 181.mfc    : basepeak=true
 186.crafty : basepeak=true
 197.parser : basepeak=true
 252.eon    : PBO +Ofaster +Odatalayout +Otype_safety=ansi
                +inline_level 2 -minshared
 253.perlbmk: PBO +Ofaster +Odatalayout +Onoptrs_to_globals -exec
              LIBS = -Wl,-aarchive_shared -Bprotected_def fastmem.o
 254.gap    : basepeak=true
 255.vortex : PBO +Ofaster +Odatalayout +Onorecovery 
                +Onoptrs_to_globals -exec
              LIBS = -Wl,-aarchive_shared -Bprotected
 256.bzip2  : basepeak=true
 300.twolf  : PBO +Ofaster +Odatalayout +Onoptrs_to_globals -exec
              LIBS = -Wl,-aarchive_shared -Bprotected_data effmem.o

 Kernel Tunables:
   maxdsiz            0x7b03a000
   maxdsiz_64bit   0x04000000000
   maxssiz            0x10000000
   maxssiz_64bit      0x40000000
   vps_ceiling             16384
   vps_pagesize             4096
   swapmem_on                  0
   dbc_max_pct                20
   dbc_min_pct                20

 Note:
   EFI shell utility 'cpuconfig' used 
   to deconfigure processors if necessary
 


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Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 24-Feb-2004

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