SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
IBM Corporation
IBM eServer pSeries 690 Turbo (1300 MHz, 16 CPU)
SPECint_rate2000 = 131    
SPECint_rate_base2000 = 125    
SPEC license # 11 Tested by: IBM, Austin, TX Test date: Jun-2002 Hardware Avail: Dec-2001 Software Avail: Sep-2002
Graph Scale Benchmark Base
Copies
Base
Runtime
Base
Ratio
Copies Runtime Ratio
164.gzip base result bar (107)
164.gzip peak result bar (107)
164.gzip 16 242    107     16 242    107    
175.vpr base result bar (105)
175.vpr peak result bar (105)
175.vpr 16 248    105     16 248    105    
176.gcc base result bar (134)
176.gcc peak result bar (134)
176.gcc 16 153    134     16 152    134    
181.mcf base result bar (107)
181.mcf peak result bar (108)
181.mcf 16 312    107     16 309    108    
186.crafty base result bar (125)
186.crafty peak result bar (153)
186.crafty 16 148    125     16 121    153    
197.parser base result bar (80.5)
197.parser peak result bar (80.5)
197.parser 16 415    80.5   16 415    80.5  
252.eon base result bar (185)
252.eon peak result bar (185)
252.eon 16 130    185     16 130    185    
253.perlbmk base result bar (110)
253.perlbmk peak result bar (125)
253.perlbmk 16 305    110     16 267    125    
254.gap base result bar (140)
254.gap peak result bar (140)
254.gap 16 146    140     16 146    140    
255.vortex base result bar (205)
255.vortex peak result bar (220)
255.vortex 16 172    205     16 160    220    
256.bzip2 base result bar (137)
256.bzip2 peak result bar (137)
256.bzip2 16 204    137     16 204    137    
300.twolf base result bar (112)
300.twolf peak result bar (132)
300.twolf 16 495    112     16 422    132    
  SPECint_rate_base2000 125      
  SPECint_rate2000 131    

Hardware
Hardware Vendor: IBM Corporation
Model Name: IBM eServer pSeries 690 Turbo (1300 MHz, 16 CPU)
CPU: POWER4
CPU MHz: 1300
FPU: Integrated
CPU(s) enabled: 16 cores, 8 chips, 2 cores/chip, 4 chips/MCM
CPU(s) orderable: 1,2,3,4 (order by # MCM)
Parallel: No
Primary Cache: 64KBI+32KBD (on chip) per core
Secondary Cache: 1440KB unified (on chip) per chip
L3 Cache: 128MB unified (off-chip) per MCM, 2 MCMs in SUT (4 chips per MCM)
Other Cache: None
Memory: 64 GB
Disk Subsystem: 1X16GB 1X8GB
Other Hardware: None
Software
Operating System: AIX 5L V5.1
Compiler: IBM VisualAge C for AIX,
Version 6.0
IBM VisualAge C++ for AIX,
Version 6.0
File System: AIX/JFS
System State: Multi-User
Notes / Tuning Information
 Portability Flags:
   gcc:     -ma -DHOST_WORDS_BIG_ENDIAN
   crafty:  -DAIX
   eon:     -DNEED_EXPLICIT_SPECIALIZATION
             -I. -DNDEBUG
   perlbmk: -DSPEC_CPU2000_AIX
   gap:     -DSYS_IS_BSD -DSYS_STRING_H -DSYS_HAS_TIME_PROTO
            -DSYS_HAS_MALLOC_PROTO -DSYS_HAS_CALLOC_PROTO
   twolf:   -DHAVE_SIGNED_CHAR

 Base Optimization Flags:
   C:
   -qpdf1/pdf2 
   -O5 -blpdata -qalign=natural
   C++:
   -qpdf1/pdf2 
   -O5 -lhmu -qalign=natural

 Integer Peak Optimization Flags
 164.gzip 
   BASEPEAK = 1
 175.vpr 
   BASEPEAK = 1
 176.gcc 
   -qpdf1/pdf2 
   -O5 -lhmu -qalign=natural
 181.mcf 
   fdpr -v -R3
   -O3 -lhmu -qipa=partition=large -blpdata
 186.crafty 
   fdpr -v -R3
   -O4 -q64
 197.parser 
   BASEPEAK = 1
 252.eon 
   BASEPEAK = 1
 253.perlbmk 
   -qpdf1/pdf2 
   -O5 -lhmu -qalign=natural
 254.gap 
   BASEPEAK = 1
 255.vortex 
   -qpdf1/pdf2 
   -O5 -lhmu -qalign=natural
 256.bzip2 
   BASEPEAK = 1
 300.twolf 
   -qpdf1/pdf2 
   -O5 -lhmu -qalign=natural -blpdata

   fpdr: Feedback directed program restructuring tool.
   /usr/spec2000 filesystem mounted with no JFS log file I/O.
   APAR IY 28102 was applied to AIX to enable new hardware support.
   ulimits set to unlimited.
   C: IBM VAC++ invoked as cc except where noted as xlc.
   C++: IBM VAC++ invoked as xlC.
   Large page mode and memory affinity were set as follows:
   vmtune -g 16777216 -L 1024 -y1

 MCM = Multi-chip Module
 SUT = System under Test


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Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 16-Jul-2002

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