SPEC OMPM2001 Summary SGI SGI Altix 3000 (1500MHz, Itanium 2) Sun Apr 25 17:20:52 2004 SPEC License #HPG0014 Tester: SGI Test date: Apr-2004 Test Site: SGI Hardware availability: Jun-2003 Software availability: May-2004 Base Base Base Peak Peak Peak Benchmarks Ref Time Run Time Ratio Ref Time Run Time Ratio ------------- -------- -------- -------- -------- -------- -------- 310.wupwise_m 6000 81.7 73444* 6000 81.7 73444* 310.wupwise_m 6000 81.0 74099 6000 81.0 74099 312.swim_m 6000 52.6 114079* 6000 52.6 114079* 312.swim_m 6000 52.3 114721 6000 52.3 114721 314.mgrid_m 7300 146 50118 7300 146 50118 314.mgrid_m 7300 146 50103* 7300 146 50103* 316.applu_m 4000 82.0 48752 4000 82.0 48752 316.applu_m 4000 82.1 48746* 4000 82.1 48746* 318.galgel_m 5100 596 8555* 5100 417 12217 318.galgel_m 5100 594 8581 5100 425 11988* 320.equake_m 2600 93.1 27913* 2600 60.0 43316 320.equake_m 2600 92.8 28002 2600 60.5 42959* 324.apsi_m 3400 84.0 40499 3400 74.3 45749 324.apsi_m 3400 84.1 40424* 3400 74.3 45740* 326.gafort_m 8700 326 26687 8700 268 32486 326.gafort_m 8700 327 26638* 8700 269 32330* 328.fma3d_m 4600 168 27384* 4600 122 37764* 328.fma3d_m 4600 168 27421 4600 122 37799 330.art_m 6400 60.6 105691 6400 60.6 105691 330.art_m 6400 60.7 105439* 6400 60.7 105439* 332.ammp_m 7000 462 15140 7000 473 14800* 332.ammp_m 7000 463 15119* 7000 473 14808 ======================================================================== 310.wupwise_m 6000 81.7 73444* 6000 81.7 73444* 312.swim_m 6000 52.6 114079* 6000 52.6 114079* 314.mgrid_m 7300 146 50103* 7300 146 50103* 316.applu_m 4000 82.1 48746* 4000 82.1 48746* 318.galgel_m 5100 596 8555* 5100 425 11988* 320.equake_m 2600 93.1 27913* 2600 60.5 42959* 324.apsi_m 3400 84.1 40424* 3400 74.3 45740* 326.gafort_m 8700 327 26638* 8700 269 32330* 328.fma3d_m 4600 168 27384* 4600 122 37764* 330.art_m 6400 60.7 105439* 6400 60.7 105439* 332.ammp_m 7000 463 15119* 7000 473 14800* SPECompMbase2001 37869 SPECompMpeak2001 42954 HARDWARE -------- Hardware Vendor: SGI Model Name: SGI Altix 3000 (1500MHz, Itanium 2) CPU: Intel Itanium 2 CPU MHz: 1500 FPU: Integrated CPU(s) enabled: 64 cores, 64 chips, 1 core/chip CPU(s) orderable: 4-256 Primary Cache: 16KBI + 16KBD (on chip) per core Secondary Cache: 256KB (on chip) per core L3 Cache: 6.0MB (on chip) per core Other Cache: N/A Memory: 256 GB (16*1024MB PC2100 DIMMS per 4 core module) Disk Subsystem: 1 x 36 GB SCSI (Seagate Cheetah 15k rpm) Other Hardware: None SOFTWARE -------- OpenMP Threads: 64 Parallel: OpenMP Operating System: SGI ProPack(TM) 3 Compiler: Intel(R) Fortran Compiler for Linux 8.0 (Build 20040416) Intel(R) C++ Compiler for Linux 8.0 (Build 20040416) File System: xfs System State: Single-user NOTES ----- Baseline optimization flags: C programs: -openmp -O3 -ipo -ansi -ansi_alias -auto_ilp32 (ONESTEP) Fortran programs: -openmp -O3 -ipo (ONESTEP) OpenMP runtime library libguide.a statically linked Portability Flags: 318.galgel_m: -FI -132 Extra Flags: 330.art_m: -DINTS_PER_CACHELINE=32 -DDBLS_PER_CACHELINE=16 Baseline user environment: OMP_NUM_THREADS=64 limit stacksize 64000 KMP_STACKSIZE 31M KMP_LIBRARY TURNAROUND OMP_DYNAMIC FALSE KMP_SCHEDULE static,balanced Peak optimization flags: 310.wupwise_m: basepeak=true 312.swim_m: basepeak=true 314.mgrid_m: basepeak=true 316.applu_m: basepeak=true 318.galgel_m: -openmp -O3 -ipo (ONESTEP) OMP_NUM_THREADS=16 320.equake_m: -openmp -O3 -ipo -ansi -ansi_alias -auto_ilp32 (ONESTEP) 324.apsi_m: -openmp -O3 -ipo (ONESTEP) 326.gafort_m: -openmp -O3 -ipo (ONESTEP) 328.fma3d_m: -openmp -O3 -ipo (ONESTEP) 330.art_m: basepeak=true 332.ammp_m: -openmp -O2 -ansi_alias -auto_ilp32 (ONESTEP) Alternate sources: Add critical region around update of linked list in parallel loop. Approved src.alt available as ompm-purdue1-20040324.tar.gz Used for 330.art_m, base and peak. Peak sources: SPEC OMPL2001 source for 64bit systems modified for SPEC OMPM2001. Available as ompl src.alt in SPEC OMP v3.0 Used for 320.equake_m, 324.apsi_m, 326.gafort_m, and 328.fma3d_m. For all benchmarks threads were bound to CPUs using the following submit command: dplace -x2 -cNTM1,0 $command, where NTM1 is the number of threads minus 1. This binds threads in order of creation, beginning with the master thread on cpu NTM1, the first slave thread on cpu NTM1-1, and so on. The -x2 flag instructs dplace to skip placement of the lightweight OpenMP monitor thread, which is created prior to the slave threads. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 1999-2002 Standard Performance Evaluation Corporation Generated on Wed May 12 17:12:36 2004 by SPEC OMP2001 ASCII formatter v2.1