SPEC Seal of Reviewal OMPM2001 Result
Copyright © 1999-2002 Standard Performance Evaluation Corporation
Hewlett-Packard Company
hp server rx7620 (1500 MHz Itanium 2)
SPECompMpeak2001 = 11828      
SPECompMbase2001 = 11098      
SPEC license # HPG2116 Tested by: Hewlett-Packard Company Test site: Richardson, Texas Test date: Oct-2003 Hardware Avail: Nov-2003 Software Avail: Oct-2003
Benchmark Reference
Time
Base
Runtime
Base
Ratio
Peak
Runtime
Peak
Ratio
Graph Scale
310.wupwise_m 6000 514    11668       484    12391       310.wupwise_m base result bar (11668)
310.wupwise_m peak result bar (12391)
312.swim_m 6000 432    13904       432    13904       312.swim_m base result bar (13904)
312.swim_m peak result bar (13904)
314.mgrid_m 7300 582    12549       582    12549       314.mgrid_m base result bar (12549)
314.mgrid_m peak result bar (12549)
316.applu_m 4000 184    21772       172    23198       316.applu_m base result bar (21772)
316.applu_m peak result bar (23198)
318.galgel_m 5100 519    9826      423    12052       318.galgel_m base result bar (9826)
318.galgel_m peak result bar (12052)
320.equake_m 2600 293    8885      262    9910      320.equake_m base result bar (8885)
320.equake_m peak result bar (9910)
324.apsi_m 3400 237    14321       237    14363       324.apsi_m base result bar (14321)
324.apsi_m peak result bar (14363)
326.gafort_m 8700 979    8887      979    8887      326.gafort_m base result bar (8887)
326.gafort_m peak result bar (8887)
328.fma3d_m 4600 670    6866      546    8420      328.fma3d_m base result bar (6866)
328.fma3d_m peak result bar (8420)
330.art_m 6400 540    11859       540    11859       330.art_m base result bar (11859)
330.art_m peak result bar (11859)
332.ammp_m 7000 893    7842      843    8301      332.ammp_m base result bar (7842)
332.ammp_m peak result bar (8301)
SPECompMbase2001 11098        
  SPECompMpeak2001 11828        

Hardware
Hardware Vendor: Hewlett-Packard Company
Model Name: hp server rx7620 (1500 MHz Itanium 2)
CPU: Intel Itanium 2
CPU MHz: 1500
FPU: Integrated
CPU(s) enabled: 8
CPU(s) orderable: 2 to 8 by 2
Primary Cache: L1 Inst/Data: 16 KB, associativity = 4
Secondary Cache: L2 Unified: 256 KB, associativity = 8
L3 Cache: L3 Unified: 6144 KB, associativity = 24
Other Cache: None
Memory: 16GB (32 * 512MB DIMMs)
Disk Subsystem: root disk 1x36 SCSI
Other Hardware: --
Software
OpenMP Threads: 8
Parallel: OpenMP
Operating System: HPUX11i-TCOE B.11.23
Compiler: HP C/ANSI C Compiler B.11.23
HP aC++ Compiler B.11.23
HP Fortran 90 Compiler B.11.23
HP LIBF90 PHSS_29620
HP F90 Compiler PHSS_29663
HP aC++ Compiler PHSS_29655
HP C Compiler PHSS_29656
u2comp/be/plugin library PHSS_29657
File System: vxfs
System State: Single-user
Notes / Tuning Information
  User environment:
     MP_IDLE_THREADS_WAIT=-1
     OMP_FIRST_USE=0
 
  Portability Flags:
    318.galgel: +source=fixed +extend_source
  
  Base:
     F90  +Ofaster +Oopenmp   
          +Oinfo +DD64 -minshared  
     cc   +Ofaster +Oopenmp +DD64 +Oinfo 
          -minshared -AOe +Onofltacc
    submit = chatr -s +id disable +pd 256k +pi 256k +mergeseg $commandexe; \
         _M_ARENA_OPTS=64:32 _M_SBA_OPTS=16348:150:256 \
         _M_CACHE_OPTS=32768:256:1024  mpsched -T FILL $command 
  
  Peak:
    310.wupwise_m:  +Ofaster +cat +O3  +Oopenmp 
      +Oinfo +DD64 -minshared -Wl,+pd256k -Wl,+pi256k
      ONESTEP = true 
      submit = chatr -s +id disable $commandexe; 
          _M_ARENA_OPTS=64:32 mpsched -T FILL $command

    312.swim_m:  basepeak=true
 
    314.mgrid_m: basepeak=true
 
    316.applu_m:  +Ofaster +Oopenmp +Oinfo
      +DD64 -minshared  +DSitanium
      ONESTEP=true
      submit = chatr -s +id disable +pd 256k +pi 256k $commandexe; 
          _M_ARENA_OPTS=64:32 
          _M_CACHE_OPTS=32768:256:1024 mpsched -T FILL $command
 
    318.galgel_m: +Ofaster +Oopenmp +Oinfo
      +DD64 -minshared +Onodataprefetch +Oloop_unroll=14
      ONESTEP = true
      submit  = chatr -s +id disable +pd 256k +pi 256k $commandexe; 
       _M_ARENA_OPTS=64:32 
       _M_CACHE_OPTS=32768:256:1024 mpsched -T FILL $command

    320.equake_m:  +Ofaster +Oopenmp  +DD64  +Oinfo
      -minshared -AOe +Onofltacc +Onoparmsoverlap  +Odataprefetch=direct
      submit  = chatr -s +id disable +pd 64k +pi 64k $commandexe; 
       _M_ARENA_OPTS=64:32  _M_CACHE_OPTS=32768:256:1024
       mpsched -T FILL $command
 
    324.apsi_m: +Ofaster   +Oopenmp +Oinfo +DD64 -minshared    
       ONESTEP = true
       submit = chatr -s +id disable +pd 256k +pi 256k 
         $commandexe;  _M_ARENA_OPTS=64:32  
         _M_CACHE_OPTS=32768:256:1024  
          mpsched -T FILL $command

    326.gafort_m: basepeak=true
 
    328.fma3d_m: +Ofaster +Oopenmp +Oinfo +DD64 
      -minshared  +Oinline_budget=75 
      ONESTEP=true
       submit = chatr -s +id disable +pd 1m +pi 1m 
         $commandexe;  _M_ARENA_OPTS=64:32  
         _M_CACHE_OPTS=32768:256:1024  
          mpsched -T FILL $command
 
    330.art_m: basepeak=true
      
    332.ammp_m: +Ofaster +Oopenmp  +DD64  +Oinfo 
      -minshared -AOe +Onofltacc
       submit = chatr -s +id enable +pd 4m +pi 4m
         $commandexe;  _M_ARENA_OPTS=64:32
         _M_CACHE_OPTS=32768:256:1024
          mpsched -T FILL $command
 
 
 Alternate Sources:  
   hpg.1 C++ compiler compatible sources
   from SPEC Web site  ompm2001-isoc-20020619.tar.gz
     used for Base 320.equake_m 330.art_m 332.ammp_m 
     used for Peak 332.ammp_m 
 
   ompl.32 OMPL 32 bit compatible sources 
   from SPEC Web site ompm2001-srcl32bit-20020822.tar.gz 
     used for Peak 310.wupwise_m 328.fma3d_m
 
  Kernel Paramters (/stand/system):
     maxdsiz         0xc0000000
     maxdsiz_64bit   0x3ffbfffffff
     maxssiz         0x17f00000
     maxssiz_64bit   0x40000000
     maxtsiz         0x40000000
     maxtsiz_64bit   0x40000000
     vps_pagesize    4096
     vps_ceiling     16384
     dbc_min_pct     20
     dbc_max_pct     20
     swapmem_on      0
 
Notes:

  System was configured with 1/2 of memory interleaved and
    1/2 of memory local to each cell

  System configured as a single partition with 2 cells and
    4 processors per cell

  Threads were assigned to cpus using the FILL strategy
    from the HP-UX mpsched utility

  Memory tuning is documented in man page malloc(3C)
    _M_ARENA_OPTS=64:32
      64 malloc arenas, 32 4k pages expansion

    _M_SBA_OPTS=16348:150:256  
      16384 maxfast size, 150 small blocks, 256 grain size

    _M_CACHE_OPTS=32768:256:1024
      32768 bucket_size: 256 buckets:1024 retirement_age




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Copyright © 1999-2002 Standard Performance Evaluation Corporation

First published at SPEC.org on 12-Nov-2003

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