SPEC CPU(R)2017 Floating Point Rate Result Cisco Systems Cisco UCS C220 M6 (Intel Xeon Gold 6348, 2.60GHz) CPU2017 License: 9019 Test date: Jul-2021 Test sponsor: Cisco Systems Hardware availability: Apr-2021 Tested by: Cisco Systems Software availability: Mar-2021 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 503.bwaves_r 112 1558 721 S 112 1560 720 S 503.bwaves_r 112 1560 720 S 112 1559 720 * 503.bwaves_r 112 1559 720 * 112 1558 721 S 507.cactuBSSN_r 112 259 548 S 112 259 548 S 507.cactuBSSN_r 112 259 546 * 112 259 546 * 507.cactuBSSN_r 112 261 544 S 112 261 544 S 508.namd_r 112 326 327 S 112 326 327 S 508.namd_r 112 325 327 * 112 325 327 * 508.namd_r 112 324 329 S 112 324 329 S 510.parest_r 112 1438 204 S 112 1434 204 * 510.parest_r 112 1431 205 S 112 1431 205 S 510.parest_r 112 1436 204 * 112 1434 204 S 511.povray_r 112 542 483 S 112 476 549 S 511.povray_r 112 542 483 * 112 475 551 * 511.povray_r 112 539 485 S 112 475 551 S 519.lbm_r 112 445 265 S 112 445 265 S 519.lbm_r 112 446 265 * 112 446 265 * 519.lbm_r 112 446 265 S 112 446 265 S 521.wrf_r 112 739 340 * 112 752 334 * 521.wrf_r 112 749 335 S 112 741 338 S 521.wrf_r 112 737 340 S 112 760 330 S 526.blender_r 112 389 438 S 112 389 438 S 526.blender_r 112 390 438 * 112 390 438 * 526.blender_r 112 390 437 S 112 390 437 S 527.cam4_r 112 449 437 S 112 449 437 S 527.cam4_r 112 449 436 * 112 449 436 * 527.cam4_r 112 449 436 S 112 449 436 S 538.imagick_r 112 247 1130 S 112 247 1130 S 538.imagick_r 112 246 1130 S 112 246 1130 S 538.imagick_r 112 247 1130 * 112 247 1130 * 544.nab_r 112 257 733 * 112 250 755 S 544.nab_r 112 255 740 S 112 252 747 S 544.nab_r 112 258 731 S 112 252 747 * 549.fotonik3d_r 112 1918 228 S 112 1918 228 S 549.fotonik3d_r 112 1921 227 * 112 1921 227 * 549.fotonik3d_r 112 1922 227 S 112 1922 227 S 554.roms_r 112 1137 157 S 112 1137 157 * 554.roms_r 112 1138 156 * 112 1136 157 S 554.roms_r 112 1141 156 S 112 1139 156 S ================================================================================= 503.bwaves_r 112 1559 720 * 112 1559 720 * 507.cactuBSSN_r 112 259 546 * 112 259 546 * 508.namd_r 112 325 327 * 112 325 327 * 510.parest_r 112 1436 204 * 112 1434 204 * 511.povray_r 112 542 483 * 112 475 551 * 519.lbm_r 112 446 265 * 112 446 265 * 521.wrf_r 112 739 340 * 112 752 334 * 526.blender_r 112 390 438 * 112 390 438 * 527.cam4_r 112 449 436 * 112 449 436 * 538.imagick_r 112 247 1130 * 112 247 1130 * 544.nab_r 112 257 733 * 112 252 747 * 549.fotonik3d_r 112 1921 227 * 112 1921 227 * 554.roms_r 112 1138 156 * 112 1137 157 * SPECrate(R)2017_fp_base 399 SPECrate(R)2017_fp_peak 403 HARDWARE -------- CPU Name: Intel Xeon Gold 6348 Max MHz: 3500 Nominal: 2600 Enabled: 56 cores, 2 chips, 2 threads/core Orderable: 1,2 Chips Cache L1: 32 KB I + 48 KB D on chip per core L2: 1.25 MB I+D on chip per core L3: 42 MB I+D on chip per chip Other: None Memory: 1 TB (32 x 32 GB 2Rx4 PC4-3200V-R) Storage: 1 x 300 GB 15K SAS HDD Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 15 SP2 5.3.18-22-default Compiler: C/C++: Version 2021.1 of Intel oneAPI DPC++/C++ Compiler Build 20201113 for Linux; Fortran: Version 2021.1 of Intel Fortran Compiler Classic Build 20201112 for Linux; C/C++: Version 2021.1 of Intel C/C++ Compiler Classic Build 20201112 for Linux Parallel: No Firmware: Version 4.2.1c released Jul-2021 File System: btrfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 64-bit Other: jemalloc memory allocator V5.0.1 Power Management: BIOS and OS set to prefer performance at the cost of additional power usage Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-64" MALLOC_CONF = "retain:true" General Notes ------------- Binaries compiled on a system with 1x Intel Core i9-7940X CPU + 64GB RAM memory using openSUSE Leap 15.2 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS Settings: Adjacent Cache Line Prefetcher set to Disabled DCU Streamer Prefetch set to Disabled UPI Link Enablement set to 1 UPI Power Management set to Enabled Sub NUMA Clustering set to Enabled LLC Dead Line set to Disabled Memory Refresh Rate set to 1x Refresh ADDDC Sparing set to Disabled Patrol Scrub set to Disabled Enhanced CPU performance set to Auto Energy Efficient Turbo set to Enabled Processor C6 Report set to Enabled Processor C1E set to Enabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r6622 of 2021-04-07 982a61ec0915b55891ef0e16acafc64d running on localhost Sat Jul 17 15:00:12 2021 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6348 CPU @ 2.60GHz 2 "physical id"s (chips) 112 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 28 siblings : 56 physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 From lscpu from util-linux 2.33.1: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian Address sizes: 46 bits physical, 57 bits virtual CPU(s): 112 On-line CPU(s) list: 0-111 Thread(s) per core: 2 Core(s) per socket: 28 Socket(s): 2 NUMA node(s): 4 Vendor ID: GenuineIntel CPU family: 6 Model: 106 Model name: Intel(R) Xeon(R) Gold 6348 CPU @ 2.60GHz Stepping: 6 CPU MHz: 932.451 CPU max MHz: 3500.0000 CPU min MHz: 800.0000 BogoMIPS: 5200.00 Virtualization: VT-x L1d cache: 48K L1i cache: 32K L2 cache: 1280K L3 cache: 43008K NUMA node0 CPU(s): 0-13,56-69 NUMA node1 CPU(s): 14-27,70-83 NUMA node2 CPU(s): 28-41,84-97 NUMA node3 CPU(s): 42-55,98-111 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 invpcid_single ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a avx512f avx512dq rdseed adx smap avx512ifma clflushopt clwb intel_pt avx512cd sha_ni avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local wbnoinvd dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req avx512vbmi umip pku ospke avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg tme avx512_vpopcntdq la57 rdpid md_clear pconfig flush_l1d arch_capabilities /proc/cpuinfo cache data cache size : 43008 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 4 nodes (0-3) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 56 57 58 59 60 61 62 63 64 65 66 67 68 69 node 0 size: 257634 MB node 0 free: 242942 MB node 1 cpus: 14 15 16 17 18 19 20 21 22 23 24 25 26 27 70 71 72 73 74 75 76 77 78 79 80 81 82 83 node 1 size: 258007 MB node 1 free: 246341 MB node 2 cpus: 28 29 30 31 32 33 34 35 36 37 38 39 40 41 84 85 86 87 88 89 90 91 92 93 94 95 96 97 node 2 size: 258041 MB node 2 free: 246263 MB node 3 cpus: 42 43 44 45 46 47 48 49 50 51 52 53 54 55 98 99 100 101 102 103 104 105 106 107 108 109 110 111 node 3 size: 258037 MB node 3 free: 246665 MB node distances: node 0 1 2 3 0: 10 11 20 20 1: 11 10 20 20 2: 20 20 10 11 3: 20 20 11 10 From /proc/meminfo MemTotal: 1056482508 kB HugePages_Total: 0 Hugepagesize: 2048 kB /sys/devices/system/cpu/cpu*/cpufreq/scaling_governor has performance From /etc/*release* /etc/*version* os-release: NAME="SLES" VERSION="15-SP2" VERSION_ID="15.2" PRETTY_NAME="SUSE Linux Enterprise Server 15 SP2" ID="sles" ID_LIKE="suse" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:15:sp2" uname -a: Linux localhost 5.3.18-22-default #1 SMP Wed Jun 3 12:16:43 UTC 2020 (720aeba) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-12207 (iTLB Multihit): Not affected CVE-2018-3620 (L1 Terminal Fault): Not affected Microarchitectural Data Sampling: Not affected CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: usercopy/swapgs barriers and __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Enhanced IBRS, IBPB: conditional, RSB filling CVE-2020-0543 (Special Register Buffer Data Sampling): Not affected CVE-2019-11135 (TSX Asynchronous Abort): Not affected run-level 3 Jul 17 07:56 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda2 btrfs 222G 75G 146G 35% /home From /sys/devices/virtual/dmi/id Vendor: Cisco Systems Inc Product: UCSC-C220-M6S Serial: WZP24430ADF Additional information from dmidecode 3.2 follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 32x 0xCE00 M393A4K40DB3-CWE 32 GB 2 rank 3200 BIOS: BIOS Vendor: Cisco Systems, Inc. BIOS Version: C220M6.4.2.1c.1.0701210708 BIOS Date: 07/01/2021 BIOS Revision: 5.22 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 519.lbm_r(base, peak) 538.imagick_r(base, peak) | 544.nab_r(base, peak) ------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2021.1 Build 20201113 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 508.namd_r(base, peak) 510.parest_r(base, peak) ------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2021.1 Build 20201113 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C | 511.povray_r(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C | 511.povray_r(base) 526.blender_r(base, peak) ------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2021.1 Build 20201113 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2021.1 Build 20201113 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C | 511.povray_r(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C | 511.povray_r(base) 526.blender_r(base, peak) ------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2021.1 Build 20201113 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2021.1 Build 20201113 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C, Fortran | 507.cactuBSSN_r(base, peak) ------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2021.1 Build 20201113 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2021.1 Build 20201113 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 503.bwaves_r(base, peak) 549.fotonik3d_r(base, peak) | 554.roms_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 521.wrf_r(peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 521.wrf_r(base) 527.cam4_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2021.1 Build 20201113 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 521.wrf_r(peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 521.wrf_r(base) 527.cam4_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2021.1 Build 20201113 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icx C++ benchmarks: icpx Fortran benchmarks: ifort Benchmarks using both Fortran and C: ifort icx Benchmarks using both C and C++: icpx icx Benchmarks using Fortran, C, and C++: icpx icx ifort Base Portability Flags ---------------------- 503.bwaves_r: -DSPEC_LP64 507.cactuBSSN_r: -DSPEC_LP64 508.namd_r: -DSPEC_LP64 510.parest_r: -DSPEC_LP64 511.povray_r: -DSPEC_LP64 519.lbm_r: -DSPEC_LP64 521.wrf_r: -DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian 526.blender_r: -DSPEC_LP64 -DSPEC_LINUX -funsigned-char 527.cam4_r: -DSPEC_LP64 -DSPEC_CASE_FLAG 538.imagick_r: -DSPEC_LP64 544.nab_r: -DSPEC_LP64 549.fotonik3d_r: -DSPEC_LP64 554.roms_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -w -std=c11 -m64 -Wl,-z,muldefs -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -mbranches-within-32B-boundaries -ljemalloc -L/usr/local/jemalloc64-5.0.1/lib C++ benchmarks: -w -m64 -Wl,-z,muldefs -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -mbranches-within-32B-boundaries -ljemalloc -L/usr/local/jemalloc64-5.0.1/lib Fortran benchmarks: -w -m64 -Wl,-z,muldefs -xCORE-AVX512 -O3 -ipo -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -auto -mbranches-within-32B-boundaries -ljemalloc -L/usr/local/jemalloc64-5.0.1/lib Benchmarks using both Fortran and C: -w -m64 -std=c11 -Wl,-z,muldefs -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -O3 -ipo -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -mbranches-within-32B-boundaries -nostandard-realloc-lhs -align array32byte -auto -ljemalloc -L/usr/local/jemalloc64-5.0.1/lib Benchmarks using both C and C++: -w -m64 -std=c11 -Wl,-z,muldefs -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -mbranches-within-32B-boundaries -ljemalloc -L/usr/local/jemalloc64-5.0.1/lib Benchmarks using Fortran, C, and C++: -w -m64 -std=c11 -Wl,-z,muldefs -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -mbranches-within-32B-boundaries -nostandard-realloc-lhs -align array32byte -auto -ljemalloc -L/usr/local/jemalloc64-5.0.1/lib Peak Compiler Invocation ------------------------ C benchmarks: icx C++ benchmarks: icpx Fortran benchmarks: ifort Benchmarks using both Fortran and C: 521.wrf_r: ifort icc 527.cam4_r: ifort icx Benchmarks using both C and C++: 511.povray_r: icpc icc 526.blender_r: icpx icx Benchmarks using Fortran, C, and C++: icpx icx ifort Peak Portability Flags ---------------------- Same as Base Portability Flags Peak Optimization Flags ----------------------- C benchmarks: 519.lbm_r: basepeak = yes 538.imagick_r: basepeak = yes 544.nab_r: -w -std=c11 -m64 -Wl,-z,muldefs -xCORE-AVX512 -flto -Ofast -qopt-mem-layout-trans=4 -fimf-accuracy-bits=14:sqrt -mbranches-within-32B-boundaries -ljemalloc -L/usr/local/jemalloc64-5.0.1/lib C++ benchmarks: 508.namd_r: basepeak = yes 510.parest_r: -w -m64 -Wl,-z,muldefs -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -mbranches-within-32B-boundaries -ljemalloc -L/usr/local/jemalloc64-5.0.1/lib Fortran benchmarks: 503.bwaves_r: -w -m64 -Wl,-z,muldefs -xCORE-AVX512 -O3 -ipo -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -auto -mbranches-within-32B-boundaries -ljemalloc -L/usr/local/jemalloc64-5.0.1/lib 549.fotonik3d_r: basepeak = yes 554.roms_r: Same as 503.bwaves_r Benchmarks using both Fortran and C: 521.wrf_r: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512 -O3 -ipo -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -qopt-mem-layout-trans=4 -mbranches-within-32B-boundaries -nostandard-realloc-lhs -align array32byte -auto -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc 527.cam4_r: basepeak = yes Benchmarks using both C and C++: 511.povray_r: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512 -O3 -ipo -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -qopt-mem-layout-trans=4 -mbranches-within-32B-boundaries -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc 526.blender_r: basepeak = yes Benchmarks using Fortran, C, and C++: 507.cactuBSSN_r: basepeak = yes The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.0-ICX-revF.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.0-ICX-revF.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2021 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.8 on 2021-07-17 15:00:12-0400. Report generated on 2021-08-04 18:21:08 by CPU2017 text formatter v6255. Originally published on 2021-08-04.