SPEC CPU(R)2017 Integer Rate Result Cisco Systems Cisco UCS B480 M5 (Intel Xeon Gold 5218, 2.30GHz) CPU2017 License: 9019 Test date: Jan-2020 Test sponsor: Cisco Systems Hardware availability: Apr-2019 Tested by: Cisco Systems Software availability: May-2019 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 128 713 286 * 128 622 327 * 500.perlbench_r 128 719 283 S 128 622 327 S 500.perlbench_r 128 713 286 S 128 622 327 S 502.gcc_r 128 607 299 S 128 524 346 S 502.gcc_r 128 608 298 * 128 526 344 * 502.gcc_r 128 619 293 S 128 526 344 S 505.mcf_r 128 411 503 S 128 412 502 * 505.mcf_r 128 412 503 * 128 411 503 S 505.mcf_r 128 413 501 S 128 412 502 S 520.omnetpp_r 128 661 254 S 128 660 254 * 520.omnetpp_r 128 661 254 S 128 661 254 S 520.omnetpp_r 128 661 254 * 128 659 255 S 523.xalancbmk_r 128 315 429 S 128 292 462 S 523.xalancbmk_r 128 316 428 S 128 292 462 * 523.xalancbmk_r 128 315 428 * 128 292 462 S 525.x264_r 128 329 681 * 128 318 705 * 525.x264_r 128 331 676 S 128 318 705 S 525.x264_r 128 326 687 S 128 317 706 S 531.deepsjeng_r 128 482 304 S 128 482 305 S 531.deepsjeng_r 128 482 304 S 128 482 304 * 531.deepsjeng_r 128 482 304 * 128 482 304 S 541.leela_r 128 743 285 S 128 750 283 * 541.leela_r 128 749 283 S 128 759 279 S 541.leela_r 128 747 284 * 128 749 283 S 548.exchange2_r 128 457 733 * 128 455 736 * 548.exchange2_r 128 455 737 S 128 457 733 S 548.exchange2_r 128 457 733 S 128 455 737 S 557.xz_r 128 561 247 S 128 560 247 * 557.xz_r 128 560 247 * 128 560 247 S 557.xz_r 128 560 247 S 128 561 247 S ================================================================================= 500.perlbench_r 128 713 286 * 128 622 327 * 502.gcc_r 128 608 298 * 128 526 344 * 505.mcf_r 128 412 503 * 128 412 502 * 520.omnetpp_r 128 661 254 * 128 660 254 * 523.xalancbmk_r 128 315 428 * 128 292 462 * 525.x264_r 128 329 681 * 128 318 705 * 531.deepsjeng_r 128 482 304 * 128 482 304 * 541.leela_r 128 747 284 * 128 750 283 * 548.exchange2_r 128 457 733 * 128 455 736 * 557.xz_r 128 560 247 * 128 560 247 * SPECrate(R)2017_int_base 371 SPECrate(R)2017_int_peak 386 HARDWARE -------- CPU Name: Intel Xeon Gold 5218 Max MHz: 3900 Nominal: 2300 Enabled: 64 cores, 4 chips, 2 threads/core Orderable: 2,4 Chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 22 MB I+D on chip per chip Other: None Memory: 1536 GB (48 x 32 GB 2Rx4 PC4-2933V-R, running at 2666) Storage: 1 x 1.9 TB SSD SAS Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 15 (x86_64) 4.12.14-23-default Compiler: C/C++: Version 19.0.4.227 of Intel C/C++ Compiler for Linux; Fortran: Version 19.0.4.227 of Intel Fortran Compiler for Linux Parallel: No Firmware: Version 4.0.4b released Apr-2019 File System: btrfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc memory allocator V5.0.1 Power Management: BIOS set to prefer performance at the cost of additional power usage Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64:/home/cpu2017/lib/ia32:/home/cpu2017/je5.0.1- 32" General Notes ------------- Binaries compiled on a system with 1x Intel Core i9-7900X CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS Settings: Intel HyperThreading Technology set to Enabled SNC set to Enabled IMC Interleaving set to 1-way Interleave Patrol Scrub set to Disabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r6365 of 2019-08-21 295195f888a3d7edb1e6e46a485a0011 running on linux-icbf Fri Jan 17 22:23:56 2020 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 5218 CPU @ 2.30GHz 4 "physical id"s (chips) 128 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 16 siblings : 32 physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 2: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 3: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 128 On-line CPU(s) list: 0-127 Thread(s) per core: 2 Core(s) per socket: 16 Socket(s): 4 NUMA node(s): 8 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 5218 CPU @ 2.30GHz Stepping: 6 CPU MHz: 2300.000 CPU max MHz: 3900.0000 CPU min MHz: 1000.0000 BogoMIPS: 4600.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 22528K NUMA node0 CPU(s): 0-3,8-11,64-67,72-75 NUMA node1 CPU(s): 4-7,12-15,68-71,76-79 NUMA node2 CPU(s): 16-19,24-27,80-83,88-91 NUMA node3 CPU(s): 20-23,28-31,84-87,92-95 NUMA node4 CPU(s): 32-35,40-43,96-99,104-107 NUMA node5 CPU(s): 36-39,44-47,100-103,108-111 NUMA node6 CPU(s): 48-51,56-59,112-115,120-123 NUMA node7 CPU(s): 52-55,60-63,116-119,124-127 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single intel_ppin mba tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local ibpb ibrs stibp dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req pku ospke avx512_vnni arch_capabilities ssbd /proc/cpuinfo cache data cache size : 22528 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 8 nodes (0-7) node 0 cpus: 0 1 2 3 8 9 10 11 64 65 66 67 72 73 74 75 node 0 size: 192096 MB node 0 free: 191907 MB node 1 cpus: 4 5 6 7 12 13 14 15 68 69 70 71 76 77 78 79 node 1 size: 193527 MB node 1 free: 193320 MB node 2 cpus: 16 17 18 19 24 25 26 27 80 81 82 83 88 89 90 91 node 2 size: 193527 MB node 2 free: 193377 MB node 3 cpus: 20 21 22 23 28 29 30 31 84 85 86 87 92 93 94 95 node 3 size: 193527 MB node 3 free: 193391 MB node 4 cpus: 32 33 34 35 40 41 42 43 96 97 98 99 104 105 106 107 node 4 size: 193527 MB node 4 free: 193366 MB node 5 cpus: 36 37 38 39 44 45 46 47 100 101 102 103 108 109 110 111 node 5 size: 193527 MB node 5 free: 193388 MB node 6 cpus: 48 49 50 51 56 57 58 59 112 113 114 115 120 121 122 123 node 6 size: 193498 MB node 6 free: 193327 MB node 7 cpus: 52 53 54 55 60 61 62 63 116 117 118 119 124 125 126 127 node 7 size: 193525 MB node 7 free: 193383 MB node distances: node 0 1 2 3 4 5 6 7 0: 10 11 21 21 31 31 21 21 1: 11 10 21 21 31 31 21 21 2: 21 21 10 11 21 21 31 31 3: 21 21 11 10 21 21 31 31 4: 31 31 21 21 10 11 21 21 5: 31 31 21 21 11 10 21 21 6: 21 21 31 31 21 21 10 11 7: 21 21 31 31 21 21 11 10 From /proc/meminfo MemTotal: 1583880700 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* os-release: NAME="SLES" VERSION="15" VERSION_ID="15" PRETTY_NAME="SUSE Linux Enterprise Server 15" ID="sles" ID_LIKE="suse" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:15" uname -a: Linux linux-icbf 4.12.14-23-default #1 SMP Tue May 29 21:04:44 UTC 2018 (cd0437b) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-3620 (L1 Terminal Fault): No status reported Microarchitectural Data Sampling: No status reported CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Indirect Branch Restricted Speculation, IBPB, IBRS_FW run-level 3 Jan 17 22:19 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sdb2 btrfs 222G 8.6G 213G 4% /home From /sys/devices/virtual/dmi/id BIOS: Cisco Systems, Inc. B480M5.4.0.4b.0.0407190454 04/07/2019 Vendor: Cisco Systems Inc Product: UCSB-B480-M5 Serial: FLM230102QU Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 48x 0xCE00 M393A4K40CB2-CVF 32 GB 2 rank 2933, configured at 2666 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 502.gcc_r(peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) | 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 502.gcc_r(peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) | 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 523.xalancbmk_r(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base) | 531.deepsjeng_r(base, peak) 541.leela_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 523.xalancbmk_r(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base) | 531.deepsjeng_r(base, peak) 541.leela_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 548.exchange2_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 -std=c11 502.gcc_r: icc -m32 -std=c11 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/ia32_lin C++ benchmarks (except as noted below): icpc -m64 523.xalancbmk_r: icpc -m32 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/ia32_lin Fortran benchmarks: ifort -m64 Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=4 -fno-strict-overflow -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc 502.gcc_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/je5.0.1-32/lib -ljemalloc 505.mcf_r: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc 525.x264_r: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -fno-alias -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc 557.xz_r: Same as 505.mcf_r C++ benchmarks: 520.omnetpp_r: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc 523.xalancbmk_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/je5.0.1-32/lib -ljemalloc 531.deepsjeng_r: Same as 520.omnetpp_r 541.leela_r: Same as 520.omnetpp_r Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revJ.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revJ.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2020 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.0 on 2020-01-18 01:23:55-0500. Report generated on 2020-02-18 18:04:20 by CPU2017 text formatter v6255. Originally published on 2020-02-18.