SPEC CPU(R)2017 Integer Speed Result Dell Inc. PowerEdge R440 (Intel Xeon Silver 4216, 2.10 GHz) CPU2017 License: 55 Test date: Oct-2019 Test sponsor: Dell Inc. Hardware availability: Aug-2019 Tested by: Dell Inc. Software availability: Jun-2019 Base Base Base Peak Peak Peak Benchmarks Threads Run Time Ratio Threads Run Time Ratio --------------- ------- --------- --------- ------- --------- --------- 600.perlbench_s 32 313 5.67 S 32 266 6.68 * 600.perlbench_s 32 312 5.69 * 32 266 6.68 S 600.perlbench_s 32 311 5.71 S 32 266 6.66 S 602.gcc_s 32 460 8.66 S 32 452 8.81 * 602.gcc_s 32 472 8.43 S 32 444 8.97 S 602.gcc_s 32 469 8.48 * 32 454 8.76 S 605.mcf_s 32 434 10.9 S 32 434 10.9 S 605.mcf_s 32 431 10.9 * 32 431 10.9 * 605.mcf_s 32 431 10.9 S 32 431 10.9 S 620.omnetpp_s 32 244 6.67 S 32 243 6.72 S 620.omnetpp_s 32 245 6.66 S 32 243 6.72 * 620.omnetpp_s 32 244 6.67 * 32 242 6.75 S 623.xalancbmk_s 32 137 10.3 * 32 137 10.4 * 623.xalancbmk_s 32 137 10.3 S 32 136 10.4 S 623.xalancbmk_s 32 137 10.3 S 32 137 10.4 S 625.x264_s 32 152 11.6 S 32 152 11.6 S 625.x264_s 32 152 11.6 * 32 152 11.6 * 625.x264_s 32 152 11.6 S 32 152 11.6 S 631.deepsjeng_s 32 309 4.63 * 32 308 4.65 * 631.deepsjeng_s 32 309 4.63 S 32 309 4.64 S 631.deepsjeng_s 32 309 4.64 S 32 308 4.65 S 641.leela_s 32 435 3.92 S 32 435 3.92 S 641.leela_s 32 435 3.92 * 32 435 3.92 * 641.leela_s 32 435 3.92 S 32 435 3.92 S 648.exchange2_s 32 215 13.7 S 32 215 13.7 S 648.exchange2_s 32 215 13.7 * 32 215 13.7 * 648.exchange2_s 32 215 13.7 S 32 215 13.7 S 657.xz_s 32 316 19.6 S 32 313 19.8 * 657.xz_s 32 316 19.5 * 32 313 19.8 S 657.xz_s 32 317 19.5 S 32 314 19.7 S ================================================================================= 600.perlbench_s 32 312 5.69 * 32 266 6.68 * 602.gcc_s 32 469 8.48 * 32 452 8.81 * 605.mcf_s 32 431 10.9 * 32 431 10.9 * 620.omnetpp_s 32 244 6.67 * 32 243 6.72 * 623.xalancbmk_s 32 137 10.3 * 32 137 10.4 * 625.x264_s 32 152 11.6 * 32 152 11.6 * 631.deepsjeng_s 32 309 4.63 * 32 308 4.65 * 641.leela_s 32 435 3.92 * 32 435 3.92 * 648.exchange2_s 32 215 13.7 * 32 215 13.7 * 657.xz_s 32 316 19.5 * 32 313 19.8 * SPECspeed(R)2017_int_base 8.54 SPECspeed(R)2017_int_peak 8.73 HARDWARE -------- CPU Name: Intel Xeon Silver 4216 Max MHz: 3200 Nominal: 2100 Enabled: 32 cores, 2 chips Orderable: 1,2 chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 22 MB I+D on chip per chip Other: None Memory: 384 GB (12 x 32 GB 2Rx4 PC4-2666V-R, running at 2400) Storage: 1 x 960 GB SATA SSD Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 15 SP1 kernel 4.12.14-195-default Compiler: C/C++: Version 19.0.4.227 of Intel C/C++ Compiler Build 20190416 for Linux; Fortran: Version 19.0.4.227 of Intel Fortran Compiler Build 20190416 for Linux Parallel: Yes Firmware: Version 2.3.10 released Aug-2019 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 64-bit Other: jemalloc memory allocator V5.0.1 Power Management: None Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: KMP_AFFINITY = "granularity=fine,scatter" LD_LIBRARY_PATH = "/mnt/ramdisk/cpu2017/lib/intel64:/mnt/ramdisk/cpu2017/je5.0.1-64" OMP_STACKSIZE = "192M" General Notes ------------- Binaries compiled on a system with 1x Intel Core i9-799X CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. Benchmark run from a 120 GB ramdisk created with the cmd: "mount -t tmpfs -o size=120G tmpfs /mnt/ramdisk". Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS settings: ADDDC setting disabled Sub NUMA Cluster disabled Virtualization Technology disabled DCU Streamer Prefetcher disabled System Profile set to Custom CPU Performance set to Maximum Performance C States set to Autonomous C1E disabled Uncore Frequency set to Dynamic Energy Efficiency Policy set to Performance Memory Patrol Scrub disabled Logical Processor disabled CPU Interconnect Bus Link Power Management enabled PCI ASPM L1 Link Power Management enabled Sysinfo program /mnt/ramdisk/cpu2017/bin/sysinfo Rev: r6365 of 2019-08-21 295195f888a3d7edb1e6e46a485a0011 running on linux-g3ob Fri Oct 25 06:10:31 2019 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Silver 4216 CPU @ 2.10GHz 2 "physical id"s (chips) 32 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 16 siblings : 16 physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian Address sizes: 46 bits physical, 48 bits virtual CPU(s): 32 On-line CPU(s) list: 0-31 Thread(s) per core: 1 Core(s) per socket: 16 Socket(s): 2 NUMA node(s): 2 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Silver 4216 CPU @ 2.10GHz Stepping: 6 CPU MHz: 2100.000 BogoMIPS: 4200.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 22528K NUMA node0 CPU(s): 0,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30 NUMA node1 CPU(s): 1,3,5,7,9,11,13,15,17,19,21,23,25,27,29,31 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single intel_ppin ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts pku ospke avx512_vnni md_clear flush_l1d arch_capabilities /proc/cpuinfo cache data cache size : 22528 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 2 nodes (0-1) node 0 cpus: 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 node 0 size: 191885 MB node 0 free: 185992 MB node 1 cpus: 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 node 1 size: 193532 MB node 1 free: 189903 MB node distances: node 0 1 0: 10 21 1: 21 10 From /proc/meminfo MemTotal: 394667836 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* os-release: NAME="SLES" VERSION="15-SP1" VERSION_ID="15.1" PRETTY_NAME="SUSE Linux Enterprise Server 15 SP1" ID="sles" ID_LIKE="suse" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:15:sp1" uname -a: Linux linux-g3ob 4.12.14-195-default #1 SMP Tue May 7 10:55:11 UTC 2019 (8fba516) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-3620 (L1 Terminal Fault): Not affected Microarchitectural Data Sampling: Not affected CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Enhanced IBRS, IBPB: conditional, RSB filling run-level 3 Oct 25 05:52 last=5 SPEC is set to: /mnt/ramdisk/cpu2017 Filesystem Type Size Used Avail Use% Mounted on tmpfs tmpfs 120G 4.5G 116G 4% /mnt/ramdisk From /sys/devices/virtual/dmi/id BIOS: Dell Inc. 2.3.10 08/15/2019 Vendor: Dell Inc. Product: PowerEdge R440 Product Family: PowerEdge Serial: B5XZZL2 Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 12x 00AD00B300AD HMA84GR7AFR4N-VK 32 GB 2 rank 2666 4x Not Specified Not Specified (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 600.perlbench_s(base, peak) 602.gcc_s(base, peak) 605.mcf_s(base, | peak) 625.x264_s(base, peak) 657.xz_s(base, peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 620.omnetpp_s(base, peak) 623.xalancbmk_s(base, peak) | 631.deepsjeng_s(base, peak) 641.leela_s(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 648.exchange2_s(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 600.perlbench_s: -DSPEC_LP64 -DSPEC_LINUX_X64 602.gcc_s: -DSPEC_LP64 605.mcf_s: -DSPEC_LP64 620.omnetpp_s: -DSPEC_LP64 623.xalancbmk_s: -DSPEC_LP64 -DSPEC_LINUX 625.x264_s: -DSPEC_LP64 631.deepsjeng_s: -DSPEC_LP64 641.leela_s: -DSPEC_LP64 648.exchange2_s: -DSPEC_LP64 657.xz_s: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc Fortran benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -nostandard-realloc-lhs Peak Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Peak Portability Flags ---------------------- Same as Base Portability Flags Peak Optimization Flags ----------------------- C benchmarks: 600.perlbench_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -O2 -xCORE-AVX512 -qopt-mem-layout-trans=4 -ipo -O3 -no-prec-div -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -fno-strict-overflow -L/usr/local/je5.0.1-64/lib -ljemalloc 602.gcc_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -O2 -xCORE-AVX512 -qopt-mem-layout-trans=4 -ipo -O3 -no-prec-div -DSPEC_SUPPRESS_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc 605.mcf_s: basepeak = yes 625.x264_s: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc 657.xz_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -O2 -xCORE-AVX512 -qopt-mem-layout-trans=4 -ipo -O3 -no-prec-div -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: 620.omnetpp_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=4 -DSPEC_SUPPRESS_OPENMP -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc 623.xalancbmk_s: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc 631.deepsjeng_s: Same as 623.xalancbmk_s 641.leela_s: basepeak = yes Fortran benchmarks: 648.exchange2_s: basepeak = yes The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.html http://www.spec.org/cpu2017/flags/Dell-Platform-Flags-PowerEdge-revE5.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.xml http://www.spec.org/cpu2017/flags/Dell-Platform-Flags-PowerEdge-revE5.xml SPEC CPU and SPECspeed are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2019 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.0 on 2019-10-25 07:10:30-0400. Report generated on 2019-11-12 14:57:07 by CPU2017 text formatter v6255. Originally published on 2019-11-12.