SPEC(R) CPU2017 Integer Rate Result Cisco Systems Cisco UCS C220 M5 (Intel Xeon Gold 5115 2.40 GHz) CPU2017 License: 9019 Test date: Jan-2019 Test sponsor: Cisco Systems Hardware availability: Aug-2017 Tested by: Cisco Systems Software availability: Nov-2018 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 40 777 81.9 S 40 651 97.9 * 500.perlbench_r 40 776 82.1 * 40 649 98.2 S 500.perlbench_r 40 773 82.4 S 40 652 97.7 S 502.gcc_r 40 635 89.2 * 40 537 105 S 502.gcc_r 40 636 89.1 S 40 536 106 * 502.gcc_r 40 635 89.2 S 40 536 106 S 505.mcf_r 40 494 131 * 40 496 130 S 505.mcf_r 40 493 131 S 40 502 129 * 505.mcf_r 40 504 128 S 40 503 129 S 520.omnetpp_r 40 798 65.8 * 40 797 65.8 S 520.omnetpp_r 40 796 65.9 S 40 801 65.5 S 520.omnetpp_r 40 798 65.8 S 40 798 65.8 * 523.xalancbmk_r 40 404 105 * 40 331 128 S 523.xalancbmk_r 40 404 105 S 40 331 127 S 523.xalancbmk_r 40 408 104 S 40 331 128 * 525.x264_r 40 339 207 S 40 326 215 S 525.x264_r 40 339 207 S 40 324 216 S 525.x264_r 40 339 207 * 40 325 216 * 531.deepsjeng_r 40 487 94.2 * 40 491 93.4 S 531.deepsjeng_r 40 487 94.1 S 40 492 93.2 S 531.deepsjeng_r 40 486 94.3 S 40 491 93.3 * 541.leela_r 40 770 86.0 S 40 748 88.5 S 541.leela_r 40 744 89.1 S 40 780 84.9 S 541.leela_r 40 761 87.1 * 40 757 87.5 * 548.exchange2_r 40 528 199 * 40 528 199 * 548.exchange2_r 40 528 198 S 40 529 198 S 548.exchange2_r 40 528 199 S 40 528 199 S 557.xz_r 40 574 75.2 * 40 574 75.3 S 557.xz_r 40 574 75.3 S 40 574 75.3 * 557.xz_r 40 575 75.2 S 40 573 75.3 S ================================================================================= 500.perlbench_r 40 776 82.1 * 40 651 97.9 * 502.gcc_r 40 635 89.2 * 40 536 106 * 505.mcf_r 40 494 131 * 40 502 129 * 520.omnetpp_r 40 798 65.8 * 40 798 65.8 * 523.xalancbmk_r 40 404 105 * 40 331 128 * 525.x264_r 40 339 207 * 40 325 216 * 531.deepsjeng_r 40 487 94.2 * 40 491 93.3 * 541.leela_r 40 761 87.1 * 40 757 87.5 * 548.exchange2_r 40 528 199 * 40 528 199 * 557.xz_r 40 574 75.2 * 40 574 75.3 * SPECrate2017_int_base 105 SPECrate2017_int_peak 111 HARDWARE -------- CPU Name: Intel Xeon Gold 5115 Max MHz.: 3200 Nominal: 2400 Enabled: 20 cores, 2 chips, 2 threads/core Orderable: 1,2 Chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 13.75 MB I+D on chip per chip Other: None Memory: 768 GB (24 x 32 GB 2Rx4 PC4-2666V-R, running at 2400) Storage: 1 x 240 GB M.2 SATA SSD Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP3 (x86_64) 4.4.120-94.17-default Compiler: C/C++: Version 19.0.1.144 of Intel C/C++ Compiler for Linux; Fortran: Version 19.0.1.144 of Intel Fortran Compiler for Linux Parallel: No Firmware: Version 4.0.1 released Oct-2018 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc memory allocator V5.0.1 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-32:/home/cpu2017/je5.0.1-64" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.4 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS Settings: Intel HyperThreading Technology set to Enabled CPU performance set to Enterprise Power Performance Tuning set to OS Controls SNC set to Enabled IMC Interleaving set to 1-way Interleave Patrol Scrub set to Disabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9 running on linux-4dlf Thu Jan 24 19:21:11 2019 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 5115 CPU @ 2.40GHz 2 "physical id"s (chips) 40 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 10 siblings : 20 physical 0: cores 0 1 2 3 4 8 9 10 11 12 physical 1: cores 0 1 2 3 4 8 9 10 11 12 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 40 On-line CPU(s) list: 0-39 Thread(s) per core: 2 Core(s) per socket: 10 Socket(s): 2 NUMA node(s): 2 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 5115 CPU @ 2.40GHz Stepping: 4 CPU MHz: 1553.860 CPU max MHz: 3200.0000 CPU min MHz: 1000.0000 BogoMIPS: 4788.75 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 14080K NUMA node0 CPU(s): 0-9,20-29 NUMA node1 CPU(s): 10-19,30-39 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb invpcid_single pln pts dtherm hwp hwp_act_window hwp_epp hwp_pkg_req intel_pt rsb_ctxsw spec_ctrl stibp retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc pku ospke /proc/cpuinfo cache data cache size : 14080 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 2 nodes (0-1) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 20 21 22 23 24 25 26 27 28 29 node 0 size: 385631 MB node 0 free: 382410 MB node 1 cpus: 10 11 12 13 14 15 16 17 18 19 30 31 32 33 34 35 36 37 38 39 node 1 size: 387060 MB node 1 free: 383848 MB node distances: node 0 1 0: 10 21 1: 21 10 From /proc/meminfo MemTotal: 791236488 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 3 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP3" VERSION_ID="12.3" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP3" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp3" uname -a: Linux linux-4dlf 4.4.120-94.17-default #1 SMP Wed Mar 14 17:23:00 UTC 2018 (cf3a7bb) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2017-5754 (Meltdown): Mitigation: PTI CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: IBRS+IBPB run-level 3 Jan 24 10:52 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sdb2 xfs 220G 36G 185G 17% / Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. C220M5.4.0.1.139.1003182107 10/03/2018 Memory: 7x 0xCE00 M393A4K40BB2-CTD 32 GB 2 rank 2666, configured at 2400 17x 0xCE00 M393A4K40CB2-CTD 32 GB 2 rank 2666, configured at 2400 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== CC 500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base, peak) 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ icc (ICC) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CC 500.perlbench_r(peak) 502.gcc_r(peak) ------------------------------------------------------------------------------ icc (ICC) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base) 541.leela_r(base) ------------------------------------------------------------------------------ icpc (ICC) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(peak) 523.xalancbmk_r(peak) 531.deepsjeng_r(peak) 541.leela_r(peak) ------------------------------------------------------------------------------ icpc (ICC) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(base, peak) ------------------------------------------------------------------------------ ifort (IFORT) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-64/ -ljemalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-64/ -ljemalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/home/cpu2017/je5.0.1-64/ -ljemalloc Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 -std=c11 502.gcc_r: icc -m32 -std=c11 -L/opt/intel/lib/ia32 C++ benchmarks (except as noted below): icpc -m64 523.xalancbmk_r: icpc -m32 -L/opt/intel/lib/ia32 Fortran benchmarks: ifort -m64 Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-strict-overflow -L/home/cpu2017/je5.0.1-64/ -ljemalloc 502.gcc_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-32/ -ljemalloc 505.mcf_r: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-64/ -ljemalloc 525.x264_r: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-alias -L/home/cpu2017/je5.0.1-64/ -ljemalloc 557.xz_r: Same as 505.mcf_r C++ benchmarks: 520.omnetpp_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-64/ -ljemalloc 523.xalancbmk_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/home/cpu2017/je5.0.1-32/ -ljemalloc 531.deepsjeng_r: Same as 520.omnetpp_r 541.leela_r: Same as 520.omnetpp_r Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/home/cpu2017/je5.0.1-64/ -ljemalloc The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic19.0-official-linux64.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic19.0-official-linux64.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.xml SPEC is a registered trademark of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. -------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2019 Standard Performance Evaluation Corporation Tested with SPEC CPU2017 v1.0.5 on 2019-01-24 22:21:11-0500. Report generated on 2019-02-19 13:56:57 by CPU2017 ASCII formatter v6067. Originally published on 2019-02-19.