SPEC(R) CPU2017 Integer Rate Result Hewlett Packard Enterprise ProLiant BL460c Gen10 (2.10 GHz, Intel Xeon Silver 4110) Test Sponsor: HPE CPU2017 License: 3 Test date: Jun-2018 Test sponsor: HPE Hardware availability: Jun-2018 Tested by: HPE Software availability: May-2018 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 32 928 54.9 S 32 756 67.4 S 500.perlbench_r 32 918 55.5 S 32 759 67.1 * 500.perlbench_r 32 921 55.3 * 32 762 66.9 S 502.gcc_r 32 707 64.1 S 32 608 74.6 S 502.gcc_r 32 715 63.4 * 32 608 74.5 * 502.gcc_r 32 718 63.1 S 32 608 74.5 S 505.mcf_r 32 564 91.6 S 32 564 91.6 S 505.mcf_r 32 583 88.7 S 32 583 88.7 S 505.mcf_r 32 572 90.5 * 32 572 90.5 * 520.omnetpp_r 32 855 49.1 S 32 855 49.1 S 520.omnetpp_r 32 854 49.1 * 32 854 49.1 * 520.omnetpp_r 32 850 49.4 S 32 850 49.4 S 523.xalancbmk_r 32 448 75.5 S 32 368 91.9 * 523.xalancbmk_r 32 451 75.0 * 32 367 92.0 S 523.xalancbmk_r 32 452 74.8 S 32 369 91.7 S 525.x264_r 32 406 138 S 32 406 138 S 525.x264_r 32 403 139 S 32 403 139 S 525.x264_r 32 404 139 * 32 404 139 * 531.deepsjeng_r 32 578 63.5 S 32 578 63.5 S 531.deepsjeng_r 32 586 62.5 * 32 586 62.5 * 531.deepsjeng_r 32 587 62.5 S 32 587 62.5 S 541.leela_r 32 920 57.6 S 32 901 58.8 S 541.leela_r 32 915 57.9 S 32 909 58.3 S 541.leela_r 32 917 57.8 * 32 903 58.7 * 548.exchange2_r 32 618 136 S 32 618 136 S 548.exchange2_r 32 619 135 S 32 619 135 S 548.exchange2_r 32 618 136 * 32 618 136 * 557.xz_r 32 641 53.9 S 32 641 53.9 S 557.xz_r 32 697 49.6 * 32 697 49.6 * 557.xz_r 32 699 49.5 S 32 699 49.5 S ================================================================================= 500.perlbench_r 32 921 55.3 * 32 759 67.1 * 502.gcc_r 32 715 63.4 * 32 608 74.5 * 505.mcf_r 32 572 90.5 * 32 572 90.5 * 520.omnetpp_r 32 854 49.1 * 32 854 49.1 * 523.xalancbmk_r 32 451 75.0 * 32 368 91.9 * 525.x264_r 32 404 139 * 32 404 139 * 531.deepsjeng_r 32 586 62.5 * 32 586 62.5 * 541.leela_r 32 917 57.8 * 32 903 58.7 * 548.exchange2_r 32 618 136 * 32 618 136 * 557.xz_r 32 697 49.6 * 32 697 49.6 * SPECrate2017_int_base 72.4 SPECrate2017_int_peak 76.6 HARDWARE -------- CPU Name: Intel Xeon Silver 4110 Max MHz.: 3000 Nominal: 2100 Enabled: 16 cores, 2 chips, 2 threads/core Orderable: 1, 2 chip(s) Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 11 MB I+D on chip per chip Other: None Memory: 192 GB (12 x 16 GB 2Rx4 PC4-2666V-R, running at 2400) Storage: 2 x 600 GB 10 K SAS, RAID 1 Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP2 (x86_64) Kernel 4.4.121-92.76-default Compiler: C/C++: Version 18.0.2.199 of Intel C/C++ Compiler for Linux; Fortran: Version 18.0.2.199 of Intel Fortran Compiler for Linux Parallel: No Firmware: HPE BIOS Version I41 05/14/2018 released Jun-2018 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc: jemalloc memory allocator library V5.0.1 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3 > /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/cpu2017/lib/ia32:/cpu2017/lib/intel64" Binaries compiled on a system with 1x Intel Core i7-6700K CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc: configured and built at default for 32bit (i686) and 64bit (x86_64) targets; built with RedHat Enterprise 7.4, and the system compiler gcc 4.8.5; sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS Configuration: Memory Patrol Scrubbing set to Disabled LLC Dead Line Allocation set to Disabled LLC Prefetch set to Enabled Thermal Configuration set to Maximum Cooling Workload Profile set to General Throughput Compute Minimum Processor Idle Power Core C-State set to C1E State Workload Profile set to Custom Sub-NUMA Clustering (SNC) set to Disabled Sysinfo program /cpu2017/bin/sysinfo Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f running on pl12 Thu Jun 14 11:49:34 2018 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Silver 4110 CPU @ 2.10GHz 2 "physical id"s (chips) 32 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 8 siblings : 16 physical 0: cores 0 1 2 3 4 5 6 7 physical 1: cores 0 1 2 3 4 5 6 7 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 32 On-line CPU(s) list: 0-31 Thread(s) per core: 2 Core(s) per socket: 8 Socket(s): 2 NUMA node(s): 2 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Silver 4110 CPU @ 2.10GHz Stepping: 4 CPU MHz: 2095.086 BogoMIPS: 4190.17 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 11264K NUMA node0 CPU(s): 0-7,16-23 NUMA node1 CPU(s): 8-15,24-31 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb invpcid_single pln pts dtherm intel_pt rsb_ctxsw spec_ctrl stibp rds retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc /proc/cpuinfo cache data cache size : 11264 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 2 nodes (0-1) node 0 cpus: 0 1 2 3 4 5 6 7 16 17 18 19 20 21 22 23 node 0 size: 96338 MB node 0 free: 95936 MB node 1 cpus: 8 9 10 11 12 13 14 15 24 25 26 27 28 29 30 31 node 1 size: 96764 MB node 1 free: 96375 MB node distances: node 0 1 0: 10 21 1: 21 10 From /proc/meminfo MemTotal: 197737428 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux pl12 4.4.121-92.76-default #1 SMP Tue May 8 19:06:40 UTC 2018 (95b450b) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Jun 14 11:47 SPEC is set to: /cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda2 xfs 559G 49G 511G 9% / Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS HPE I41 05/14/2018 Memory: 12x HPE 840756-091 16 GB 2 rank 2666, configured at 2400 4x UNKNOWN NOT AVAILABLE (End of data from sysinfo program) Regarding the sysinfo display about the memory installed, the correct amount of memory is 192 GB and the dmidecode description should have one line reading as: 12x HPE 840756-091 16 GB 2 rank 2666, configured at 2400 Compiler Version Notes ---------------------- ============================================================================== CC 500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base) 525.x264_r(base) 557.xz_r(base) ------------------------------------------------------------------------------ icc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CC 500.perlbench_r(peak) 502.gcc_r(peak) 505.mcf_r(peak) 525.x264_r(peak) 557.xz_r(peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base) 541.leela_r(base) ------------------------------------------------------------------------------ icpc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(peak) 523.xalancbmk_r(peak) 531.deepsjeng_r(peak) 541.leela_r(peak) ------------------------------------------------------------------------------ icpc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(base) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(peak) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -L/usr/local/je5.0.1-64/lib -ljemalloc Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 -std=c11 502.gcc_r: icc -m32 -std=c11 -L/home/prasadj/specdev/IC18u2_Internal/lin_18_0_20180210/compiler/lib/ia32_lin C++ benchmarks (except as noted below): icpc -m64 523.xalancbmk_r: icpc -m32 -L/home/prasadj/specdev/IC18u2_Internal/lin_18_0_20180210/compiler/lib/ia32_lin Fortran benchmarks: ifort -m64 Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-strict-overflow -L/usr/local/je5.0.1-64/lib -ljemalloc 502.gcc_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-32/lib -ljemalloc 505.mcf_r: basepeak = yes 525.x264_r: basepeak = yes 557.xz_r: basepeak = yes C++ benchmarks: 520.omnetpp_r: basepeak = yes 523.xalancbmk_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-32/lib -ljemalloc 531.deepsjeng_r: basepeak = yes 541.leela_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: 548.exchange2_r: basepeak = yes The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.html http://www.spec.org/cpu2017/flags/HPE-Platform-Flags-Intel-V1.2-SKX-revH.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.xml http://www.spec.org/cpu2017/flags/HPE-Platform-Flags-Intel-V1.2-SKX-revH.xml SPEC is a registered trademark of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2018 Standard Performance Evaluation Corporation Tested with SPEC CPU2017 v1.0.2 on 2018-06-14 05:49:33-0400. Report generated on 2018-10-31 18:51:55 by CPU2017 ASCII formatter v6067. Originally published on 2018-07-10.