SPEC CPU2017 Platform Settings for ASUSTek Systems
- Determinism Slider:
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This BIOS option allows for AGESA determinism to control performance.
- Performance: Provides predictable performance across all processors of the same type.
- Power: Maximizes performance within the power limits defined by cTDP and PPT.
- Auto (Default setting): Use AGESA default value for deterministic performance control.
- cTDP Control:
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This BIOS option is for "Configurable TDP (cTDP)", it allows user can set customized value for TDP. Available settings are:
- Auto (Default setting): Use the fused TDP value.
- Manual: Let user specifies customized TDP value.
- cTDP:
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TDP is an acronym for "Thermal Design Power." TDP is the recommended target for power used when designing the cooling capacity for a server.
EPYC processors are able to control this target power consumption within certain limits. This capability is referred to as "configurable TDP" or "cTDP."
cTDP can be used to reduce power consumption for greater efficiency, or in some cases, increase power consumption above the default value to provide additional performance.
cTDP is controlled using a BIOS option.
The default EPYC cTDP value corresponds with the microprocessor's nominal TDP.
The default cTDP value is set at a good balance between performance and energy efficiency.
The EPYC 7742 cTDP can be reduced as low as 225W, which will minimize the power consumption for the processor under load, but at the expense of peak performance.
Increasing the EPYC 7742 cTDP to 240W will maximize peak performance by allowing the CPU to maintain higher dynamic clock speeds, but will make the microprocessor less energy efficient.
Note that at maximum cTDP, the CPU thermal solution must be capable of dissipating at least 240W or the EPYC 7742 processor might engage in thermal throttling under load.
The available cTDP ranges for each EPYC model are in the table below:
| Model | Minimum cTDP | Maximum cTDP |
|---|
| EPYC 7742 | 225 | 240 |
| EPYC 7702 | 165 | 200 |
| EPYC 7702P | 180 | 200 |
| EPYC 7452 | 155 | 180 |
| EPYC 7H12 | 225 | 280 |
| EPYC 7762 | 225 | 240 |
| EPYC 7642 | 225 | 240 |
| EPYC 7552 | 165 | 200 |
| EPYC 7542 | 225 | 240 |
| EPYC 7532 | 165 | 200 |
| EPYC 7502 | 165 | 200 |
| EPYC 7502P | 165 | 200 |
| EPYC 7402 | 165 | 200 |
| EPYC 7402P | 165 | 200 |
| EPYC 7352 | 155 | 180 |
| EPYC 7302 | 155 | 180 |
| EPYC 7302P | 155 | 180 |
| EPYC 7282 | 120 | 150 |
| EPYC 7272 | 120 | 150 |
| EPYC 7262 | 155 | 180 |
| EPYC 7252 | 120 | 150 |
| EPYC 7232P | 120 | 150 |
* cTDP must remain below the thermal solution design parameters or thermal throttling could be frequently encountered.
- Power phase shedding:
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Power phase shedding allows efficiency optimization of the voltage regulator across the variety of loads, minimizing average energy consumption by optimizing the powertrain for specific load power states.
Values for this BIOS option can be: Enabled/Disabled. Current default is Enabled.
- SVM Mode:
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This is CPU virtualization function. With SVM enabled you'll be able to install a virtual machine on your system.
Values for this BIOS option can be: Enabled/Disabled. Current default is Enabled.
- SR-IOV support:
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In virtualization, single root input/output virtualization or SR-IOV is a specification that allows the isolation of the PCI Express resources for manageability and performance reasons.
A single physical PCI Express can be shared on a virtual environment using the SR-IOV specification.
If system has SR-IOV capable PCIe Devices, this option Enables or Disables Single Root IO Virtualization Support. Values for this BIOS option can be: Enabled/Disabled. Current default is Enabled.
- DRAM Scrub time:
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DRAM scrubbing is a mechanism for the memory controller to periodically read all memory locations and write back corrected data.
The time interval for scrubbing the entire memory can be: Disabled/1 hour/4 hours/8 hours/16 hours/24 hours/48 hours/Auto. Current default is Auto(AGESA default value).
- NUMA nodes per socket:
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Specifies the number of desired NUMA nodes per populated socket in the system:
- NPS1: Each physical processor is a NUMA node, and memory accesses are interleaved across all memory channels directly connected to the physical processor.
- NPS2: Each physical processor is two NUMA nodes, and memory accesses are interleaved across 4 memory channels.
- NPS4: Each physical processor is four NUMA nodes, and memory accesses are interleaved across 2 memory channels.
- Auto: Use AGESA default value. Current default is NPS1
Current default is Auto.