CPU2006 Flag Description
Yadro Yadro Vesnin (2.92 GHz, 40 cores, RHEL 7.4)

Compilers: IBM XL C/C++ Version 13.1.5 for Linux

Compilers: IBM XL Fortran Version 15.1.5 for Linux

Operating systems: Red Hat Enterprise Linux Server release 7

Last updated: $LastChangedDate: 2017-12-16 09:45:29 -0400 (Sat, 16 Dec 2017) $ revision $LastChangedRevision: 001 $

Implicitly Included Flags

This section contains descriptions of flags that were included implicitly by other flags, but which do not have a permanent home at SPEC.

• • -O4
  • 
  • Perform optimizations for maximum performance. This includes interprocedural analysis on all of the objects presented on the "link" step.

    -O4 is equivalent to the following flags:

    • -O3
    • -qipa=level=1
    • -qarch=auto
    • -qtune=auto
    • -qsimd=auto
  • Includes:
    • -O3
      • -O2
        • -O
      • -qhot=level=0
    • -qipa=level=1
    • -qarch=auto
    • -qtune=auto
    • -qsimd=auto
• • -O3
  • 
  • -O3 Performs additional optimizations that are memory intensive, compile-time intensive, and may change the semantics of the program slightly, unless -qstrict is specified. We recommend these optimizations when the desire for run-time speed improvements outweighs the concern for limiting compile-time resources.

    The optimizations provided include:

    • In-depth memory access analysis
    • Better loop scheduling
    • High-order loop analysis and transformations (-qhot=level=0)
    • Inlining of small procedures within a compilation unit by default
    • Eliminating implicit compile-time memory usage limits
    • Widening, which merges adjacent load/stores and other operations
    • Pointer aliasing improvements to enhance other optimizations

    `-O3 is equivalent to the following flags :

    • -O2
    • -qhot=level=0
  • Includes:
    • -O2
      • -O
        • -O2
    • -qhot=level=0
• • -O2
  • 
  • -O2 performs a set of optimizations that are intended to offer improved performance without an unreasonable increase in time or storage that is required for compilation including :
    • Eliminates redundant code
    • Basic loop optimization
    • Can structure code to take advantage of -qarch and -qtune settings
  • Includes:
    • -O
      • -O2
        • -O
• • -O
  • 
  • -O enables the level of optimization that represents the best tradeoff between compilation speed and run-time performance. If you need a specific level of optimization, specify the appropriate numeric value. Currently, -O is equivalent to -O2.
  • Includes:
    • -O2
      • -O
        • -O2
• • -qhot=level=0
  • 
  • Performs high-order transformations on loops during optimization. Some example usages are: -qhot, -qhot=level=1, -qhot=simd, -qhot=novector
    

    The supported values for suboption are :

    • arraypad - The compiler will pad any arrays where it infers that there may be a benefit.
    • level=0 - The compiler performs a limited set of high-order loop transformations.
    • level=1 - The compiler performs its full set of high-order loop transformations.
    • simd - Replaces certain instruction sequences with vector instructions.
    • vector - Replaces certain instruction sequences with calls to the MASS library.

    Specifying -qhot without suboptions implies -qhot=nosimd, -qhot=noarraypad, -qhot=vector and -qhot=level=1. The -qhot option is also implied by -O4 and -O5 .

• • -qipa=level=1
  • 

  • Enhances optimization by doing detailed analysis across procedures (interprocedural analysis or IPA). The level determines the amount of interprocedural analysis and optimization that is performed.

    • level=0 does only minimal interprocedural analysis and optimization.
    • level=1 turns on inlining , limited alias analysis, and limited call-site tailoring.
    • level=2 turns on full interprocedural data flow and alias analysis.
• • -qarch=auto
  • 
  • Produces object code containing instructions that will run on the specified processors. auto selects the processor, the compile is being done on. pwr5x is the POWER5+ processor.

    Supported values for this flag are :

    • auto - Use the processor on which the program is compiled.
    • pwr8 - The POWER8 processor based systems.
    • pwr7 - The POWER7 processor based systems.
    • pwr6e - The POWER6 processor in "Enhanced" mode based systems.
    • pwr6 - The POWER6 processor based systems.
    • pwr5x - The POWER5+ processor based systems.
    • pwr5 - The POWER5 processor based systems.
    • pwr4 - The POWER4 processor based systems.
    • ppc970 - The PPC970 processor based systems.
• • -qtune=auto
  • 
  • Specifies the system architecture for which the executable program is optimized. This includes instruction scheduling and cache setting.

    The supported values for suboption are :

    • auto - Use the processor on which the program is compiled.
    • pwr8 - The POWER8 processor based systems.
    • pwr7 - The POWER7 processor based systems.
    • pwr6e - The POWER6 processor in "Enhanced" mode based systems.
    • pwr6 - The POWER6 processor based systems.
    • pwr5x - The POWER5+ processor based systems.
    • pwr5 - The POWER5 processor based systems.
    • pwr4 - The POWER4 processor based systems.
    • ppc970 - The PPC970 processor based systems.
• • -qsimd=auto
  • 
  • • -qsimd : enables the generation of vector instructions for processors that support them.
    • -qnosimd : disables the generation of vector instructions.
    • Default : whether -qsimd is specified or not, -qsimd=auto is implied at the -O3 or higher optimization level; -qsimd=noauto is implied at the -O2 or lower optimization level.
• • -qipa=level=2
  • 

  • Enhances optimization by doing detailed analysis across procedures (interprocedural analysis or IPA). The level determines the amount of interprocedural analysis and optimization that is performed.

    • level=0 does only minimal interprocedural analysis and optimization.
    • level=1 turns on inlining , limited alias analysis, and limited call-site tailoring.
    • level=2 turns on full interprocedural data flow and alias analysis.

Commands and Options Used to Submit Benchmark Runs

submit = taskset -p -c $BIND $command

• Each process was bound to a cpu using submit= with the taskset command

   
  submit = taskset -p -c $BIND $command
  

• taskset - show or change the CPU affinity of a process.

   
  
  Options:
   -p, --pid               operate on existing given pid
   -c, --cpu-list          display and specify cpus in list format
  
  

Shell, Environment, and Other Software Settings

• Environment variables that can be set before the run:

  XLFRTEOPTS=intrinthrds=1 : Causes the Fortran runtime to only use a single thread.
  

• To reserve 200 huge pages out of the physical memory pool, issue the following command,

  echo 16000 > /proc/sys/vm/nr_hugepages
  

  or

  echo 16000 > /proc/sys/vm/nr_overcommit_hugepages
  

  to allocate from the dynamic hugepage pool. This can be done in both Red Hat and Suse Enterprise, since both distributions implements Transparent Huge Pages (THP). THP is an abstraction layer that automates most aspects of creating, managing and using huge pages, and can currently only map anonymous memory regions such as heap and stack space.

Operating System Tuning Parameters

• ulimit -s unlimited
  Sets the maximum stack size to "unlimited".
• Simultaneous Multi-Threading (SMT) mode was set to SMT4

   ppc64_cpu --smt=4 
  

  ppc64_cpu command is used to display and set cpu characteristics on PowerPC platforms.

  Options:
         --smt  Display  the  current  smt setting for the system. The output will state whether smt is off indicating there is only one thread per core online, smt is on indicating that all threads of every
                core is online, the smt is in a mixed state indicating that the number of threads online varies per core, or SMT=X indicating a specific smt state.
         --smt=value
                Set the smt state for each core to the specified value.
  
  

Firmware / BIOS / Microcode Settings

• Intelligent Energy Optimizations

Intelligent Energy Optimization capabilities enable the POWER8 processor to operate at a higher frequency for increased performance. This processor / firmware feature maximizes performance as thermal conditions allow and enabled by default in firmware.

Flag description origin markings:

	Indicates that the flag description came from the user flags file.
	Indicates that the flag description came from the suite-wide flags file.
	Indicates that the flag description came from a per-benchmark flags file.

For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2018 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.2.
Report generated on Fri Mar 9 10:42:49 2018 by SPEC CPU2006 flags formatter v6906.