SPEC® CFP2006 Result

Copyright 2006-2017 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS C480 M5 (Intel Xeon Platinum 8180,
2.50GHz)

SPECfp®2006 = 157

CPU2006 license: 9019 Test date: Sep-2017
Test sponsor: Cisco Systems Hardware Availability: Oct-2017
Tested by: Cisco Systems Software Availability: Apr-2017
Benchmark results graph
Hardware
CPU Name: Intel Xeon Platinum 8180
CPU Characteristics: Intel Turbo Boost Technology up to 3.80 GHz
CPU MHz: 2500
FPU: Integrated
CPU(s) enabled: 112 cores, 4 chips, 28 cores/chip
CPU(s) orderable: 2,4 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 1 MB I+D on chip per core
L3 Cache: 38.5 MB I+D on chip per chip
Other Cache: None
Memory: 768 GB (48 x 16 GB 2Rx4 PC4-2666V-R)
Disk Subsystem: 1 x 480 GB SSD SAS
Other Hardware: None
Software
Operating System: SUSE Linux Enterprise Server 12 SP2 (x86_64)
4.4.21-69-default
Compiler: C/C++: Version 17.0.3.191 of Intel C/C++
Compiler for Linux;
Fortran: Version 17.0.3.191 of Intel Fortran
Compiler for Linux
Auto Parallel: Yes
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: 32/64-bit
Other Software: None

Results Table

Benchmark Base Peak
Seconds Ratio Seconds Ratio Seconds Ratio Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
410.bwaves 9.11 1490   9.13 1490   9.16 1480   9.11 1490   9.13 1490   9.16 1480  
416.gamess 400    48.9 400    48.9 401    48.8 372    52.6 372    52.6 372    52.7
433.milc 114    80.2 114    80.7 115    79.6 114    80.2 114    80.7 115    79.6
434.zeusmp 50.4  181   50.3  181   49.2  185   50.4  181   50.3  181   49.2  185  
435.gromacs 149    48.0 149    48.1 149    48.0 149    48.0 149    48.1 149    48.0
436.cactusADM 7.95 1500   8.11 1470   7.85 1520   7.95 1500   8.11 1470   7.85 1520  
437.leslie3d 20.8  452   20.6  457   21.7  433   20.8  452   20.6  457   21.7  433  
444.namd 220    36.5 220    36.4 220    36.5 214    37.5 214    37.5 214    37.5
447.dealII 153    74.7 153    74.9 153    74.6 153    74.7 153    74.9 153    74.6
450.soplex 157    53.2 158    52.7 156    53.3 157    53.2 158    52.7 156    53.3
453.povray 74.5  71.4 74.6  71.4 74.5  71.4 65.4  81.3 65.3  81.5 65.4  81.3
454.calculix 113    73.2 113    73.1 113    73.2 107    77.4 107    77.0 107    76.9
459.GemsFDTD 61.1  174   63.2  168   60.3  176   47.6  223   47.6  223   47.8  222  
465.tonto 199    49.5 193    50.9 198    49.6 150    65.8 148    66.5 149    66.1
470.lbm 3.36 4090   3.38 4060   3.38 4070   3.36 4090   3.38 4060   3.38 4070  
481.wrf 78.0  143   77.4  144   77.2  145   78.0  143   77.4  144   77.2  145  
482.sphinx3 286    68.0 284    68.5 285    68.5 286    68.0 284    68.5 285    68.5

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Platform Notes

BIOS Settings:
Intel HyperThreading Technology set to Disabled
CPU performance set to Enterprise
Power Performance Tuning set to OS
SNC set to Disabled
IMC Interleaving set to Auto
Patrol Scrub set to Disabled
 Sysinfo program /home/cpu2006-1.2/config/sysinfo.rev6993
 Revision 6993 of 2015-11-06 (b5e8d4b4eb51ed28d7f98696cbe290c1)
 running on C480-SLES12 Thu Sep 21 02:25:52 2017

 This section contains SUT (System Under Test) info as seen by
 some common utilities.  To remove or add to this section, see:
   http://www.spec.org/cpu2006/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Platinum 8180 CPU @ 2.50GHz
       4 "physical id"s (chips)
       112 "processors"
    cores, siblings (Caution: counting these is hw and system dependent.  The
    following excerpts from /proc/cpuinfo might not be reliable.  Use with
    caution.)
       cpu cores : 28
       siblings  : 28
       physical 0: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14 16 17 18 19 20 21 22 24
       25 26 27 28 29 30
       physical 1: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14 16 17 18 19 20 21 22 24
       25 26 27 28 29 30
       physical 2: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14 16 17 18 19 20 21 22 24
       25 26 27 28 29 30
       physical 3: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14 16 17 18 19 20 21 22 24
       25 26 27 28 29 30
    cache size : 39424 KB

 From /proc/meminfo
    MemTotal:       790981780 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /usr/bin/lsb_release -d
    SUSE Linux Enterprise Server 12 SP2

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 2
       # This file is deprecated and will be removed in a future service pack or
       release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP2"
       VERSION_ID="12.2"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp2"

 uname -a:
    Linux C480-SLES12 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016
    (9464f67) x86_64 x86_64 x86_64 GNU/Linux

 run-level 3 Sep 20 20:51

 SPEC is set to: /home/cpu2006-1.2
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda3      xfs   404G   46G  359G  12% /home
 Additional information from dmidecode:

    Warning: Use caution when you interpret this section. The 'dmidecode' program
    reads system data which is "intended to allow hardware to be accurately
    determined", but the intent may not be met, as there are frequent changes to
    hardware, firmware, and the "DMTF SMBIOS" standard.

   BIOS Cisco Systems, Inc. C480M5.3.1.0.272.0613172154 06/13/2017
   Memory:
    48x 0xCE00 M393A2G40EB2-CTD 16 GB 2 rank 2666 MHz

 (End of data from sysinfo program)

General Notes

Environment variables set by runspec before the start of the run:
KMP_AFFINITY = "granularity=fine,compact"
LD_LIBRARY_PATH = "/opt/compilers_and_libraries_2018.0.128/linux/compiler/lib/ia32:/opt/compilers_and_libraries_2018.0.128/linux/compiler/lib/intel64:/home/cpu2006-1.2/sh10.2"
OMP_NUM_THREADS = "112"

 Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.2
 Transparent Huge Pages enabled with:
 echo always > /sys/kernel/mm/transparent_hugepage/enabled

Base Compiler Invocation

C benchmarks:

 icc -m64 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 icc -m64   ifort -m64 

Base Portability Flags

410.bwaves:  -DSPEC_CPU_LP64 
416.gamess:  -DSPEC_CPU_LP64 
433.milc:  -DSPEC_CPU_LP64 
434.zeusmp:  -DSPEC_CPU_LP64 
435.gromacs:  -DSPEC_CPU_LP64   -nofor_main 
436.cactusADM:  -DSPEC_CPU_LP64   -nofor_main 
437.leslie3d:  -DSPEC_CPU_LP64 
444.namd:  -DSPEC_CPU_LP64 
447.dealII:  -DSPEC_CPU_LP64 
450.soplex:  -DSPEC_CPU_LP64 
453.povray:  -DSPEC_CPU_LP64 
454.calculix:  -DSPEC_CPU_LP64   -nofor_main 
459.GemsFDTD:  -DSPEC_CPU_LP64 
465.tonto:  -DSPEC_CPU_LP64 
470.lbm:  -DSPEC_CPU_LP64 
481.wrf:  -DSPEC_CPU_LP64   -DSPEC_CPU_CASE_FLAG   -DSPEC_CPU_LINUX 
482.sphinx3:  -DSPEC_CPU_LP64 

Base Optimization Flags

C benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -parallel   -qopt-prefetch 

C++ benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch 

Fortran benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -parallel   -qopt-prefetch 

Benchmarks using both Fortran and C:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -parallel   -qopt-prefetch 

Peak Compiler Invocation

C benchmarks:

 icc -m64 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 icc -m64   ifort -m64 

Peak Portability Flags

Same as Base Portability Flags

Peak Optimization Flags

C benchmarks:

433.milc:  basepeak = yes 
470.lbm:  basepeak = yes 
482.sphinx3:  basepeak = yes 

C++ benchmarks:

444.namd:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -fno-alias   -auto-ilp32 
447.dealII:  basepeak = yes 
450.soplex:  basepeak = yes 
453.povray:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -unroll4   -ansi-alias 

Fortran benchmarks:

410.bwaves:  basepeak = yes 
416.gamess:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -unroll2   -inline-level=0   -scalar-rep- 
434.zeusmp:  basepeak = yes 
437.leslie3d:  basepeak = yes 
459.GemsFDTD:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -unroll2   -inline-level=0   -qopt-prefetch   -parallel 
465.tonto:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -inline-calloc   -qopt-malloc-options=3   -auto   -unroll4 

Benchmarks using both Fortran and C:

435.gromacs:  basepeak = yes 
436.cactusADM:  basepeak = yes 
454.calculix:  -xCORE-AVX2   -ipo   -O3   -no-prec-div   -auto-ilp32 
481.wrf:  basepeak = yes 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.html,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.xml,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.xml.

SPEC and SPECfp are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders.

For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2017 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.2.
Report generated on Fri Oct 27 12:00:31 2017 by SPEC CPU2006 HTML formatter v6932.
Originally published on 26 October 2017.