SPEC® CFP2006 Result

Copyright 2006-2017 Standard Performance Evaluation Corporation

Lenovo Global Technology

ThinkSystem SR650
(3.60 GHz, Intel Xeon Gold 5122)

CPU2006 license: 9017 Test date: Aug-2017
Test sponsor: Lenovo Global Technology Hardware Availability: Aug-2017
Tested by: Lenovo Global Technology Software Availability: Apr-2017
Benchmark results graph
Hardware
CPU Name: Intel Xeon Gold 5122
CPU Characteristics: Intel Turbo Boost Technology up to 3.70 GHz
CPU MHz: 3600
FPU: Integrated
CPU(s) enabled: 8 cores, 2 chips, 4 cores/chip, 2 threads/core
CPU(s) orderable: 1,2 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 1 MB I+D on chip per core
L3 Cache: 16.5 MB I+D on chip per chip
Other Cache: None
Memory: 384 GB (24 x 16 GB 2Rx8 PC4-2666V-R)
Disk Subsystem: 1 x 800 GB SAS SSD
Other Hardware: None
Software
Operating System: SUSE Linux Enterprise Server 12 SP2 (x86_64)
Kernel 4.4.21-69-default
Compiler: C/C++: Version 17.0.3.191 of Intel C/C++
Compiler for Linux;
Fortran: Version 17.0.3.191 of Intel Fortran
Compiler for Linux
Auto Parallel: Yes
File System: btrfs
System State: Run level 3 (multi-user)
Base Pointers: 32/64-bit
Peak Pointers: 32/64-bit
Other Software: None

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
410.bwaves 16 345 631 345 630 345 630 8 181 599 182 598 182 599
416.gamess 16 705 444 705 445 705 444 16 685 457 683 458 683 459
433.milc 16 212 692 212 693 212 693 16 212 692 212 693 212 693
434.zeusmp 16 240 606 241 605 240 608 16 240 606 241 605 240 608
435.gromacs 16 202 565 201 568 192 594 16 198 576 197 581 199 573
436.cactusADM 16 293 653 293 652 292 656 16 293 653 293 652 292 656
437.leslie3d 16 439 343 434 347 436 345 8 152 495 152 495 152 496
444.namd 16 362 355 364 353 365 351 16 358 358 359 357 360 357
447.dealII 16 259 708 258 711 264 693 16 259 708 258 711 264 693
450.soplex 16 366 364 366 365 364 366 8 208 321 210 317 209 319
453.povray 16 134 635 134 633 134 635 16 116 735 116 735 116 734
454.calculix 16 186 710 186 711 186 711 16 186 710 186 711 186 711
459.GemsFDTD 16 553 307 554 306 553 307 8 327 260 328 259 327 259
465.tonto 16 303 519 305 516 300 524 16 285 552 289 545 280 562
470.lbm 16 376 584 377 584 377 584 16 376 584 377 584 377 584
481.wrf 16 247 723 257 696 253 707 16 247 723 257 696 253 707
482.sphinx3 16 648 482 651 479 649 481 16 648 482 651 479 649 481

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Platform Notes

BIOS configuration:
Operating Mode set to Maximum Performance
SNC set to Enable
DCU Streamer Prefetcher set to Disable
Stale AtoS set to Enable
LLC dead line alloc set to Disable
 Sysinfo program /home/cpu2006-1.2-ic17.0u3/config/sysinfo.rev6993
 Revision 6993 of 2015-11-06 (b5e8d4b4eb51ed28d7f98696cbe290c1)
 running on Cyborg-SPECcpu2006-SUSE12SP2 Fri Aug 25 13:30:47 2017

 This section contains SUT (System Under Test) info as seen by
 some common utilities.  To remove or add to this section, see:
   http://www.spec.org/cpu2006/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Gold 5122 CPU @ 3.60GHz
       2 "physical id"s (chips)
       16 "processors"
    cores, siblings (Caution: counting these is hw and system dependent.  The
    following excerpts from /proc/cpuinfo might not be reliable.  Use with
    caution.)
       cpu cores : 4
       siblings  : 8
       physical 0: cores 5 8 10 11
       physical 1: cores 1 10 11 12
    cache size : 16896 KB

 From /proc/meminfo
    MemTotal:       395893156 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 2
       # This file is deprecated and will be removed in a future service pack or
       release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP2"
       VERSION_ID="12.2"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp2"

 uname -a:
    Linux Cyborg-SPECcpu2006-SUSE12SP2 4.4.21-69-default #1 SMP Tue Oct 25
    10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux

 run-level 3 Aug 25 06:03

 SPEC is set to: /home/cpu2006-1.2-ic17.0u3
    Filesystem     Type   Size  Used Avail Use% Mounted on
    /dev/sdb2      btrfs  744G   36G  706G   5% /home
 Additional information from dmidecode:

    Warning: Use caution when you interpret this section. The 'dmidecode' program
    reads system data which is "intended to allow hardware to be accurately
    determined", but the intent may not be met, as there are frequent changes to
    hardware, firmware, and the "DMTF SMBIOS" standard.

   BIOS Lenovo -[IVE109Q-1.00]- 06/28/2017
   Memory:
    24x Samsung M393A2K43BB1-CTD 16 GB 2 rank 2666 MHz

 (End of data from sysinfo program)

General Notes

Environment variables set by runspec before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2006-1.2-ic17.0u3/lib/ia32:/home/cpu2006-1.2-ic17.0u3/lib/intel64:/home/cpu2006-1.2-ic17.0u3/sh10.2"

 Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.2
 Transparent Huge Pages enabled by default
 Filesystem page cache cleared with:
 shell invocation of 'sync; echo 3 > /proc/sys/vm/drop_caches' prior to run
 runspec command invoked through numactl i.e.:
 numactl --interleave=all runspec <etc>

Base Compiler Invocation

C benchmarks:

 icc -m64 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 icc -m64   ifort -m64 

Base Portability Flags

410.bwaves:  -DSPEC_CPU_LP64 
416.gamess:  -DSPEC_CPU_LP64 
433.milc:  -DSPEC_CPU_LP64 
434.zeusmp:  -DSPEC_CPU_LP64 
435.gromacs:  -DSPEC_CPU_LP64   -nofor_main 
436.cactusADM:  -DSPEC_CPU_LP64   -nofor_main 
437.leslie3d:  -DSPEC_CPU_LP64 
444.namd:  -DSPEC_CPU_LP64 
447.dealII:  -DSPEC_CPU_LP64 
450.soplex:  -DSPEC_CPU_LP64 
453.povray:  -DSPEC_CPU_LP64 
454.calculix:  -DSPEC_CPU_LP64   -nofor_main 
459.GemsFDTD:  -DSPEC_CPU_LP64 
465.tonto:  -DSPEC_CPU_LP64 
470.lbm:  -DSPEC_CPU_LP64 
481.wrf:  -DSPEC_CPU_LP64   -DSPEC_CPU_CASE_FLAG   -DSPEC_CPU_LINUX 
482.sphinx3:  -DSPEC_CPU_LP64 

Base Optimization Flags

C benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -auto-p32   -qopt-mem-layout-trans=3 

C++ benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -auto-p32   -qopt-mem-layout-trans=3 

Fortran benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch 

Benchmarks using both Fortran and C:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -auto-p32   -qopt-mem-layout-trans=3 

Peak Compiler Invocation

C benchmarks:

 icc -m64 

C++ benchmarks (except as noted below):

 icpc -m64 
450.soplex:  icpc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 icc -m64   ifort -m64 

Peak Portability Flags

410.bwaves:  -DSPEC_CPU_LP64 
416.gamess:  -DSPEC_CPU_LP64 
433.milc:  -DSPEC_CPU_LP64 
434.zeusmp:  -DSPEC_CPU_LP64 
435.gromacs:  -DSPEC_CPU_LP64   -nofor_main 
436.cactusADM:  -DSPEC_CPU_LP64   -nofor_main 
437.leslie3d:  -DSPEC_CPU_LP64 
444.namd:  -DSPEC_CPU_LP64 
447.dealII:  -DSPEC_CPU_LP64 
450.soplex:  -D_FILE_OFFSET_BITS=64 
453.povray:  -DSPEC_CPU_LP64 
454.calculix:  -DSPEC_CPU_LP64   -nofor_main 
459.GemsFDTD:  -DSPEC_CPU_LP64 
465.tonto:  -DSPEC_CPU_LP64 
470.lbm:  -DSPEC_CPU_LP64 
481.wrf:  -DSPEC_CPU_LP64   -DSPEC_CPU_CASE_FLAG   -DSPEC_CPU_LINUX 
482.sphinx3:  -DSPEC_CPU_LP64 

Peak Optimization Flags

C benchmarks:

433.milc:  basepeak = yes 
470.lbm:  basepeak = yes 
482.sphinx3:  basepeak = yes 

C++ benchmarks:

444.namd:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -fno-alias   -auto-ilp32   -qopt-mem-layout-trans=3 
447.dealII:  basepeak = yes 
450.soplex:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -qopt-malloc-options=3   -qopt-mem-layout-trans=3 
453.povray:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -unroll4   -qopt-mem-layout-trans=3 

Fortran benchmarks:

410.bwaves:  -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch 
416.gamess:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -unroll2   -inline-level=0   -scalar-rep- 
434.zeusmp:  basepeak = yes 
437.leslie3d:  Same as 410.bwaves 
459.GemsFDTD:  Same as 410.bwaves 
465.tonto:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -unroll4   -auto   -inline-calloc   -qopt-malloc-options=3 

Benchmarks using both Fortran and C:

435.gromacs:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -qopt-prefetch   -auto-ilp32   -qopt-mem-layout-trans=3 
436.cactusADM:  basepeak = yes 
454.calculix:  basepeak = yes 
481.wrf:  basepeak = yes 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.html,
http://www.spec.org/cpu2006/flags/Lenovo-Platform-Flags-V1.2-SKL-C.20171004.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.xml,
http://www.spec.org/cpu2006/flags/Lenovo-Platform-Flags-V1.2-SKL-C.20171004.xml.