CPU2006 Flag Description
Hewlett Packard Enterprise ProLiant DL360 Gen9 (3.00 GHz, Intel Xeon E5-2687W v4)
Test sponsored by HPE
Copyright © 2016 Intel Corporation. All Rights Reserved.
Base Portability Flags
-
- -DSPEC_CPU_LP64
![[suite]](http://www.spec.org/auto/cpu2006/flags/suite.png)
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -nofor_main
![[user]](http://www.spec.org/auto/cpu2006/flags/user.png)
- LDPORTABILITY
-
This option specifies that the main program is not written in Fortran.
It is a link-time option that prevents the compiler from linking for_main.o
into applications.
For example, if the main program is written in C and calls a Fortran subprogram,
specify -nofor-main when compiling the program with the ifort command.
If you omit this option, the main program must be a Fortran program.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -nofor_main
- LDPORTABILITY
-
This option specifies that the main program is not written in Fortran.
It is a link-time option that prevents the compiler from linking for_main.o
into applications.
For example, if the main program is written in C and calls a Fortran subprogram,
specify -nofor-main when compiling the program with the ifort command.
If you omit this option, the main program must be a Fortran program.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -nofor_main
- LDPORTABILITY
-
This option specifies that the main program is not written in Fortran.
It is a link-time option that prevents the compiler from linking for_main.o
into applications.
For example, if the main program is written in C and calls a Fortran subprogram,
specify -nofor-main when compiling the program with the ifort command.
If you omit this option, the main program must be a Fortran program.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
-
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
Peak Portability Flags
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -nofor_main
- LDPORTABILITY
-
This option specifies that the main program is not written in Fortran.
It is a link-time option that prevents the compiler from linking for_main.o
into applications.
For example, if the main program is written in C and calls a Fortran subprogram,
specify -nofor-main when compiling the program with the ifort command.
If you omit this option, the main program must be a Fortran program.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -nofor_main
- LDPORTABILITY
-
This option specifies that the main program is not written in Fortran.
It is a link-time option that prevents the compiler from linking for_main.o
into applications.
For example, if the main program is written in C and calls a Fortran subprogram,
specify -nofor-main when compiling the program with the ifort command.
If you omit this option, the main program must be a Fortran program.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -nofor_main
- LDPORTABILITY
-
This option specifies that the main program is not written in Fortran.
It is a link-time option that prevents the compiler from linking for_main.o
into applications.
For example, if the main program is written in C and calls a Fortran subprogram,
specify -nofor-main when compiling the program with the ifort command.
If you omit this option, the main program must be a Fortran program.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
-
-
- -DSPEC_CPU_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
Base Optimization Flags
-
- -xCORE-AVX2
- COPTIMIZE
-
Code is optimized for Intel(R) processors with support for AVX2 instructions.
The resulting code may contain unconditional use of features that are not supported
on other processors. This option also enables new optimizations in addition to
Intel processor-specific optimizations including advanced data layout and code
restructuring optimizations to improve memory accesses for Intel processors.
Do not use this option if you are executing a program on a processor that
is not an Intel processor. If you use this option on a non-compatible processor
to compile the main program (in Fortran) or the function main() in C/C++, the
program will display a fatal run-time error if they are executed on unsupported
processors.
-
-
- -O3
- COPTIMIZE
-
Enables O2 optimizations plus more aggressive optimizations,
such as prefetching, scalar replacement, and loop and memory
access transformations. Enables optimizations for maximum speed,
such as:
- Loop unrolling, including instruction scheduling
- Code replication to eliminate branches
- Padding the size of certain power-of-two arrays to allow
more efficient cache use.
On IA-32 and Intel EM64T processors, when O3 is used with options
-ax or -x (Linux) or with options /Qax or /Qx (Windows), the compiler
performs more aggressive data dependency analysis than for O2, which
may result in longer compilation times.
The O3 optimizations may not cause higher performance unless loop and
memory access transformations take place. The optimizations may slow
down code in some cases compared to O2 optimizations.
The O3 option is recommended for applications that have loops that heavily
use floating-point calculations and process large data sets.
- Includes:
-
- -no-prec-div
- COPTIMIZE
-
(disable/enable[default] -prec-div)
-no-prec-div enables optimizations that give slightly less precise results
than full IEEE division.
When you specify -no-prec-div along with some optimizations, such as
-xN and -xB (Linux) or /QxN and /QxB (Windows),
the compiler may change floating-point division computations into
multiplication by the reciprocal of the denominator.
For example, A/B is computed as A * (1/B) to improve the speed of the
computation.
However, sometimes the value produced by this transformation is
not as accurate as full IEEE division. When it is important to have fully
precise IEEE division, do not use -no-prec-div.
This will enable the default -prec-div and the result will be more accurate,
with some loss of performance.
-
- -parallel
- Yes
- COPTIMIZE
-
Tells the auto-parallelizer to generate multithreaded code for loops that can be safely executed in parallel.
To use this option, you must also specify option O2 or O3. The default numbers of threads spawned is equal to
the number of processors detected in the system where the binary is compiled. Can be changed by setting the
environment variable OMP_NUM_THREADS
-
-
- -xCORE-AVX2
- CXXOPTIMIZE
-
Code is optimized for Intel(R) processors with support for AVX2 instructions.
The resulting code may contain unconditional use of features that are not supported
on other processors. This option also enables new optimizations in addition to
Intel processor-specific optimizations including advanced data layout and code
restructuring optimizations to improve memory accesses for Intel processors.
Do not use this option if you are executing a program on a processor that
is not an Intel processor. If you use this option on a non-compatible processor
to compile the main program (in Fortran) or the function main() in C/C++, the
program will display a fatal run-time error if they are executed on unsupported
processors.
-
-
- -O3
- CXXOPTIMIZE
-
Enables O2 optimizations plus more aggressive optimizations,
such as prefetching, scalar replacement, and loop and memory
access transformations. Enables optimizations for maximum speed,
such as:
- Loop unrolling, including instruction scheduling
- Code replication to eliminate branches
- Padding the size of certain power-of-two arrays to allow
more efficient cache use.
On IA-32 and Intel EM64T processors, when O3 is used with options
-ax or -x (Linux) or with options /Qax or /Qx (Windows), the compiler
performs more aggressive data dependency analysis than for O2, which
may result in longer compilation times.
The O3 optimizations may not cause higher performance unless loop and
memory access transformations take place. The optimizations may slow
down code in some cases compared to O2 optimizations.
The O3 option is recommended for applications that have loops that heavily
use floating-point calculations and process large data sets.
- Includes:
-
- -no-prec-div
- CXXOPTIMIZE
-
(disable/enable[default] -prec-div)
-no-prec-div enables optimizations that give slightly less precise results
than full IEEE division.
When you specify -no-prec-div along with some optimizations, such as
-xN and -xB (Linux) or /QxN and /QxB (Windows),
the compiler may change floating-point division computations into
multiplication by the reciprocal of the denominator.
For example, A/B is computed as A * (1/B) to improve the speed of the
computation.
However, sometimes the value produced by this transformation is
not as accurate as full IEEE division. When it is important to have fully
precise IEEE division, do not use -no-prec-div.
This will enable the default -prec-div and the result will be more accurate,
with some loss of performance.
-
-
- -xCORE-AVX2
- FOPTIMIZE
-
Code is optimized for Intel(R) processors with support for AVX2 instructions.
The resulting code may contain unconditional use of features that are not supported
on other processors. This option also enables new optimizations in addition to
Intel processor-specific optimizations including advanced data layout and code
restructuring optimizations to improve memory accesses for Intel processors.
Do not use this option if you are executing a program on a processor that
is not an Intel processor. If you use this option on a non-compatible processor
to compile the main program (in Fortran) or the function main() in C/C++, the
program will display a fatal run-time error if they are executed on unsupported
processors.
-
-
- -O3
- FOPTIMIZE
-
Enables O2 optimizations plus more aggressive optimizations,
such as prefetching, scalar replacement, and loop and memory
access transformations. Enables optimizations for maximum speed,
such as:
- Loop unrolling, including instruction scheduling
- Code replication to eliminate branches
- Padding the size of certain power-of-two arrays to allow
more efficient cache use.
On IA-32 and Intel EM64T processors, when O3 is used with options
-ax or -x (Linux) or with options /Qax or /Qx (Windows), the compiler
performs more aggressive data dependency analysis than for O2, which
may result in longer compilation times.
The O3 optimizations may not cause higher performance unless loop and
memory access transformations take place. The optimizations may slow
down code in some cases compared to O2 optimizations.
The O3 option is recommended for applications that have loops that heavily
use floating-point calculations and process large data sets.
- Includes:
-
- -no-prec-div
- FOPTIMIZE
-
(disable/enable[default] -prec-div)
-no-prec-div enables optimizations that give slightly less precise results
than full IEEE division.
When you specify -no-prec-div along with some optimizations, such as
-xN and -xB (Linux) or /QxN and /QxB (Windows),
the compiler may change floating-point division computations into
multiplication by the reciprocal of the denominator.
For example, A/B is computed as A * (1/B) to improve the speed of the
computation.
However, sometimes the value produced by this transformation is
not as accurate as full IEEE division. When it is important to have fully
precise IEEE division, do not use -no-prec-div.
This will enable the default -prec-div and the result will be more accurate,
with some loss of performance.
-
- -parallel
- Yes
- FOPTIMIZE
-
Tells the auto-parallelizer to generate multithreaded code for loops that can be safely executed in parallel.
To use this option, you must also specify option O2 or O3. The default numbers of threads spawned is equal to
the number of processors detected in the system where the binary is compiled. Can be changed by setting the
environment variable OMP_NUM_THREADS
-
-
- -xCORE-AVX2
- COPTIMIZE, FOPTIMIZE
-
Code is optimized for Intel(R) processors with support for AVX2 instructions.
The resulting code may contain unconditional use of features that are not supported
on other processors. This option also enables new optimizations in addition to
Intel processor-specific optimizations including advanced data layout and code
restructuring optimizations to improve memory accesses for Intel processors.
Do not use this option if you are executing a program on a processor that
is not an Intel processor. If you use this option on a non-compatible processor
to compile the main program (in Fortran) or the function main() in C/C++, the
program will display a fatal run-time error if they are executed on unsupported
processors.
-
-
- -O3
- COPTIMIZE, FOPTIMIZE
-
Enables O2 optimizations plus more aggressive optimizations,
such as prefetching, scalar replacement, and loop and memory
access transformations. Enables optimizations for maximum speed,
such as:
- Loop unrolling, including instruction scheduling
- Code replication to eliminate branches
- Padding the size of certain power-of-two arrays to allow
more efficient cache use.
On IA-32 and Intel EM64T processors, when O3 is used with options
-ax or -x (Linux) or with options /Qax or /Qx (Windows), the compiler
performs more aggressive data dependency analysis than for O2, which
may result in longer compilation times.
The O3 optimizations may not cause higher performance unless loop and
memory access transformations take place. The optimizations may slow
down code in some cases compared to O2 optimizations.
The O3 option is recommended for applications that have loops that heavily
use floating-point calculations and process large data sets.
- Includes:
-
- -no-prec-div
- COPTIMIZE, FOPTIMIZE
-
(disable/enable[default] -prec-div)
-no-prec-div enables optimizations that give slightly less precise results
than full IEEE division.
When you specify -no-prec-div along with some optimizations, such as
-xN and -xB (Linux) or /QxN and /QxB (Windows),
the compiler may change floating-point division computations into
multiplication by the reciprocal of the denominator.
For example, A/B is computed as A * (1/B) to improve the speed of the
computation.
However, sometimes the value produced by this transformation is
not as accurate as full IEEE division. When it is important to have fully
precise IEEE division, do not use -no-prec-div.
This will enable the default -prec-div and the result will be more accurate,
with some loss of performance.
-
- -parallel
- Yes
- COPTIMIZE, FOPTIMIZE
-
Tells the auto-parallelizer to generate multithreaded code for loops that can be safely executed in parallel.
To use this option, you must also specify option O2 or O3. The default numbers of threads spawned is equal to
the number of processors detected in the system where the binary is compiled. Can be changed by setting the
environment variable OMP_NUM_THREADS
-
Peak Optimization Flags
-
- -prof-gen
- PASS1_CXXFLAGS, PASS1_LDFLAGS
-
Instrument program for profiling for the first phase of
two-phase profile guided otimization. This instrumentation gathers information
about a program's execution paths and data values but does not gather
information from hardware performance counters. The profile instrumentation
also gathers data for optimizations which are unique to profile-feedback
optimization.
-profgen:threadsafe option collects profile guided optimization data with
guards for threaded applications.
-
- -prof-use
- PASS2_CXXFLAGS, PASS2_LDFLAGS
-
Instructs the compiler to produce a profile-optimized
executable and merges available dynamic information (.dyn)
files into a pgopti.dpi file. If you perform multiple
executions of the instrumented program, -prof-use merges
the dynamic information files again and overwrites the
previous pgopti.dpi file.
Without any other options, the current directory is
searched for .dyn files
-
- -xCORE-AVX2
- PASS2_CXXFLAGS, PASS2_LDFLAGS
-
Code is optimized for Intel(R) processors with support for AVX2 instructions.
The resulting code may contain unconditional use of features that are not supported
on other processors. This option also enables new optimizations in addition to
Intel processor-specific optimizations including advanced data layout and code
restructuring optimizations to improve memory accesses for Intel processors.
Do not use this option if you are executing a program on a processor that
is not an Intel processor. If you use this option on a non-compatible processor
to compile the main program (in Fortran) or the function main() in C/C++, the
program will display a fatal run-time error if they are executed on unsupported
processors.
-
-
-
- -O3
- PASS2_CXXFLAGS, PASS2_LDFLAGS
-
Enables O2 optimizations plus more aggressive optimizations,
such as prefetching, scalar replacement, and loop and memory
access transformations. Enables optimizations for maximum speed,
such as:
- Loop unrolling, including instruction scheduling
- Code replication to eliminate branches
- Padding the size of certain power-of-two arrays to allow
more efficient cache use.
On IA-32 and Intel EM64T processors, when O3 is used with options
-ax or -x (Linux) or with options /Qax or /Qx (Windows), the compiler
performs more aggressive data dependency analysis than for O2, which
may result in longer compilation times.
The O3 optimizations may not cause higher performance unless loop and
memory access transformations take place. The optimizations may slow
down code in some cases compared to O2 optimizations.
The O3 option is recommended for applications that have loops that heavily
use floating-point calculations and process large data sets.
- Includes:
-
- -no-prec-div
- PASS2_CXXFLAGS, PASS2_LDFLAGS
-
(disable/enable[default] -prec-div)
-no-prec-div enables optimizations that give slightly less precise results
than full IEEE division.
When you specify -no-prec-div along with some optimizations, such as
-xN and -xB (Linux) or /QxN and /QxB (Windows),
the compiler may change floating-point division computations into
multiplication by the reciprocal of the denominator.
For example, A/B is computed as A * (1/B) to improve the speed of the
computation.
However, sometimes the value produced by this transformation is
not as accurate as full IEEE division. When it is important to have fully
precise IEEE division, do not use -no-prec-div.
This will enable the default -prec-div and the result will be more accurate,
with some loss of performance.
-
-
- -auto-ilp32
- CXXOPTIMIZE
-
This option instructs the compiler to analyze and transform the program so that
64-bit pointers are shrunk to 32-bit pointers, and 64-bit longs (on Linux) are
shrunk into 32-bit longs wherever it is legal and safe to do so.
In order for this option to be effective the compiler must be able to optimize using
the -ipo/-Qipo option and must be able to analyze all library/external calls the program makes.
This option requires that the size of the program executable never exceeds 2^32 bytes and all
data values can be represented within 32 bits. If the program can run correctly in a 32-bit system,
these requirements are implicitly satisfied. If the program violates these size restrictions,
unpredictable behavior might occur.
-
- -prof-gen
- PASS1_CXXFLAGS, PASS1_LDFLAGS
-
Instrument program for profiling for the first phase of
two-phase profile guided otimization. This instrumentation gathers information
about a program's execution paths and data values but does not gather
information from hardware performance counters. The profile instrumentation
also gathers data for optimizations which are unique to profile-feedback
optimization.
-profgen:threadsafe option collects profile guided optimization data with
guards for threaded applications.
-
- -prof-use
- PASS2_CXXFLAGS, PASS2_LDFLAGS
-
Instructs the compiler to produce a profile-optimized
executable and merges available dynamic information (.dyn)
files into a pgopti.dpi file. If you perform multiple
executions of the instrumented program, -prof-use merges
the dynamic information files again and overwrites the
previous pgopti.dpi file.
Without any other options, the current directory is
searched for .dyn files
-
- -xCORE-AVX2
- PASS2_CXXFLAGS, PASS2_LDFLAGS
-
Code is optimized for Intel(R) processors with support for AVX2 instructions.
The resulting code may contain unconditional use of features that are not supported
on other processors. This option also enables new optimizations in addition to
Intel processor-specific optimizations including advanced data layout and code
restructuring optimizations to improve memory accesses for Intel processors.
Do not use this option if you are executing a program on a processor that
is not an Intel processor. If you use this option on a non-compatible processor
to compile the main program (in Fortran) or the function main() in C/C++, the
program will display a fatal run-time error if they are executed on unsupported
processors.
-
-
-
- -O3
- PASS2_CXXFLAGS, PASS2_LDFLAGS
-
Enables O2 optimizations plus more aggressive optimizations,
such as prefetching, scalar replacement, and loop and memory
access transformations. Enables optimizations for maximum speed,
such as:
- Loop unrolling, including instruction scheduling
- Code replication to eliminate branches
- Padding the size of certain power-of-two arrays to allow
more efficient cache use.
On IA-32 and Intel EM64T processors, when O3 is used with options
-ax or -x (Linux) or with options /Qax or /Qx (Windows), the compiler
performs more aggressive data dependency analysis than for O2, which
may result in longer compilation times.
The O3 optimizations may not cause higher performance unless loop and
memory access transformations take place. The optimizations may slow
down code in some cases compared to O2 optimizations.
The O3 option is recommended for applications that have loops that heavily
use floating-point calculations and process large data sets.
- Includes:
-
- -no-prec-div
- PASS2_CXXFLAGS, PASS2_LDFLAGS
-
(disable/enable[default] -prec-div)
-no-prec-div enables optimizations that give slightly less precise results
than full IEEE division.
When you specify -no-prec-div along with some optimizations, such as
-xN and -xB (Linux) or /QxN and /QxB (Windows),
the compiler may change floating-point division computations into
multiplication by the reciprocal of the denominator.
For example, A/B is computed as A * (1/B) to improve the speed of the
computation.
However, sometimes the value produced by this transformation is
not as accurate as full IEEE division. When it is important to have fully
precise IEEE division, do not use -no-prec-div.
This will enable the default -prec-div and the result will be more accurate,
with some loss of performance.
-
-
-
- -prof-gen
- PASS1_FFLAGS, PASS1_LDFLAGS
-
Instrument program for profiling for the first phase of
two-phase profile guided otimization. This instrumentation gathers information
about a program's execution paths and data values but does not gather
information from hardware performance counters. The profile instrumentation
also gathers data for optimizations which are unique to profile-feedback
optimization.
-profgen:threadsafe option collects profile guided optimization data with
guards for threaded applications.
-
- -prof-use
- PASS2_FFLAGS, PASS2_LDFLAGS
-
Instructs the compiler to produce a profile-optimized
executable and merges available dynamic information (.dyn)
files into a pgopti.dpi file. If you perform multiple
executions of the instrumented program, -prof-use merges
the dynamic information files again and overwrites the
previous pgopti.dpi file.
Without any other options, the current directory is
searched for .dyn files
-
- -xCORE-AVX2
- PASS2_FFLAGS, PASS2_LDFLAGS
-
Code is optimized for Intel(R) processors with support for AVX2 instructions.
The resulting code may contain unconditional use of features that are not supported
on other processors. This option also enables new optimizations in addition to
Intel processor-specific optimizations including advanced data layout and code
restructuring optimizations to improve memory accesses for Intel processors.
Do not use this option if you are executing a program on a processor that
is not an Intel processor. If you use this option on a non-compatible processor
to compile the main program (in Fortran) or the function main() in C/C++, the
program will display a fatal run-time error if they are executed on unsupported
processors.
-
-
-
- -O3
- PASS2_FFLAGS, PASS2_LDFLAGS
-
Enables O2 optimizations plus more aggressive optimizations,
such as prefetching, scalar replacement, and loop and memory
access transformations. Enables optimizations for maximum speed,
such as:
- Loop unrolling, including instruction scheduling
- Code replication to eliminate branches
- Padding the size of certain power-of-two arrays to allow
more efficient cache use.
On IA-32 and Intel EM64T processors, when O3 is used with options
-ax or -x (Linux) or with options /Qax or /Qx (Windows), the compiler
performs more aggressive data dependency analysis than for O2, which
may result in longer compilation times.
The O3 optimizations may not cause higher performance unless loop and
memory access transformations take place. The optimizations may slow
down code in some cases compared to O2 optimizations.
The O3 option is recommended for applications that have loops that heavily
use floating-point calculations and process large data sets.
- Includes:
-
- -no-prec-div
- PASS2_FFLAGS, PASS2_LDFLAGS
-
(disable/enable[default] -prec-div)
-no-prec-div enables optimizations that give slightly less precise results
than full IEEE division.
When you specify -no-prec-div along with some optimizations, such as
-xN and -xB (Linux) or /QxN and /QxB (Windows),
the compiler may change floating-point division computations into
multiplication by the reciprocal of the denominator.
For example, A/B is computed as A * (1/B) to improve the speed of the
computation.
However, sometimes the value produced by this transformation is
not as accurate as full IEEE division. When it is important to have fully
precise IEEE division, do not use -no-prec-div.
This will enable the default -prec-div and the result will be more accurate,
with some loss of performance.
-
-
- -inline-level=0
- OPTIMIZE
-
Specifies the level of inline function expansion.
0 - Disables inlining of user-defined functions. Note that
statement functions are always inlined.
1 - Enables inlining when an inline keyword or an inline
attribute is specified. Also enables inlining according
to the C++ language.
2 - Enables inlining of any function at the compiler's
discretion.
-
-
- -prof-gen
- PASS1_FFLAGS, PASS1_LDFLAGS
-
Instrument program for profiling for the first phase of
two-phase profile guided otimization. This instrumentation gathers information
about a program's execution paths and data values but does not gather
information from hardware performance counters. The profile instrumentation
also gathers data for optimizations which are unique to profile-feedback
optimization.
-profgen:threadsafe option collects profile guided optimization data with
guards for threaded applications.
-
- -prof-use
- PASS2_FFLAGS, PASS2_LDFLAGS
-
Instructs the compiler to produce a profile-optimized
executable and merges available dynamic information (.dyn)
files into a pgopti.dpi file. If you perform multiple
executions of the instrumented program, -prof-use merges
the dynamic information files again and overwrites the
previous pgopti.dpi file.
Without any other options, the current directory is
searched for .dyn files
-
- -xCORE-AVX2
- PASS2_FFLAGS, PASS2_LDFLAGS
-
Code is optimized for Intel(R) processors with support for AVX2 instructions.
The resulting code may contain unconditional use of features that are not supported
on other processors. This option also enables new optimizations in addition to
Intel processor-specific optimizations including advanced data layout and code
restructuring optimizations to improve memory accesses for Intel processors.
Do not use this option if you are executing a program on a processor that
is not an Intel processor. If you use this option on a non-compatible processor
to compile the main program (in Fortran) or the function main() in C/C++, the
program will display a fatal run-time error if they are executed on unsupported
processors.
-
-
-
- -O3
- PASS2_FFLAGS, PASS2_LDFLAGS
-
Enables O2 optimizations plus more aggressive optimizations,
such as prefetching, scalar replacement, and loop and memory
access transformations. Enables optimizations for maximum speed,
such as:
- Loop unrolling, including instruction scheduling
- Code replication to eliminate branches
- Padding the size of certain power-of-two arrays to allow
more efficient cache use.
On IA-32 and Intel EM64T processors, when O3 is used with options
-ax or -x (Linux) or with options /Qax or /Qx (Windows), the compiler
performs more aggressive data dependency analysis than for O2, which
may result in longer compilation times.
The O3 optimizations may not cause higher performance unless loop and
memory access transformations take place. The optimizations may slow
down code in some cases compared to O2 optimizations.
The O3 option is recommended for applications that have loops that heavily
use floating-point calculations and process large data sets.
- Includes:
-
- -no-prec-div
- PASS2_FFLAGS, PASS2_LDFLAGS
-
(disable/enable[default] -prec-div)
-no-prec-div enables optimizations that give slightly less precise results
than full IEEE division.
When you specify -no-prec-div along with some optimizations, such as
-xN and -xB (Linux) or /QxN and /QxB (Windows),
the compiler may change floating-point division computations into
multiplication by the reciprocal of the denominator.
For example, A/B is computed as A * (1/B) to improve the speed of the
computation.
However, sometimes the value produced by this transformation is
not as accurate as full IEEE division. When it is important to have fully
precise IEEE division, do not use -no-prec-div.
This will enable the default -prec-div and the result will be more accurate,
with some loss of performance.
-
-
- -inline-level=0
- OPTIMIZE
-
Specifies the level of inline function expansion.
0 - Disables inlining of user-defined functions. Note that
statement functions are always inlined.
1 - Enables inlining when an inline keyword or an inline
attribute is specified. Also enables inlining according
to the C++ language.
2 - Enables inlining of any function at the compiler's
discretion.
-
-
- -parallel
- Yes
- OPTIMIZE
-
Tells the auto-parallelizer to generate multithreaded code for loops that can be safely executed in parallel.
To use this option, you must also specify option O2 or O3. The default numbers of threads spawned is equal to
the number of processors detected in the system where the binary is compiled. Can be changed by setting the
environment variable OMP_NUM_THREADS
-
- -prof-gen
- PASS1_FFLAGS, PASS1_LDFLAGS
-
Instrument program for profiling for the first phase of
two-phase profile guided otimization. This instrumentation gathers information
about a program's execution paths and data values but does not gather
information from hardware performance counters. The profile instrumentation
also gathers data for optimizations which are unique to profile-feedback
optimization.
-profgen:threadsafe option collects profile guided optimization data with
guards for threaded applications.
-
- -prof-use
- PASS2_FFLAGS, PASS2_LDFLAGS
-
Instructs the compiler to produce a profile-optimized
executable and merges available dynamic information (.dyn)
files into a pgopti.dpi file. If you perform multiple
executions of the instrumented program, -prof-use merges
the dynamic information files again and overwrites the
previous pgopti.dpi file.
Without any other options, the current directory is
searched for .dyn files
-
- -xCORE-AVX2
- PASS2_FFLAGS, PASS2_LDFLAGS
-
Code is optimized for Intel(R) processors with support for AVX2 instructions.
The resulting code may contain unconditional use of features that are not supported
on other processors. This option also enables new optimizations in addition to
Intel processor-specific optimizations including advanced data layout and code
restructuring optimizations to improve memory accesses for Intel processors.
Do not use this option if you are executing a program on a processor that
is not an Intel processor. If you use this option on a non-compatible processor
to compile the main program (in Fortran) or the function main() in C/C++, the
program will display a fatal run-time error if they are executed on unsupported
processors.
-
-
-
- -O3
- PASS2_FFLAGS, PASS2_LDFLAGS
-
Enables O2 optimizations plus more aggressive optimizations,
such as prefetching, scalar replacement, and loop and memory
access transformations. Enables optimizations for maximum speed,
such as:
- Loop unrolling, including instruction scheduling
- Code replication to eliminate branches
- Padding the size of certain power-of-two arrays to allow
more efficient cache use.
On IA-32 and Intel EM64T processors, when O3 is used with options
-ax or -x (Linux) or with options /Qax or /Qx (Windows), the compiler
performs more aggressive data dependency analysis than for O2, which
may result in longer compilation times.
The O3 optimizations may not cause higher performance unless loop and
memory access transformations take place. The optimizations may slow
down code in some cases compared to O2 optimizations.
The O3 option is recommended for applications that have loops that heavily
use floating-point calculations and process large data sets.
- Includes:
-
- -no-prec-div
- PASS2_FFLAGS, PASS2_LDFLAGS
-
(disable/enable[default] -prec-div)
-no-prec-div enables optimizations that give slightly less precise results
than full IEEE division.
When you specify -no-prec-div along with some optimizations, such as
-xN and -xB (Linux) or /QxN and /QxB (Windows),
the compiler may change floating-point division computations into
multiplication by the reciprocal of the denominator.
For example, A/B is computed as A * (1/B) to improve the speed of the
computation.
However, sometimes the value produced by this transformation is
not as accurate as full IEEE division. When it is important to have fully
precise IEEE division, do not use -no-prec-div.
This will enable the default -prec-div and the result will be more accurate,
with some loss of performance.
-
-
- -qopt-malloc-options=3
- OPTIMIZE
-
The compiler adds setup code in the C/C++/Fortran main function to enable optimal malloc algorithms:
- n=0: Default, no changes to the malloc options. No call to mallopt() is made.
- n=1: M_MMAP_MAX=2 and M_TRIM_THRESHOLD=0x10000000. Call mallopt with the two settings.
- n=2: M_MMAP_MAX=2 and M_TRIM_THRESHOLD=0x40000000. Call mallopt with these two settings.
- n=3: M_MMAP_MAX=0 and M_TRIM_THRESHOLD=-1. Call mallopt with these two settings. This
will cause use of sbrk() calls instead of mmap() calls to get memory from the system.
The two parameters, M_MMAP_MAX and M_TRIM_THRESHOLD, are described below
Function: int mallopt (int param, int value) When calling mallopt, the param argument
specifies the parameter to be set, and value the new value to be set. Possible choices
for param, as defined in malloc.h, are:
- M_TRIM_THRESHOLD This is the minimum size (in bytes) of the top-most, releasable chunk
that will cause sbrk to be called with a negative argument in order to return memory
to the system.
- M_TOP_PAD This parameter determines the amount of extra memory to obtain from the system
when a call to sbrk is required. It also specifies the number of bytes to retain when
shrinking the heap by calling sbrk with a negative argument. This provides the necessary
hysteresis in heap size such that excessive amounts of system calls can be avoided.
- M_MMAP_THRESHOLD All chunks larger than this value are allocated outside the normal heap,
using the mmap system call. This way it is guaranteed that the memory for these chunks
can be returned to the system on free. Note that requests smaller than this threshold
might still be allocated via mmap.
- M_MMAP_MAX The maximum number of chunks to allocate
with mmap. Setting this to zero disables all use of mmap.
-
-
-
- -xCORE-AVX2
- OPTIMIZE
-
Code is optimized for Intel(R) processors with support for AVX2 instructions.
The resulting code may contain unconditional use of features that are not supported
on other processors. This option also enables new optimizations in addition to
Intel processor-specific optimizations including advanced data layout and code
restructuring optimizations to improve memory accesses for Intel processors.
Do not use this option if you are executing a program on a processor that
is not an Intel processor. If you use this option on a non-compatible processor
to compile the main program (in Fortran) or the function main() in C/C++, the
program will display a fatal run-time error if they are executed on unsupported
processors.
-
-
- -O3
- OPTIMIZE
-
Enables O2 optimizations plus more aggressive optimizations,
such as prefetching, scalar replacement, and loop and memory
access transformations. Enables optimizations for maximum speed,
such as:
- Loop unrolling, including instruction scheduling
- Code replication to eliminate branches
- Padding the size of certain power-of-two arrays to allow
more efficient cache use.
On IA-32 and Intel EM64T processors, when O3 is used with options
-ax or -x (Linux) or with options /Qax or /Qx (Windows), the compiler
performs more aggressive data dependency analysis than for O2, which
may result in longer compilation times.
The O3 optimizations may not cause higher performance unless loop and
memory access transformations take place. The optimizations may slow
down code in some cases compared to O2 optimizations.
The O3 option is recommended for applications that have loops that heavily
use floating-point calculations and process large data sets.
- Includes:
-
- -no-prec-div
- OPTIMIZE
-
(disable/enable[default] -prec-div)
-no-prec-div enables optimizations that give slightly less precise results
than full IEEE division.
When you specify -no-prec-div along with some optimizations, such as
-xN and -xB (Linux) or /QxN and /QxB (Windows),
the compiler may change floating-point division computations into
multiplication by the reciprocal of the denominator.
For example, A/B is computed as A * (1/B) to improve the speed of the
computation.
However, sometimes the value produced by this transformation is
not as accurate as full IEEE division. When it is important to have fully
precise IEEE division, do not use -no-prec-div.
This will enable the default -prec-div and the result will be more accurate,
with some loss of performance.
-
- -auto-ilp32
- COPTIMIZE
-
This option instructs the compiler to analyze and transform the program so that
64-bit pointers are shrunk to 32-bit pointers, and 64-bit longs (on Linux) are
shrunk into 32-bit longs wherever it is legal and safe to do so.
In order for this option to be effective the compiler must be able to optimize using
the -ipo/-Qipo option and must be able to analyze all library/external calls the program makes.
This option requires that the size of the program executable never exceeds 2^32 bytes and all
data values can be represented within 32 bits. If the program can run correctly in a 32-bit system,
these requirements are implicitly satisfied. If the program violates these size restrictions,
unpredictable behavior might occur.
Implicitly Included Flags
This section contains descriptions of flags that were included implicitly
by other flags, but which do not have a permanent home at SPEC.
-
- -O2
-
Enables optimizations for speed. This is the generally recommended
optimization level. This option also enables:
- Inlining of intrinsics
- Intra-file interprocedural optimizations, which include:
- inlining
- constant propagation
- forward substitution
- routine attribute propagation
- variable address-taken analysis
- dead static function elimination
- removal of unreferenced variables
- The following capabilities for performance gain:
- constant propagation
- copy propagation
- dead-code elimination
- global register allocation
- global instruction scheduling and control speculation
- loop unrolling
- optimized code selection
- partial redundancy elimination
- strength reduction/induction variable simplification
- variable renaming
- exception handling optimizations
- tail recursions
- peephole optimizations
- structure assignment lowering and optimizations
- dead store elimination
- Includes:
-
- -O1
-
Enables optimizations for speed and disables some optimizations that increase code size and affect speed.
To limit code size, this option:
- Enables global optimization; this includes data-flow analysis,
code motion, strength reduction and test replacement, split-lifetime
analysis, and instruction scheduling.
- Disables intrinsic recognition and intrinsics inlining.
The O1 option may improve performance for applications with very large
code size, many branches, and execution time not dominated by code within loops.
-O1 sets the following options:
-funroll-loops0, -fno-builtin, -mno-ieee-fp, -fomit-framepointer, -ffunction-sections, -ftz
- Includes:
-
-
-
-
-
-
- submit= MYMASK=`printf '0x%x' $((1<<$SPECCOPYNUM))`; /usr/bin/taskset $MYMASK $command
- When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to
specific processors. This specific submit command, using taskset, is used for Linux64 systems without numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:
- /usr/bin/taskset [options] [mask] [pid | command [arg] ... ]:
taskset is used to set or retreive the CPU affinity of a running
process given its PID or to launch a new COMMAND with a given CPU
affinity. The CPU affinity is represented as a bitmask, with the
lowest order bit corresponding to the first logical CPU and highest
order bit corresponding to the last logical CPU. When the taskset
returns, it is guaranteed that the given program has been scheduled
to a specific, legal CPU, as defined by the mask setting.
- [mask]: The bitmask (in hexadecimal) corresponding to a specific
SPECCOPYNUM. The specific example above, computes this mask value in the variable $MYMASK.
The value of this mask for the first copy of a
rate run will be 0x00000001, for the second copy of the rate will
be 0x00000002 etc. Thus, the first copy of the rate run will have a
CPU affinity of CPU0, the second copy will have the affinity CPU1
etc.
- $command: Program to be started, in this case, the benchmark instance to be started.
- submit= numactl --localalloc --physcpubind=$SPECCOPYNUM $command
- When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to
specific processors. This specific submit command is used for Linux64 systems with support for numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:
- syntax: numactl [--interleave=nodes] [--preferred=node] [--physcpubind=cpus] [--cpunodebind=nodes] [--membind=nodes] [--localalloc] command args ...
- numactl runs processes with a specific NUMA scheduling or memory placement policy. The policy is set for a command and inherited by all of its children.
- "--localalloc" instructs numactl to keep a process memory on the local node while "-m" specifies which node(s) to place a process memory.
- "--physcpubind" specifies which core(s) to bind the process. In this case, copy 0 is bound to processor 0 etc.
- For full details on using numactl, please refer to your Linux documentation, 'man numactl'
- numactl --interleave=all "runspec command"
- Launching a process with numactl --interleave=all sets the memory interleave policy so that memory will be allocated using round robin on nodes.
When memory cannot be allocated on the current interleave target fall back to other nodes.
- KMP_STACKSIZE
- Specify stack size to be allocated for each thread.
- KMP_AFFINITY
- Syntax: KMP_AFFINITY=[<modifier>,...]<type>[,<permute>][,<offset>]
The value for the environment variable KMP_AFFINITY affects how the threads from an auto-parallelized program are scheduled across processors.
It applies to binaries built with -qopenmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows).
modifier:
granularity=fine Causes each OpenMP thread to be bound to a single thread context.
type:
compact Specifying compact assigns the OpenMP thread <n>+1 to a free thread context as close as possible to the thread context where the <n> OpenMP thread was placed.
scatter Specifying scatter distributes the threads as evenly as possible across the entire system.
permute: The permute specifier is an integer value controls which levels are most significant when sorting the machine topology map. A value for permute forces the mappings to make the specified number of most significant levels of the sort the least significant, and it inverts the order of significance.
offset: The offset specifier indicates the starting position for thread assignment.
Please see the Thread Affinity Interface article in the Intel Composer XE Documentation for more details.
- Example: KMP_AFFINITY=granularity=fine,scatter
Specifying granularity=fine selects the finest granularity level and causes each OpenMP or auto-par thread to be bound to a single thread context.
This ensures that there is only one thread per core on cores supporting HyperThreading Technology
Specifying scatter distributes the threads as evenly as possible across the entire system.
Hence a combination of these two options, will spread the threads evenly across sockets, with one thread per physical core.
- Example: KMP_AFFINITY=compact,1,0
Specifying compact will assign the n+1 thread to a free thread context as close as possible to thread n.
A default granularity=core is implied if no granularity is explicitly specified.
Specifying 1,0 sets permute and offset values of the thread assignment.
With a permute value of 1, thread n+1 is assigned to a consecutive core. With an offset of 0, the process's first thread 0 will be assigned to thread 0.
The same behavior is exhibited in a multisocket system.
- OMP_NUM_THREADS
- Sets the maximum number of threads to use for OpenMP* parallel regions if no
other value is specified in the application. This environment variable
applies to both -qopenmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows).
Example syntax on a Linux system with 8 cores:
export OMP_NUM_THREADS=8
- Set stack size to unlimited
- The command "ulimit -s unlimited" is used to set the stack size limit to unlimited.
- Free the file system page cache
- The command "echo 1> /proc/sys/vm/drop_caches" is used to free up the filesystem page cache.
Red Hat Specific features
- Transparent Huge Pages
- On RedHat EL 6 and later, Transparent Hugepages increase the memory page size from 4 kilobytes to 2 megabytes. Transparent Hugepages provide significant performance advantages on systems with highly contended resources and large memory workloads.
If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller 4k pages instead.
Hugepages are used by default unless the /sys/kernel/mm/redhat_transparent_hugepage/enabled field is changed from its RedHat EL6 default of 'always'.
OS Tuning
Drive Write Cache
The Drive Write Cache is an option that can be enabled or disabled in the HP Array Configuration Utility, CLI version. The default value for the Drive Write Cache is set to Disabled, and in order to change this the HP Array Configuration Utility, CLI version needs to be installed. When the Drive Write Cache option is enabled on a HP Smart Array Controller in a system, it can allow the HP Smart Array Controller to help make drive writes more efficient.
Accelerator Ratio
The Accelerator Ratio is an option that can be set to different percentages (in 25% increments) in the HP Array Configuration Utility, CLI version. The default value for the Accelerator Ratio is set to 0% Read and 100% Write. In order to change this the HP Array Configuration Utility, CLI version needs to be installed. Changing the Accelerator Ratio allows the array installed on the HP Smart Array Controller to adjust how the priority of reads and writes.
ulimit -s [n | unlimited] (Linux)
Sets the stack size to n kbytes, or unlimited to allow the stack size to grow without limit.
vm.max_map_count-n (Linux)
The maximum number of memory map areas a process may have. Memory map areas are used as a side-effect of calling malloc, directly by mmap and mprotect, and also when loading shared libraries.
Zone Reclaim:
Zone reclaim allows the reclaiming of pages from a zone if the number of free pages falls below a watermark even if other zones still have enough pages available. Reclaiming a page can be more beneficial than taking the performance penalties that are associated with allocating a page on a remote zone, especially for NUMA machines.
Disabled unused Linux services via stop_services.sh script.
The following unused Linux services were disabled before the run in simple shell scirpt via the command "service {name} stop":
abrt-ccpp, abrt-oops, abrtd, acpid, atd, auditd, autofs, avahi-daemon, cgconfig, cpuspeed, crond, cups, haldaemon, irqbalance, kdump, libvirt-guests, mcelogd, mdmonitor, messagebus, portreserve, postfix, rhnsd, rhsmcertd, rpcbind, rpcgssd, rpcidmapd, certmonger, lvm2-monitor, netfs, and sysstat.
Firmware Settings
One or more of the following settings may have been set. If so, the "Platform Notes" section of the
report will say so; and you can read below to find out more about what these settings mean.
Intel Hyperthreading Options (Default = Enabled):
This feature allows enabling/disabling of logical processor cores on processors supporting Intel's Hyperthreading Technology. When enabled,
each physical processor core operates as two logical processor cores. When disabled, each physical core operates as only one logical processor
core. Enabling this option can improve overall performance for applications that benefit from a higher processor core count.
HP Power Profile (Default = Balanced Power and Performance):
Values for this BIOS setting can be:
- Balanced Power and Performance: Provides the optimum settings to maximize power savings with minimal impact to performance for most
operating systems and applications.
- Minimum Power Usage: Enables power reduction mechanisms that may negatively affect performance. This mode guarantees a lower maximum power usage by the system.
- Maximum Performance: Disables all power management options that may negatively affect performance.
- Custom:Allows the user to customize power management options independent of the defaults that each preset Power Profile sets.
HP Power Regulator (Default = HP Dynamic Power Savings Mode)
This option can only be configured if the HP Power Profile is set to Custom. Values for this BIOS setting can be:
- HP Dynamic Power Savings Mode: Automatically varies processor speed and power usage based on processor utilization. Allows reducing
overall power consumption with little or no impact to performance. Does not require OS support.
- HP Static Low Power Mode: Reduces processor speed and power usage. Guarantees a lower maximum power usage for the system. Performance impacts will be greater for environments with higher processor utilization.
- HP Static High Performance Mode: Processors will run in their maximum power/performance state at all times regardless of the OS power management policy.
- OS Control Mode: Processors will run in their maximum power performance state at all times unless the OS enables a power management policy.
Minimum Processor Idle Power Core C-State (Default = C6 State):
This option can only be configured if the HP Power Profile is set to Custom. This feature selects the processor's lowest idle core power state
(C-state) that the operating system uses. The higher the C-state, the lower the power usage of that idle state (C6 is the lowest power idle state supported by the processor). Values for this setting can be:
- C6 State: While in C6, the core PLLs are turned off, the core caches are flushed and the core state is saved to the Last Level Cache. Power Gates are used to reduce power consumption to close to zero. C6 is considered an inactive core.
- C3 State: While in C3 the core PLLs are turned off, and all the core caches are flushed. C3 is considered an inactive core.
- C1E State: C1E is defined as the enhanced halt state. While in C1E no instructions are being executed. C1E considered an active core.
- No C-states: No C-states is defined as C0, which is defined as the active state. While in C0, instructions are being executed by the core.
Minimum Processor Idle Power Package C-State (Default = Package C6(retention) State):
This option can only be configured if the HP Power Profile is set to Custom. This feature selects the processor's lowest idle package power state (C-state) that is enabled. The processor will automatically transition into the package C-states based on the Core C-states, in which cores on the processor have transitioned. The higher the package C-state, the lower the power usage of that idle package state (Package C6(retention) is the lowed power idle package state supported by the processor). Values for this setting can be:
- Package C6 (retention) State: All cores have saved their architectural state and have had their core voltages reduced to zero volts. The LLC retains context, but no accesses can be made to the LLC in this state, the cores must break out to the internal state package C2 for snoops to occur.
- Package C6 (non-retention) State: All cores have saved their architectural state and have had their core voltages reduced to zero volts. The LLC does not retain context, and no accesses can be made to the LLC in this state, the cores must break out to the internal state package C2 for snoops to occur.
- No Package State: All cores are in an active state and have not entered any power saving state.
Energy/Performance Bias (Default = Balanced Performance):
This option can only be configured if the HP Power Profile is set to Custom. This option configures several processor subsystems to optimize the processor's performance and power usage. Values for this BIOS setting can be:
- Balanced Performance: Provides optimum performance efficiency and is recommended for most environments.
- Maximum Performance Mode: Should be used for environments that require the highes performance and lowest latency but are not sensitive to power consumption.
- Balanced Power: Provides optimum power efficiency
- Power Savings Mode: Should only be used in environments that are power sensitive and are willing to accept reduced performance.
Collaborative Power Control (Default = Enabled):
This BIOS option allows the enabling/disabling of the Processor Clocking Control (PCC) Interface, for operating systems which support this feature. Enabling this option allows the Operating System to request processor frequency changes even when the server has the Power Regulator option configured for Dynamic Power Savings Mode.
For Operating Systems that do not support the PCC Interface or when the Power Regulator Mode is not configured for Dynamic Power Savings Mode, his option has no impact on system operation.
QPI Snoop Configuration (Default = Home Snoop):
This option allows the user to choose the snoop mode used by the processor and QPI (Quick Path Interconnect) bus. Snooping is a process where the individual caches monitor address lines for accesses to memory locations that have cached. Changing this option can have an impact on memory performance. The performance of various workloads will vary depending on the mode selected and the order in which they are listed here does not reflect any technical ordering or ranking. The order seen here reflects the order as currently seen in the BIOS. Values for this setting can be:
- Home Snoop: The snoop is always spawned by the home agent in this mode. This mode is best for workloads that are bandwidth sensitive and need maximum local and remote memory bandwidth. This mode provides high memory bandwidth in an average NUMA environment.
- Early Snoop: Since the snoop is sent from the caching agent, this mode has lower latency vs. Home Snoop mode. This mode is best for workloads that are latency sensitive, or workloads that benefit from fast cache-to-cache transfer latencies from the remote socket. This mode will decrease memory latency but may also result in lower overall bandwidth as compared to the other modes.
- Cluster on Die: This mode logically splits a socket into 2 NUMA domains that are exposed to the OS. Each NUMA domain has half the cores, last level cache and one home agent with an equal number of cache slices in each NUMA domain. A directory cache in the home agent is used along with in memory directory bits to determine whether a snoop needs to be sent from the home agent. This mode has the best local latency and local memory bandwidth and is best for highly NUMA optimized workloads. This mode reduces average last level cache hit and local memory latencies.
Although selectable in unsupported configurations, Cluster on Die will be set and occur only when a system has one socket and two socket processors SKUs with two Home Agents (ex. E5-2600 v3 processors with 10+ cores). On an HP ProLiant Gen9 system, when selecting Cluster on Die with a processor that doesn't support this mode, the QPI Snoop Configuration will fall back to Home Snoop.
NUMA Group Size Optimization (Default = Clustered):
This feature allows the user to configure how the BIOS reports the size of a NUMA node (number of logical processors), which assists the Operating System in grouping processors for application use (referred to as Kgroups). Values for this BIOS option can be:
- Clustered: Might provide better performance for some workloads due to optimizing the resulting groups along NUMA boundaries.
- Flat: Might provide better performance for some workloads that cannot take advantage of processors spanning multiple groups. This setting would be necessary to help this class of applications utilize more logical processors.
Thermal Configuration (Default = Optimal Cooling):
This feature allows the user to select the fan cooling solution for the system. Values for this BIOS option can be:
- Optimal Cooling: Provides the most efficient solution by configuring fan speeds to the minimum required to provide adequate cooling.
- Increased Cooling: Will run fans at higher speeds to provide additional cooling. Increased Cooling should be selected when non-HP storage controllers are cabled to the embedded hard drive cage, or if the system is experiencing thermal issues that cannot be resolved in another manner.
- Maximum Cooling: Will provide the maximum cooling available by this platform.
Processor Power and Utilization Monitoring (Default = Enabled):
This BIOS option allows the enabling/disabling of iLo Processor State Mode Switching and Insight Power Management Processor Utilization Monitoring.
When set to disabled, the system will also set the HP Power Regulator mode to HP Static High Performance mode and the HP Power Profile mode to Custom. This option may be useful in some environments that require absolute minimum latency.
Memory Patrol Scrubbing (Default = Enabled):
This BIOS option allows the enabling/disabling of Memory Periodic Patrol Scrubber. The Memory Periodic Patrol Scrubber corrects memory soft errors so that, over the length of the system runtime, the risk of producing multi-bit and uncorrectable errors is reduced.
Memory Refresh Rate (Default = 2x Refresh):
This BIOS option controls the refresh rate of the memory controller and may affect the performance and resiliency of the servers memory.
When set to 1x Refresh, the memory refresh rate will be decreased, the HP Power Regulator mode will be set to HP Static High Performance mode, and the HP Power Profile mode to Custom. This option may be useful in some environments that require absolute minimum latency.
When set to 3x Refresh, the memory refresh rate will be increased, the HP Power Regulator mode will be set to HP Static High Performance mode, and the HP Power Profile mode to Custom.
Last updated October 17th, 2014.
For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2017 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.2.
Report generated on Wed Jul 12 12:12:59 2017 by SPEC CPU2006 flags formatter v6906.
![[benchmark]](http://www.spec.org/auto/cpu2006/flags/benchmark.png)