Compilers |
Oracle Developer Studio 12.6
|
---|---|
Operating systems: | Solaris 10 and 11 |
Copyright: |
The text for many of the descriptions below was excerpted from the Oracle Developer Studio Compiler Documentation, which is copyright © 2016 Oracle Corporation. The original documentation can be found at http://docs.oracle.com/. |
Invoke the Oracle Developer Studio C Compiler.
Invoke the Oracle Developer Studio C++ Compiler
Invoke the Oracle Developer Studio C Compiler.
Invoke the Oracle Developer Studio C++ Compiler
This macro indicates that the benchmark is being compiled on a SPARC/Solaris system.
SPEC_CPU_SOLARIS is used so that SUN submitters don't have to bother specifying SPEC_CPU_HAVE_BOOL. It sets HAVE__BOOL, and also includes alloca.h.
Enables portability changes for Solaris
This flag can be set for SPEC compilation for Solaris using default compiler.
This macro indicates that the benchmark is being compiled on a SPARC/Solaris system.
SPEC_CPU_SOLARIS is used so that SUN submitters don't have to bother specifying SPEC_CPU_HAVE_BOOL. It sets HAVE__BOOL, and also includes alloca.h.
Enables portability changes for Solaris
This flag can be set for SPEC compilation for Solaris using default compiler.
Selects the C language dialect.
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
A convenience option, this switch selects several other options that are described in this file.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
A convenience option, this switch selects several other options that are described in this file.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Allows the compiler to perform type-based alias analysis:
Use STLport's Standard Library implementation instead of the default libCstd.
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Selects the C language dialect.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
A convenience option, this switch selects several other options that are described in this file.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Set the preferred page size for running the program.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Treat pointer-valued function parameters as restricted pointers.
Control generation of prefetch instructions.
(Explicit prefetch macros are not used in the source code of the SPEC CPU2006 benchmarks; therefore, in the context of CPU2006, -xprefetch=yes is effectively a synonym for -xprefetch=auto.)
Specify optimization level n:
[code generator flag]
Do function entry alignment at n-byte boundaries.
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Selects the C language dialect.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
A convenience option, this switch selects several other options that are described in this file.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Set the preferred page size for running the program.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Control generation of prefetch instructions.
(Explicit prefetch macros are not used in the source code of the SPEC CPU2006 benchmarks; therefore, in the context of CPU2006, -xprefetch=yes is effectively a synonym for -xprefetch=auto.)
[code generator flag]
Do function entry alignment at n-byte boundaries.
[code generator flag]
Turn on optimization to reduce branch after branch penalty: nops will be inserted to prevent one branch from occupying the delay slot of another branch.
Use this option to manually change the heuristics used by the compiler for deciding when to inline a function call.
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Selects the C language dialect.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
A convenience option, this switch selects several other options that are described in this file.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Set the preferred page size for running the program.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Specify optimization level n:
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Control generation of prefetch instructions.
(Explicit prefetch macros are not used in the source code of the SPEC CPU2006 benchmarks; therefore, in the context of CPU2006, -xprefetch=yes is effectively a synonym for -xprefetch=auto.)
[code generator flag]
Do function entry alignment at n-byte boundaries.
xcache defines the cache properties for use by the optimizer. It can specify use of default assumptions ("generic"); use of whatever the compiler can assume about the current platform ("native"); or an explicit description of up to three levels of cache, using colon-separated specifiers of the form si/li/ai[/ti], where:
Allows the compiler to perform type-based alias analysis at the specified alias level:
Selects the C language dialect.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
A convenience option, this switch selects several other options that are described in this file.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Set the preferred page size for running the program.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Structure Array Contraction reduces strides in a hot loop accessing a big array. This is done by collecting only the hot fields into a new structure and rearranging the dimensions in the new array (of the new structure) to minimize stride width, e.g. a[x][y] to a[y][x]
[code generator flag]
Do function entry alignment at n-byte boundaries.
Selects the C language dialect.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
A convenience option, this switch selects several other options that are described in this file.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Set the preferred page size for running the program.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Specify optimization level n:
Allows the compiler to perform type-based alias analysis at the specified alias level:
Treat pointer-valued function parameters as restricted pointers.
Control generation of prefetch instructions.
(Explicit prefetch macros are not used in the source code of the SPEC CPU2006 benchmarks; therefore, in the context of CPU2006, -xprefetch=yes is effectively a synonym for -xprefetch=auto.)
[code generator flag]
Do function entry alignment at n-byte boundaries.
[code generator flag]
Sets the aggressiveness of the trace formation, where n is 4, 5, or 6. The higher the value of n, the lower the branch probability needed to include a basic block in a trace.
Selects the C language dialect.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
A convenience option, this switch selects several other options that are described in this file.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Set the preferred page size for running the program.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Enable unrolling loops n times where possible.
[code generator flag]
Disable prefetching within modulo scheduling (used in software pipelining).
[code generator flag]
Do function entry alignment at n-byte boundaries.
xcache defines the cache properties for use by the optimizer. It can specify use of default assumptions ("generic"); use of whatever the compiler can assume about the current platform ("native"); or an explicit description of up to three levels of cache, using colon-separated specifiers of the form si/li/ai[/ti], where:
Selects the C language dialect.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
A convenience option, this switch selects several other options that are described in this file.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Set the preferred page size for running the program.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Specify optimization level n:
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Enable unrolling loops n times where possible.
[code generator flag]
Do function entry alignment at n-byte boundaries.
[optimizer]
Do aggressive loop fully unrolling based on the size and trip count of the loop.
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Do not perform any of the runtime check for stack overflow of the main thread in a singly-threaded program as well as slave-thread stacks in a multi-threaded program.
Selects the C language dialect.
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
A convenience option, this switch selects several other options that are described in this file.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Set the preferred page size for running the program.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Specifies the LP64 model: 32-bit ints, 64-bit longs and pointers types.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
xcache defines the cache properties for use by the optimizer. It can specify use of default assumptions ("generic"); use of whatever the compiler can assume about the current platform ("native"); or an explicit description of up to three levels of cache, using colon-separated specifiers of the form si/li/ai[/ti], where:
Use this option to manually change the heuristics used by the compiler for deciding when to inline a function call.
[code generator flag]
Do function entry alignment at n-byte boundaries.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Selects the C language dialect.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
A convenience option, this switch selects several other options that are described in this file.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Set the preferred page size for running the program.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
[code generator flag]
Do function entry alignment at n-byte boundaries.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Do not perform any of the runtime check for stack overflow of the main thread in a singly-threaded program as well as slave-thread stacks in a multi-threaded program.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
A convenience option, this switch selects several other options that are described in this file.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Set the preferred page size for running the program.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Allows the compiler to perform type-based alias analysis:
Enable unrolling loops n times where possible.
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Oracle Developer Studio C and Oracle Developer Studio C++ is 1. The default for Oracle Developer Studio Fortran is 2.
Structure Array Contraction reduces strides in a hot loop accessing a big array. This is done by collecting only the hot fields into a new structure and rearranging the dimensions in the new array (of the new structure) to minimize stride width, e.g. a[x][y] to a[y][x]
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
A convenience option, this switch selects several other options that are described in this file.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Set the preferred page size for running the program.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Allows the compiler to perform type-based alias analysis:
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Enable unrolling loops n times where possible.
Treat pointer-valued function parameters as restricted pointers.
[code generator flag]
Do function entry alignment at n-byte boundaries.
[code generator flag]
Sets the aggressiveness of the trace formation, where n is 4, 5, or 6. The higher the value of n, the lower the branch probability needed to include a basic block in a trace.
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
Specifies the ILP32 model: 32-bit ints, longs, and pointer types.
A convenience option, this switch selects several other options that are described in this file.
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Set the preferred page size for running the program.
Causes the driver to include a special mapfile on the link line. The mapfile aligns the text, data, and bss segments to the value specified by n.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Allows the compiler to perform type-based alias analysis:
Analyze loops for inter-iteration data dependencies, and do loop restructuring. Loop restructuring includes loop interchange, loop fusion, scalar replacement, and elimination of "dead" array assignments.
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Oracle Developer Studio C and Oracle Developer Studio C++ is 1. The default for Oracle Developer Studio Fortran is 2.
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Use STLport's Standard Library implementation instead of the default libCstd.
Structure Array Contraction reduces strides in a hot loop accessing a big array. This is done by collecting only the hot fields into a new structure and rearranging the dimensions in the new array (of the new structure) to minimize stride width, e.g. a[x][y] to a[y][x]
[code generator flag]
Do function entry alignment at n-byte boundaries.
The compiler's treatment of extern inline functions conforms by default to the behavior specified by the ISO/IEC 9899:1999 C standard.
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Specify the -xjobs option to set how many processes the compiler creates to complete its work. Currently, -xjobs works only with the -xipo option. When you specify -xjobs=n, the interprocedural optimizer uses n as the maximum number of code generator instances it can invoke to compile different files.
Specify the -xjobs option to set how many processes the compiler creates to complete its work. Currently, -xjobs works only with the -xipo option. When you specify -xjobs=n, the interprocedural optimizer uses n as the maximum number of code generator instances it can invoke to compile different files.
Specify the -xjobs option to set how many processes the compiler creates to complete its work. Currently, -xjobs works only with the -xipo option. When you specify -xjobs=n, the interprocedural optimizer uses n as the maximum number of code generator instances it can invoke to compile different files.
Specify the -xjobs option to set how many processes the compiler creates to complete its work. Currently, -xjobs works only with the -xipo option. When you specify -xjobs=n, the interprocedural optimizer uses n as the maximum number of code generator instances it can invoke to compile different files.
This section contains descriptions of flags that were included implicitly by other flags, but which do not have a permanent home at SPEC.
Allows the compiler to assume that your code does not rely on setting of the errno variable.
Enables the use of the fused multiply-add instruction.
Selects faster (but nonstandard) handling of floating point arithmetic exceptions and gradual underflow.
Controls simplifying assumptions for floating point arithmetic:
Evaluate float expressions as single precision.
Turns off all IEEE 754 trapping modes.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Substitute intrinsic functions or inline system functions where profitable for performance.
Analyze loops for inter-iteration data dependencies, and do loop restructuring. Loop restructuring includes loop interchange, loop fusion, scalar replacement, and elimination of "dead" array assignments.
Use inline expansion for math library, libm.
Select the optimized math library.
Sets the maximum assumed data alignment:
Specify optimization level n:
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, ultraT2plus, T3, T4, T5, T7, M5, M6, M7, sparc64vi, sparc64vii, sparc64viiplus, sparc64x, sparc64xplus, sparc64xii . In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Specifies which instructions can be used. Among the choices are:
xcache defines the cache properties for use by the optimizer. It can specify use of default assumptions ("generic"); use of whatever the compiler can assume about the current platform ("native"); or an explicit description of up to three levels of cache, using colon-separated specifiers of the form si/li/ai[/ti], where:
xchip determines timing properties that are assumed by the compiler. It does not limit which instructions are allowed (see xtarget for that). Among the choices are:
submit=echo 'pbind -b...' > dobmk; sh dobmk (SPEC tools, Unix shell)
When running multiple copies of benchmarks, the SPEC config file feature submit is often used to
cause individual jobs to be bound to specific processors. If so, the specific command may be found in the config file; here
is a brief guide to understanding that command:
This result has been formatted using multiple flags files. The "sw environment" from each of them appears next.
MTEXCLUSIVE
If set to "Y", additional memory allocation buckets will be created, so that threads will not need to share buckets
unless more than 2*NCPUS threads are created. This variable is used by mtmalloc.
SUNW_MP_PROCBIND
Binds threads in an OpenMP program to the virtual processors enumerated in the assignment. Can also be set to TRUE,
which casues threads to be bound in a round-robin fashion.
SUNW_MP_THR_IDLE
Specifies whether idle threads should SLEEP or SPIN.
STACKSIZE=<n>
Set the size of the stack (temporary storage area) for each slave thread of a multithreaded program.
ulimit -s <n>
Sets the stack size to n kbytes, or "unlimited" to allow the stack size to grow without limit.
Note that the "heap" and the "stack" share space; if your application allocates large amounts of memory on the heap,
then you may find that the stack limit should not be set to "unlimited". A commonly used setting for SPEC CPU2006 purposes
is a stack size of 128MB (131072K).
LD_LIBRARY_PATH=<directories>
LD_LIBRARY_PATH controls the search order for both the compile-time and run-time linkers. Usually, it can be
defaulted; but testers may sometimes choose to explicitly set it (as documented in the notes in the submission), in order to
ensure that the correct versions of libraries are picked up.
MADV=access_lwp and LD_PRELOAD=madv.so.1
When the madv.so.1 shared object is present in the LD_PRELOAD list, it is possible to provide advice to the system
about how memory is likely to be accessed. The advice present in MADV applies to all processes and their descendants. A
commonly used value is access_lwp, which means that when memory is allocated, the next process to touch it will be
the primary user. Examples of other possible values include sequential, for memory that is used only once and
then no longer needed and acces_many when many processes will be sharing data.
MPSSHEAP=<size>, MPSSSTACK=<size>, and
LD_PRELOAD=mpss.so.1
When these variables are set, the mpss.so.1 shared object will set the preferred page size for new processes, and their
descendants, to the requested sizes for the heap and stack.
Platform settings
One or more of the following settings may have been applied to the testbed. If so, the "Platform Notes" section of the report will say so; and you can read below to find out more about what these settings mean.
autoup=<n> (Unix /etc/system)
When the file system flush daemon fsflush runs, it writes to disk all modified file buffers that are more
than n seconds old.
bufhwm=<n> (Unix /etc/system)
Sets the upper limit of the file system buffer cache. The units for bufhwm are in kilobytes.
cpu_bringup_set=<n> (Unix /etc/system)
Specifies which processors are enabled at boot time. <n> represents a bitmap of the
processors to be brought online.
segmap_percent=<n> (Unix /etc/system)
This value controls the size of the segmap cache as a percent of total memory. Set this value to help keep the file system cache from consuming memory unnecessarily.
STACKSIZE=<n> (Unix environment variable)
Set the size of the stack (temporary storage area) for each slave thread of a multithreaded program.
psrset -c <n> (Unix, superuser commands)
Creates a new processor set and displays the new processor set ID.
psrset -e <n> (Unix, superuser commands)
Executes a command (with optional arguments) in the specified processor set.
The command process and any child processes are executed only by processors in the processor set.
svcadm disable webconsole (Unix, superuser commands)
Turns off the Sun Web Console, a browser-based interface that performs systems management.
If it is enabled, system administrators can manage systems, devices and services from remote systems.
svcadm disable ldmd (Unix, superuser commands)
Turns off the Logical Domains Manager, create and manage logical domains, as well as map logical domains to physical resources.
ts_dispatch_extended=<n> (Unix /etc/system)
Controls which dispatch table is loaded upon boot. A value of 1 loads the large system table, a value of 0 loads the regular system table.
tune_t_fsflushr=<n> (Unix /etc/system)
Controls the number of seconds between runs of the file system flush daemon, fsflush.
doiflush=<n> (Unix /etc/system)
Controls whether file system metadata syncs will be executed during fsflush invocations.
dopageflush=<n> (Unix /etc/system)
Controls whether memory is examined for modified pages during fsflush invocations.
zfs:zfs_arc_max=<n> (Unix /etc/system)
Determines the maximum size of the ZFS Adaptive Replacement Cache (ARC).
Firmware / BIOS / Microcode settings
sethsmode (eXtended System Control Facility, XSCF)
sethsmode is a command to enable or disable the high speed mode of the CPU. The default mode is disabled.
setcod (eXtended System Control Facility, XSCF)
setcod is a command to set the CPU Activation to be used in the physical partition (PPAR).
Flag description origin markings:
For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2017 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.2.
Report generated on Thu Apr 20 09:42:29 2017 by SPEC CPU2006 flags formatter v6906.