SPEC(R) CFP2006 Summary Cisco Systems Cisco UCS C460 M4 (Intel Xeon E7-4850 v2 @ 2.30GHz) Sat Mar 1 03:49:46 2014 CPU2006 License: 9019 Test date: Mar-2014 Test sponsor: Cisco Systems Hardware availability: Apr-2014 Tested by: Cisco Systems Software availability: Sep-2013 --------------------------------------------------------------------------- SPEC has determined that this result is not in compliance with the SPEC CPU2006 run and reporting rules. Specifically, the submitter has notified SPEC that the system was run with a BIOS which included a version of the Intel MRC (Memory Reference Code) that is not supported by Cisco or Intel. --------------------------------------------------------------------------- Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 410.bwaves 96 NC NC 96 NC NC 416.gamess 96 NC NC 96 NC NC 433.milc 96 NC NC 96 NC NC 434.zeusmp 96 NC NC 96 NC NC 435.gromacs 96 NC NC 96 NC NC 436.cactusADM 96 NC NC 96 NC NC 437.leslie3d 96 NC NC 48 NC NC 444.namd 96 NC NC 96 NC NC 447.dealII 96 NC NC 96 NC NC 450.soplex 96 NC NC 48 NC NC 453.povray 96 NC NC 96 NC NC 454.calculix 96 NC NC 96 NC NC 459.GemsFDTD 96 NC NC 96 NC NC 465.tonto 96 NC NC 96 NC NC 470.lbm 96 NC NC 96 NC NC 481.wrf 96 NC NC 96 NC NC 482.sphinx3 96 NC NC 96 NC NC SPECfp(R)_rate_base2006 NC SPECfp_rate2006 NC HARDWARE -------- CPU Name: Intel Xeon E7-4850 v2 CPU Characteristics: Intel Turbo Boost Technology up to 2.80 GHz CPU MHz: 2300 FPU: Integrated CPU(s) enabled: 48 cores, 4 chips, 12 cores/chip, 2 threads/core CPU(s) orderable: 1,2,3,4 Chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 24 MB I+D on chip per chip Other Cache: None Memory: 512 GB (64 x 8 GB 2Rx4 PC3-12800R-11, ECC, and CL11) Disk Subsystem: 1 x 600 GB SAS SATA 10K RPM Other Hardware: None SOFTWARE -------- Operating System: Red Hat Enterprise Linux Server release 6.4 (Santiago) 2.6.32-358.el6.x86_64 Compiler: C/C++: Version 14.0.0.080 of Intel C++ Studio XE for Linux; Fortran: Version 14.0.0.080 of Intel Fortran Studio XE for Linux Auto Parallel: No File System: ext4 System State: Run level 3 (multi-user) Base Pointers: 32/64-bit Peak Pointers: 32/64-bit Other Software: None Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- CPU performance set to Enterprise Power Technology set to Custom CPU Power State C6 set to Enabled CPU Power State C1 Enhanced set to Disabled Package C State Limit set to C0/C1 State Energy Performance policy set to Performance Memory RAS configuration set to Maximum Performance DRAM Clock Throttling Set to Performance LV DDR Mode set to Performance-mode DRAM Refresh Rate Set to 1x Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6818 $Rev: 6818 $ $Date:: 2012-07-17 #$ e86d102572650a6e4d596a3cee98f191 running on localhost.localdomain Sat Mar 1 00:49:47 2014 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E7-4850 v2 @ 2.30GHz 4 "physical id"s (chips) 96 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 12 siblings : 24 physical 0: cores 0 1 2 3 4 5 8 9 10 11 12 13 physical 1: cores 0 1 2 3 4 5 8 9 10 11 12 13 physical 2: cores 0 1 2 3 4 5 8 9 10 11 12 13 physical 3: cores 0 1 2 3 4 5 8 9 10 11 12 13 cache size : 24576 KB From /proc/meminfo MemTotal: 529137472 kB HugePages_Total: 0 Hugepagesize: 2048 kB /usr/bin/lsb_release -d Red Hat Enterprise Linux Server release 6.4 (Santiago) From /etc/*release* /etc/*version* redhat-release: Red Hat Enterprise Linux Server release 6.4 (Santiago) system-release: Red Hat Enterprise Linux Server release 6.4 (Santiago) system-release-cpe: cpe:/o:redhat:enterprise_linux:6server:ga:server uname -a: Linux localhost.localdomain 2.6.32-358.el6.x86_64 #1 SMP Tue Jan 29 11:47:41 EST 2013 x86_64 x86_64 x86_64 GNU/Linux run-level 3 Feb 28 09:34 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sda2 ext4 549G 112G 410G 22% / Additional information from dmidecode: BIOS Cisco Systems, Inc. C460M4.1.5.5.14.020320142203 02/03/2014 Memory: 64x 8 GB 64x 0xCE00 M393B1K70QB0-YK0 8 GB 1333 MHz 2 rank 32x NO DIMM NO DIMM (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64:/opt/cpu2006-1.2/sh" Binaries compiled on a system with 1x Core i7-860 CPU + 8GB memory using RedHat EL 6.4 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/redhat_transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches runspec command invoked through numactl i.e.: numactl --interleave=all runspec Base Compiler Invocation ------------------------ C benchmarks: icc -m64 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Benchmarks using both Fortran and C: icc -m64 ifort -m64 Base Portability Flags ---------------------- 410.bwaves: -DSPEC_CPU_LP64 416.gamess: -DSPEC_CPU_LP64 433.milc: -DSPEC_CPU_LP64 434.zeusmp: -DSPEC_CPU_LP64 435.gromacs: -DSPEC_CPU_LP64 -nofor_main 436.cactusADM: -DSPEC_CPU_LP64 -nofor_main 437.leslie3d: -DSPEC_CPU_LP64 444.namd: -DSPEC_CPU_LP64 447.dealII: -DSPEC_CPU_LP64 450.soplex: -DSPEC_CPU_LP64 453.povray: -DSPEC_CPU_LP64 454.calculix: -DSPEC_CPU_LP64 -nofor_main 459.GemsFDTD: -DSPEC_CPU_LP64 465.tonto: -DSPEC_CPU_LP64 470.lbm: -DSPEC_CPU_LP64 481.wrf: -DSPEC_CPU_LP64 -DSPEC_CPU_CASE_FLAG -DSPEC_CPU_LINUX 482.sphinx3: -DSPEC_CPU_LP64 Base Optimization Flags ----------------------- C benchmarks: -xAVX -ipo -O3 -no-prec-div -opt-prefetch -auto-p32 -ansi-alias -opt-mem-layout-trans=3 C++ benchmarks: -xAVX -ipo -O3 -no-prec-div -opt-prefetch -auto-p32 -ansi-alias -opt-mem-layout-trans=3 Fortran benchmarks: -xAVX -ipo -O3 -no-prec-div -opt-prefetch Benchmarks using both Fortran and C: -xAVX -ipo -O3 -no-prec-div -opt-prefetch -auto-p32 -ansi-alias -opt-mem-layout-trans=3 Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 482.sphinx3: icc -m32 C++ benchmarks (except as noted below): icpc -m64 450.soplex: icpc -m32 Fortran benchmarks: ifort -m64 Benchmarks using both Fortran and C: icc -m64 ifort -m64 Peak Portability Flags ---------------------- 410.bwaves: -DSPEC_CPU_LP64 416.gamess: -DSPEC_CPU_LP64 433.milc: -DSPEC_CPU_LP64 434.zeusmp: -DSPEC_CPU_LP64 435.gromacs: -DSPEC_CPU_LP64 -nofor_main 436.cactusADM: -DSPEC_CPU_LP64 -nofor_main 437.leslie3d: -DSPEC_CPU_LP64 444.namd: -DSPEC_CPU_LP64 447.dealII: -DSPEC_CPU_LP64 453.povray: -DSPEC_CPU_LP64 454.calculix: -DSPEC_CPU_LP64 -nofor_main 459.GemsFDTD: -DSPEC_CPU_LP64 465.tonto: -DSPEC_CPU_LP64 470.lbm: -DSPEC_CPU_LP64 481.wrf: -DSPEC_CPU_LP64 -DSPEC_CPU_CASE_FLAG -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 433.milc: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -opt-mem-layout-trans=3(pass 2) -prof-use(pass 2) -auto-ilp32 470.lbm: basepeak = yes 482.sphinx3: -xAVX -ipo -O3 -no-prec-div -opt-mem-layout-trans=3 -unroll2 C++ benchmarks: 444.namd: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -opt-mem-layout-trans=3(pass 2) -prof-use(pass 2) -fno-alias -auto-ilp32 447.dealII: basepeak = yes 450.soplex: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -opt-mem-layout-trans=3(pass 2) -prof-use(pass 2) -opt-malloc-options=3 453.povray: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -opt-mem-layout-trans=3(pass 2) -prof-use(pass 2) -unroll4 -ansi-alias Fortran benchmarks: 410.bwaves: basepeak = yes 416.gamess: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll2 -inline-level=0 -scalar-rep- 434.zeusmp: basepeak = yes 437.leslie3d: -xAVX -ipo -O3 -no-prec-div -opt-prefetch 459.GemsFDTD: basepeak = yes 465.tonto: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll4 -auto -inline-calloc -opt-malloc-options=3 Benchmarks using both Fortran and C: 435.gromacs: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -opt-mem-layout-trans=3(pass 2) -prof-use(pass 2) -opt-prefetch -auto-ilp32 436.cactusADM: basepeak = yes 454.calculix: basepeak = yes 481.wrf: -xAVX -ipo -O3 -no-prec-div -auto-ilp32 The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic14.0-official-linux64.20140128.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20140311.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic14.0-official-linux64.20140128.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20140311.xml SPEC and SPECfp are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Fri Sep 19 15:34:29 2014 by CPU2006 ASCII formatter v6932. Originally published on 25 March 2014.