SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS C240 M3 (Intel Xeon E5-2670, 2.60 GHz) Fri Jul 19 08:42:58 2013 CPU2006 License: 9019 Test date: Jul-2013 Test sponsor: Cisco Systems Hardware availability: Apr-2012 Tested by: Cisco Systems Software availability: Dec-2011 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 32 671 466 S 32 577 542 S 400.perlbench 32 670 467 * 32 575 543 * 400.perlbench 32 669 468 S 32 571 547 S 401.bzip2 32 895 345 S 32 879 351 S 401.bzip2 32 903 342 S 32 876 353 S 401.bzip2 32 898 344 * 32 878 352 * 403.gcc 32 514 501 * 32 514 501 S 403.gcc 32 518 498 S 32 517 498 S 403.gcc 32 513 502 S 32 517 499 * 429.mcf 32 305 957 S 32 305 957 S 429.mcf 32 306 954 S 32 306 954 S 429.mcf 32 306 955 * 32 306 955 * 445.gobmk 32 696 483 S 32 697 482 * 445.gobmk 32 713 471 * 32 698 481 S 445.gobmk 32 713 471 S 32 679 494 S 456.hmmer 32 377 792 * 32 319 935 S 456.hmmer 32 375 795 S 32 318 938 * 456.hmmer 32 378 790 S 32 318 938 S 458.sjeng 32 830 467 S 32 795 487 S 458.sjeng 32 828 468 * 32 773 501 S 458.sjeng 32 828 468 S 32 774 500 * 462.libquantum 32 178 3740 * 32 178 3740 * 462.libquantum 32 177 3750 S 32 177 3750 S 462.libquantum 32 178 3730 S 32 178 3730 S 464.h264ref 32 892 794 * 32 880 805 S 464.h264ref 32 899 788 S 32 885 800 S 464.h264ref 32 890 795 S 32 885 800 * 471.omnetpp 32 560 357 * 32 530 378 * 471.omnetpp 32 561 357 S 32 530 378 S 471.omnetpp 32 560 357 S 32 529 378 S 473.astar 32 622 361 S 32 622 361 S 473.astar 32 619 363 S 32 619 363 S 473.astar 32 621 362 * 32 621 362 * 483.xalancbmk 32 329 671 S 32 329 671 S 483.xalancbmk 32 331 666 S 32 331 666 S 483.xalancbmk 32 329 670 * 32 329 670 * ============================================================================== 400.perlbench 32 670 467 * 32 575 543 * 401.bzip2 32 898 344 * 32 878 352 * 403.gcc 32 514 501 * 32 517 499 * 429.mcf 32 306 955 * 32 306 955 * 445.gobmk 32 713 471 * 32 697 482 * 456.hmmer 32 377 792 * 32 318 938 * 458.sjeng 32 828 468 * 32 774 500 * 462.libquantum 32 178 3740 * 32 178 3740 * 464.h264ref 32 892 794 * 32 885 800 * 471.omnetpp 32 560 357 * 32 530 378 * 473.astar 32 621 362 * 32 621 362 * 483.xalancbmk 32 329 670 * 32 329 670 * SPECint(R)_rate_base2006 623 SPECint_rate2006 649 HARDWARE -------- CPU Name: Intel Xeon E5-2670 CPU Characteristics: Intel Turbo Boost Technology up to 3.30 GHz CPU MHz: 2600 FPU: Integrated CPU(s) enabled: 16 cores, 2 chips, 8 cores/chip, 2 threads/core CPU(s) orderable: 1,2 chip Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 20 MB I+D on chip per chip Other Cache: None Memory: 128 GB (16 x 8 GB 2Rx4 PC3-12800R-11, ECC) Disk Subsystem: 1 X 600 GB 10000 RPM SAS Other Hardware: None SOFTWARE -------- Operating System: Red Hat Enterprise Linux Server release 6.2 (Santiago) 2.6.32-220.el6.x86_64 Compiler: C/C++: Version 12.1.3.293 of Intel C++ Studio XE for Linux Auto Parallel: No File System: ext4 System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V9.01 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- Processor Power State C6 set to Disabled Processor Power State C1 Enhanced set to Disabled Energy Performance Set to Performance DRAM Clock Throttling Set to Performance Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6800 $Rev: 6800 $ $Date:: 2011-10-11 #$ 6f2ebdff5032aaa42e583f96b07f99d3 running on localhost.localdomain Fri Jul 19 05:43:00 2013 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-2670 0 @ 2.60GHz 2 "physical id"s (chips) 32 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 8 siblings : 16 physical 0: cores 0 1 2 3 4 5 6 7 physical 1: cores 0 1 2 3 4 5 6 7 cache size : 20480 KB From /proc/meminfo MemTotal: 132133292 kB HugePages_Total: 0 Hugepagesize: 2048 kB /usr/bin/lsb_release -d Red Hat Enterprise Linux Server release 6.2 (Santiago) From /etc/*release* /etc/*version* redhat-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release-cpe: cpe:/o:redhat:enterprise_linux:6server:ga:server uname -a: Linux localhost.localdomain 2.6.32-220.el6.x86_64 #1 SMP Wed Nov 9 08:03:13 EST 2011 x86_64 x86_64 x86_64 GNU/Linux run-level 3 Jul 19 05:41 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 ext4 550G 54G 468G 11% / Additional information from dmidecode: Memory: 16x 0xAD00 HMT31GR7CFR4A-PB 8 GB 1600 MHz 1 rank (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64" Power Technology set to Custom Binaries compiled on a system with 2 X Intel Xeon E5-2690 CPU + 128 GB memory using RHEL 6.2 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/redhat_transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches Base Compiler Invocation ------------------------ C benchmarks: icc -m32 C++ benchmarks: icpc -m32 Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 C++ benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 -Wl,-z,muldefs -L/smartheap -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m32 400.perlbench: icc -m64 401.bzip2: icc -m64 456.hmmer: icc -m64 458.sjeng: icc -m64 C++ benchmarks: icpc -m32 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -auto-ilp32 401.bzip2: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -opt-prefetch -auto-ilp32 -ansi-alias 403.gcc: -xSSE4.2 -ipo -O3 -no-prec-div 429.mcf: basepeak = yes 445.gobmk: -xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -ansi-alias -opt-mem-layout-trans=3 456.hmmer: -xSSE4.2 -ipo -O3 -no-prec-div -unroll2 -auto-ilp32 458.sjeng: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32 462.libquantum: basepeak = yes 464.h264ref: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/smartheap -lsmartheap 473.astar: basepeak = yes 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20120425.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20130717.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20120425.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20130717.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Thu Jul 24 16:16:13 2014 by CPU2006 ASCII formatter v6932. Originally published on 13 August 2013.