Base Compiler Invocation
C benchmarks
-
- cc
![[user]](http://www.spec.org/auto/cpu2006/flags/user.png)
- CC, LD
-
Invoke the Oracle Solaris Studio C Compiler.
C++ benchmarks
-
- CC
- CXX, LD
-
Invoke the Oracle Solaris Studio C++ Compiler
| Compilers |
Oracle Solaris Studio 12.2
GCC for SPARC Systems V4.2 (gccfss).
Note: these compilers are described together because gccfss uses the same optimizing code generator as Studio 12. |
|---|---|
| Operating systems: | Solaris 10 |
| Copyright: |
The text for many of the descriptions below was excerpted from the Solaris Studio Compiler Documentation, which is copyright © 2010 Oracle Corporation. The original documentation can be found at docs.sun.com. Some material below is quoted from the gccfss website, http://cooltools.sunsource.net/gcc/. Additional information about GCC options may be found at the The GNU C documentation website. |
| Updated: 23-Mar-2011 jh | |
Invoke the Oracle Solaris Studio C Compiler.
Invoke the Oracle Solaris Studio C++ Compiler
Invoke the Oracle Solaris Studio C Compiler.
Invoke the Oracle Solaris Studio C++ Compiler
![[benchmark]](http://www.spec.org/auto/cpu2006/flags/benchmark.png)
This macro indicates that the benchmark is being compiled on a SPARC/Solaris system.
SPEC_CPU_SOLARIS is used so that SUN submitters don't have to bother specifying SPEC_CPU_HAVE_BOOL. It sets HAVE__BOOL, and also includes alloca.h.
Enables portability changes for Solaris
This flag can be set for SPEC compilation for Solaris using default compiler.
This macro indicates that the benchmark is being compiled on a SPARC/Solaris system.
SPEC_CPU_SOLARIS is used so that SUN submitters don't have to bother specifying SPEC_CPU_HAVE_BOOL. It sets HAVE__BOOL, and also includes alloca.h.
Enables portability changes for Solaris
This flag can be set for SPEC compilation for Solaris using default compiler.
A convenience option, this switch selects several other options that are described in this file.
Specify optimization level n:
Enables the use of the fused multiply-add instruction.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
xcache defines the cache properties for use by the optimizer. It can specify use of default assumptions ("generic"); use of whatever the compiler can assume about the current platform ("native"); or an explicit description of up to three levels of cache, using colon-separated specifiers of the form si/li/ai, where:
Allows the compiler to perform type-based alias analysis at the specified alias level:
Enable unrolling loops n times where possible.
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Include a library containing chip-specific memory routines.
Use STLport's Standard Library implementation instead of the default libCstd.
Links in a linker mapfile that enables the creation of a 'bss' segment, and aligns the segment at 4MB. This effectively provides an appropriate alignment for large page mapping of the heap.
A convenience option, this switch selects several other options that are described in this file.
Specify optimization level n:
Enables the use of the fused multiply-add instruction.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
xcache defines the cache properties for use by the optimizer. It can specify use of default assumptions ("generic"); use of whatever the compiler can assume about the current platform ("native"); or an explicit description of up to three levels of cache, using colon-separated specifiers of the form si/li/ai, where:
Analyze loops for inter-iteration data dependencies, and do loop restructuring. Loop restructuring includes loop interchange, loop fusion, scalar replacement, and elimination of "dead" array assignments.
Allows the compiler to perform type-based alias analysis:
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Collect basic block coverage profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
The ability to use tcov for feedback-directed optimization is new with release 12.2.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Enables the use of the fused multiply-add instruction.
Set the preferred page size for running the program.
Links in a linker mapfile that enables the creation of a 'bss' segment, and aligns the segment at 4MB. This effectively provides an appropriate alignment for large page mapping of the heap.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Specify optimization level n:
Allows the compiler to perform type-based alias analysis at the specified alias level:
Treat pointer-valued function parameters as restricted pointers.
Specifies the degree of conformance with the ISO C standard: -Xc indicates strict conformance, whereas -Xa indicates ISO C plus some K&R compatibility extensions.
Control generation of prefetch instructions.
(Explicit prefetch macros are not used in the source code of the SPEC CPU2006 benchmarks; therefore, in the context of CPU2006, -xprefetch=yes is effectively a synonym for -xprefetch=auto.)
Enable unrolling loops n times where possible.
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Include a library containing chip-specific memory routines.
Links in a library of general purpose memory allocation routines which can be faster than those found in libc, at the expense of more virtual memory consumed.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Oracle Solaris Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Enables the use of the fused multiply-add instruction.
Set the preferred page size for running the program.
Allows the compiler to perform type-based alias analysis at the specified alias level:
xchip determines timing properties that are assumed by the compiler. It does not limit which instructions are allowed (see xtarget for that). Among the choices are:
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Enable unrolling loops n times where possible.
Include a library containing chip-specific memory routines.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Oracle Solaris Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Enables the use of the fused multiply-add instruction.
Set the preferred page size for running the program.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Specify optimization level n:
xchip determines timing properties that are assumed by the compiler. It does not limit which instructions are allowed (see xtarget for that). Among the choices are:
Generate indirect prefetches for data arrays accessed indirectly.
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Oracle Solaris Studio C and Oracle Solaris Studio C++ is 1. The default for Oracle Solaris Studio Fortran and for gccfss is 2.
Enable unrolling loops n times where possible.
Include a library containing chip-specific memory routines.
A convenience option, this switch selects several other options that are described in this file.
Enables the use of the fused multiply-add instruction.
Set the preferred page size for running the program.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Generate indirect prefetches for data arrays accessed indirectly.
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
[optimizer flag]
Do speculative prefetching for link-list data structures; perform prefetching n iterations ahead.
[optimizer flag]
Do speculative prefetching for link-list data structures; do not attempt prefetching for innermost loops.
[code generator flag]
Use prefetch with function code 1 (prefetch for one read) for memory accesses which are read only.
[code generator flag]
Use prefetch with function code 3 (prefetch for one write) for memory accesses which are read and then written.
Enable unrolling loops n times where possible.
Include a library containing chip-specific memory routines.
Collect basic block coverage profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
The ability to use tcov for feedback-directed optimization is new with release 12.2.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Enables the use of the fused multiply-add instruction.
Set the preferred page size for running the program.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Treat pointer-valued function parameters as restricted pointers.
Generate indirect prefetches for data arrays accessed indirectly.
Enable unrolling loops n times where possible.
Include a library containing chip-specific memory routines.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Oracle Solaris Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Enables the use of the fused multiply-add instruction.
Set the preferred page size for running the program.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Oracle Solaris Studio C and Oracle Solaris Studio C++ is 1. The default for Oracle Solaris Studio Fortran and for gccfss is 2.
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Enable unrolling loops n times where possible.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Oracle Solaris Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Enables the use of the fused multiply-add instruction.
Set the preferred page size for running the program.
Links in a linker mapfile that enables the creation of a 'bss' segment, and aligns the segment at 4MB. This effectively provides an appropriate alignment for large page mapping of the heap.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Specify optimization level n:
Turn off inlining.
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Enable unrolling loops n times where possible.
Include a library containing chip-specific memory routines.
A convenience option, this switch selects several other options that are described in this file.
Enables the use of the fused multiply-add instruction.
Set the preferred page size for running the program.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
xchip determines timing properties that are assumed by the compiler. It does not limit which instructions are allowed (see xtarget for that). Among the choices are:
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Oracle Solaris Studio C and Oracle Solaris Studio C++ is 1. The default for Oracle Solaris Studio Fortran and for gccfss is 2.
Enable unrolling loops n times where possible.
Links in a library of general purpose memory allocation routines which can be faster than those found in libc, at the expense of more virtual memory consumed.
Include a library containing chip-specific memory routines.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Oracle Solaris Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Enables the use of the fused multiply-add instruction.
Set the preferred page size for running the program.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Perform link-time optimizations on the resulting executable over and above any optimizations in the object files. These optimizations are performed at link time by analyzing the object binary code. The meanings of the options are:
0. The link optimizer is disabled. (This is the default.)
1. Perform optimizations based on control flow analysis, including instruction cache coloring and branch optimizations, at link time.
2. Perform additional data flow analysis, including dead-code elimination and address computation simplification, at link time.
Include a library containing chip-specific memory routines.
Use STLport's Standard Library implementation instead of the default libCstd.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Oracle Solaris Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Enables the use of the fused multiply-add instruction.
Set the preferred page size for running the program.
Allows the compiler to perform type-based alias analysis:
Links in a linker mapfile that enables the creation of a 'bss' segment, and aligns the segment at 4MB. This effectively provides an appropriate alignment for large page mapping of the heap.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Specify optimization level n:
[code generator flag]
Control irregular loop prefetching; sets the prefetch look ahead distance, in bytes. The default is 256.
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Enable unrolling loops n times where possible.
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Use STLport's Standard Library implementation instead of the default libCstd.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Oracle Solaris Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Enables the use of the fused multiply-add instruction.
Set the preferred page size for running the program.
Allows the compiler to perform type-based alias analysis:
Links in a linker mapfile that enables the creation of a 'bss' segment, and aligns the segment at 4MB. This effectively provides an appropriate alignment for large page mapping of the heap.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
xcache defines the cache properties for use by the optimizer. It can specify use of default assumptions ("generic"); use of whatever the compiler can assume about the current platform ("native"); or an explicit description of up to three levels of cache, using colon-separated specifiers of the form si/li/ai, where:
Perform link-time optimizations on the resulting executable over and above any optimizations in the object files. These optimizations are performed at link time by analyzing the object binary code. The meanings of the options are:
0. The link optimizer is disabled. (This is the default.)
1. Perform optimizations based on control flow analysis, including instruction cache coloring and branch optimizations, at link time.
2. Perform additional data flow analysis, including dead-code elimination and address computation simplification, at link time.
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Use STLport's Standard Library implementation instead of the default libCstd.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Oracle Solaris Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Enables the use of the fused multiply-add instruction.
Set the preferred page size for running the program.
Allows the compiler to perform type-based alias analysis:
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Specify optimization level n:
xcache defines the cache properties for use by the optimizer. It can specify use of default assumptions ("generic"); use of whatever the compiler can assume about the current platform ("native"); or an explicit description of up to three levels of cache, using colon-separated specifiers of the form si/li/ai, where:
Enable unrolling loops n times where possible.
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Links in a library of general purpose memory allocation routines which can be faster than those found in libc, at the expense of more virtual memory consumed.
Specify the -xjobs option to set how many processes the compiler creates to complete its work. Currently, -xjobs works only with the -xipo option. When you specify -xjobs=n, the interprocedural optimizer uses n as the maximum number of code generator instances it can invoke to compile different files.
Directs the compiler to print the name and version ID of each component as the compiler executes.
Turns on verbose mode, showing how command options expand. Shows each component as it is invoked.
Specify the -xjobs option to set how many processes the compiler creates to complete its work. Currently, -xjobs works only with the -xipo option. When you specify -xjobs=n, the interprocedural optimizer uses n as the maximum number of code generator instances it can invoke to compile different files.
Controls compiler verbosity. There are several values that can be used with this flag:
The default is -verbose=%none.
Specify the -xjobs option to set how many processes the compiler creates to complete its work. Currently, -xjobs works only with the -xipo option. When you specify -xjobs=n, the interprocedural optimizer uses n as the maximum number of code generator instances it can invoke to compile different files.
Directs the compiler to print the name and version ID of each component as the compiler executes.
Turns on verbose mode, showing how command options expand. Shows each component as it is invoked.
Specify the -xjobs option to set how many processes the compiler creates to complete its work. Currently, -xjobs works only with the -xipo option. When you specify -xjobs=n, the interprocedural optimizer uses n as the maximum number of code generator instances it can invoke to compile different files.
Controls compiler verbosity. There are several values that can be used with this flag:
The default is -verbose=%none.
This section contains descriptions of flags that were included implicitly by other flags, but which do not have a permanent home at SPEC.
Allows the compiler to assume that your code does not rely on setting of the errno variable.
Sets the maximum assumed data alignment:
Selects faster (but nonstandard) handling of floating point arithmetic exceptions and gradual underflow.
Controls simplifying assumptions for floating point arithmetic:
Evaluate float expressions as single precision.
Turns off all IEEE 754 trapping modes.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Substitute intrinsic functions or inline system functions where profitable for performance.
Analyze loops for inter-iteration data dependencies, and do loop restructuring. Loop restructuring includes loop interchange, loop fusion, scalar replacement, and elimination of "dead" array assignments.
Use inline expansion for math library, libm.
Select the optimized math library.
Specify optimization level n:
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, sparc64vi. In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Specifies which instructions can be used. Among the choices are:
xcache defines the cache properties for use by the optimizer. It can specify use of default assumptions ("generic"); use of whatever the compiler can assume about the current platform ("native"); or an explicit description of up to three levels of cache, using colon-separated specifiers of the form si/li/ai, where:
xchip determines timing properties that are assumed by the compiler. It does not limit which instructions are allowed (see xtarget for that). Among the choices are:
Platform settings
One or more of the following settings may have been applied to the testbed. If so, the "Platform Notes" section of the report will say so; and you can read below to find out more about what these settings mean.
autoup=<n> (Unix /etc/system)
When the file system flush daemon fsflush runs, it writes to disk all modified file buffers that are more
than n seconds old.
bufhwm=<n> (Unix /etc/system)
Sets the upper limit of the file system buffer cache. The units for bufhwm are in kilobytes.
cpu_bringup_set=<n> (Unix /etc/system)
Specifies which processors are enabled at boot time. <n> represents a bitmap of the
processors to be brought online.
disablecomponent (System Management Services)
This command can be used prior to booting the system for a 1-cpu test. The tester uses disablecomponent to
add all other CPUs to the "blacklist", which is a list of components that cannot be used at boot time.
LD_LIBRARY_PATH=<directories> (linker)
LD_LIBRARY_PATH controls the search order for both the compile-time and run-time linkers. Usually, it can be
defaulted; but testers may sometimes choose to explicitly set it (as documented in the notes in the submission), in order to
ensure that the correct versions of libraries are picked up.
LD_PRELOAD=<shared object> (Unix environment variable)
Adds the named shared object to the runtime environment.
MADV=access_lwp and LD_PRELOAD=madv.so.1 (Unix environment variables)
When the madv.so.1 shared object is present in the LD_PRELOAD list, it is possible to provide advice to the system
about how memory is likely to be accessed. The advice present in MADV applies to all processes and their descendants. A
commonly used value is access_lwp, which means that when memory is allocated, the next process to touch it will be
the primary user. Examples of other possible values include sequential, for memory that is used only once and
then no longer needed and acces_many when many processes will be sharing data.
MPSSHEAP=<size>, MPSSSTACK=<size>, and
LD_PRELOAD=mpss.so.1 (Unix environment variables)
When these variables are set, the mpss.so.1 shared object will set the preferred page size for new processes, and their
descendants, to the requested sizes for the heap and stack.
PARALLEL=<n> (Unix environment variable)
If programs have been compiled with -xautopar, this environment variable can be set to the number of
processors that programs should use.
segmap_percent=<n> (Unix /etc/system)
This value controls the size of the segmap cache as a percent of total memory. Set this value to help keep the file system cache from consuming memory unnecessarily.
STACKSIZE=<n> (Unix environment variable)
Set the size of the stack (temporary storage area) for each slave thread of a multithreaded program.
submit=echo 'pbind -b...' > dobmk; sh dobmk (SPEC tools, Unix shell)
When running multiple copies of benchmarks, the SPEC config file feature submit is sometimes used to
cause individual jobs to be bound to specific processors. If so, the specific command may be found in the config file; here
is a brief guide to understanding that command:
psrset -c <n> (Unix, superuser commands)
Creates a new processor set and displays the new processor set ID.
psrset -e <n> (Unix, superuser commands)
Executes a command (with optional arguments) in the specified processor set.
The command process and any child processes are executed only by processors in the processor set.
svcadm disable webconsole (Unix, superuser commands)
Turns off the Web Console, a browser-based interface that performs systems management.
If it is enabled, system administrators can manage systems, devices and services from remote systems.
ts_dispatch_extended=<n> (Unix /etc/system)
Controls which dispatch table is loaded upon boot. A value of 1 loads the large system table, a value of 0 loads the regular system table.
tune_t_fsflushr=<n> (Unix /etc/system)
Controls the number of seconds between runs of the file system flush daemon, fsflush.
ulimit -s <n> (Unix shell)
Sets the stack size to n kbytes, or "unlimited" to allow the stack size to grow without limit.
Note that the "heap" and the "stack" share space; if your application allocates large amounts of memory on the heap,
then you may find that the stack limit should not be set to "unlimited". A commonly used setting for SPEC CPU2006 purposes
is a stack size of 128MB (131072K).
Flag description origin markings:
|
Indicates that the flag description came from the user flags file. |
![[suite]](http://www.spec.org/auto/cpu2006/flags/suite.png) |
Indicates that the flag description came from the suite-wide flags file. |
|
Indicates that the flag description came from a per-benchmark flags file. |
For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2014 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.1.
Report generated on Wed Jul 23 19:37:44 2014 by SPEC CPU2006 flags formatter v6906.