SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS C210 M2 (Intel Xeon X5650, 2.67 GHz) Thu Sep 16 20:52:58 2010 CPU2006 License: 9019 Test date: Sep-2010 Test sponsor: Cisco Systems Hardware availability: Apr-2010 Tested by: Cisco Systems Software availability: Jan-2010 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 24 798 294 * 24 673 349 * 400.perlbench 24 802 293 S 24 672 349 S 400.perlbench 24 795 295 S 24 682 344 S 401.bzip2 24 1095 211 S 24 1048 221 S 401.bzip2 24 1094 212 * 24 1046 221 S 401.bzip2 24 1093 212 S 24 1048 221 * 403.gcc 24 751 257 S 24 750 258 S 403.gcc 24 757 255 S 24 765 253 * 403.gcc 24 753 257 * 24 771 251 S 429.mcf 24 738 297 S 12 293 373 * 429.mcf 24 717 305 * 12 293 374 S 429.mcf 24 713 307 S 12 294 373 S 445.gobmk 24 740 340 S 24 677 372 S 445.gobmk 24 744 339 S 24 684 368 S 445.gobmk 24 741 340 * 24 683 369 * 456.hmmer 24 500 448 S 12 225 498 * 456.hmmer 24 500 447 S 12 225 498 S 456.hmmer 24 500 448 * 12 224 499 S 458.sjeng 24 920 316 S 24 839 346 S 458.sjeng 24 919 316 S 24 842 345 * 458.sjeng 24 919 316 * 24 842 345 S 462.libquantum 24 603 825 S 24 602 826 S 462.libquantum 24 603 824 * 24 602 826 S 462.libquantum 24 604 823 S 24 602 826 * 464.h264ref 24 1187 447 S 24 1208 440 * 464.h264ref 24 1239 429 S 24 1193 445 S 464.h264ref 24 1203 441 * 24 1213 438 S 471.omnetpp 24 656 229 S 24 635 236 * 471.omnetpp 24 657 228 * 24 635 236 S 471.omnetpp 24 657 228 S 24 636 236 S 473.astar 24 838 201 * 24 776 217 * 473.astar 24 838 201 S 24 776 217 S 473.astar 24 840 201 S 24 776 217 S 483.xalancbmk 24 477 347 * 24 477 347 * 483.xalancbmk 24 477 347 S 24 477 347 S 483.xalancbmk 24 477 347 S 24 477 347 S ============================================================================== 400.perlbench 24 798 294 * 24 673 349 * 401.bzip2 24 1094 212 * 24 1048 221 * 403.gcc 24 753 257 * 24 765 253 * 429.mcf 24 717 305 * 12 293 373 * 445.gobmk 24 741 340 * 24 683 369 * 456.hmmer 24 500 448 * 12 225 498 * 458.sjeng 24 919 316 * 24 842 345 * 462.libquantum 24 603 824 * 24 602 826 * 464.h264ref 24 1203 441 * 24 1208 440 * 471.omnetpp 24 657 228 * 24 635 236 * 473.astar 24 838 201 * 24 776 217 * 483.xalancbmk 24 477 347 * 24 477 347 * SPECint(R)_rate_base2006 324 SPECint_rate2006 346 HARDWARE -------- CPU Name: Intel Xeon X5650 CPU Characteristics: Intel Turbo Boost Technology up to 3.06 GHz CPU MHz: 2667 FPU: Integrated CPU(s) enabled: 12 cores, 2 chips, 6 cores/chip, 2 threads/core CPU(s) orderable: 1 ,2 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 12 MB I+D on chip per chip Other Cache: None Memory: 48 GB (12 x 4GB DDR3-1333 MHz DR RDIMM, CL9, ECC) Disk Subsystem: 146 GB SAS, 10K RPM Other Hardware: None SOFTWARE -------- Operating System: SuSe Linux Enterprise Server 11 (x86_64), Kernel 2.6.27-15-2-default, RC4 Compiler: Intel C++ and Fortran Compiler 11.1 IA32 and Intel 64, Version 11.1 Build 20091130 Package ID: l_cproc_p_11.1.064 l_cprof_p_11.1.064 Auto Parallel: No File System: ext3 System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: MicroQuill SmartHeap Library V8.1 (64-bit) Submit Notes ------------ The config file option 'submit' was used. numactl was used to bind copies to the cores Operating System Notes ---------------------- ulimit -s unlimited was used to set the stacksize to unlimited prior to run General Notes ------------- Binaries were compiled on SLES 10 with Binutils 2.18.50.0.7.20080502 Base Compiler Invocation ------------------------ C benchmarks: icc -m32 C++ benchmarks: icpc -m32 Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch C++ benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-32bit -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m32 401.bzip2: icc -m64 456.hmmer: icc -m64 458.sjeng: icc -m64 462.libquantum: icc -m64 C++ benchmarks (except as noted below): icpc -m32 473.astar: icpc -m64 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 401.bzip2: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX 473.astar: -DSPEC_CPU_LP64 483.xalancbmk: -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -ansi-alias 401.bzip2: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -opt-prefetch -ansi-alias -auto-ilp32 403.gcc: -xSSE4.2 -ipo -O3 -no-prec-div -static 429.mcf: -xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch 445.gobmk: -xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -O2 -ipo -no-prec-div -ansi-alias 456.hmmer: -xSSE4.2 -ipo -O3 -no-prec-div -static -unroll2 -ansi-alias -auto-ilp32 458.sjeng: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32 462.libquantum: -xSSE4.2 -ipo -O3 -no-prec-div -static -auto-ilp32 -opt-prefetch 464.h264ref: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-32bit -lsmartheap 473.astar: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=routine -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-64bit -lsmartheap64 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags file that was used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic11.1-linux64-revG.20100929.html You can also download the XML flags source by saving the following link: http://www.spec.org/cpu2006/flags/Intel-ic11.1-linux64-revG.20100929.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.1. Report generated on Wed Jul 23 14:37:32 2014 by CPU2006 ASCII formatter v6932. Originally published on 12 October 2010.